WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia32/src/cpu/cpu.c


/*
 * Copyright (C) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#include <arch/cpu.h>
#include <arch/cpuid.h>
#include <arch/pm.h>
 
#include <arch.h>
#include <arch/types.h>
#include <print.h>
#include <typedefs.h>
#include <fpu_context.h>
 
#include <arch/smp/apic.h>
 
/*
 * Identification of CPUs.
 * Contains only non-MP-Specification specific SMP code.
 */
#define AMD_CPUID_EBX   0x68747541
#define AMD_CPUID_ECX   0x444d4163
#define AMD_CPUID_EDX   0x69746e65
 
#define INTEL_CPUID_EBX 0x756e6547
#define INTEL_CPUID_ECX 0x6c65746e
#define INTEL_CPUID_EDX 0x49656e69
 
 
enum vendor {
    VendorUnknown=0,
    VendorAMD,
    VendorIntel
};
 
static char *vendor_str[] = {
    "Unknown Vendor",
    "AuthenticAMD",
    "GenuineIntel"
};
 
void fpu_disable(void)
{
    __asm__ volatile (
        "mov %%cr0,%%eax;"
        "or $8,%%eax;"
        "mov %%eax,%%cr0;"
        :
        :
        :"%eax"
    );
}
 
void fpu_enable(void)
{
    __asm__ volatile (
        "mov %%cr0,%%eax;"
        "and $0xffFFffF7,%%eax;"
        "mov %%eax,%%cr0;"
        :
        :
        :"%eax"
    ); 
}
 
 
 
 
void cpu_arch_init(void)
{
    __u32 help=0;
   
    CPU->arch.tss = tss_p;
    CPU->fpu_owner=NULL;
 
    cpuid_feature_info fi;
    cpuid_extended_feature_info efi;
 
    cpu_info_t info;
    cpuid(1, &info);
 
    fi.word=info.cpuid_edx;
    efi.word=info.cpuid_ecx;
   
    if(fi.bits.fxsr)    fpu_fxsr();
    else fpu_fsr();
   
    if(fi.bits.sse) asm volatile (
        "mov %%cr4,%0;\n"
        "or %1,%0;\n"
        "mov %0,%%cr4;\n"
        :"+r"(help)
        :"i"(CR4_OSFXSR_MASK|(1<<10))
    );
   
}
 
 
void cpu_identify(void)
{
    cpu_info_t info;
 
    CPU->arch.vendor = VendorUnknown;
    if (has_cpuid()) {
        cpuid(0, &info);
 
        /*
         * Check for AMD processor.
         */
        if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
            CPU->arch.vendor = VendorAMD;
        }
 
        /*
         * Check for Intel processor.
         */    
        if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
            CPU->arch.vendor = VendorIntel;
        }
               
        cpuid(1, &info);
        CPU->arch.family = (info.cpuid_eax>>8)&0xf;
        CPU->arch.model = (info.cpuid_eax>>4)&0xf;
        CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;                      
    }
}
 
void cpu_print_report(cpu_t* m)
{
    printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
        m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
        m->frequency_mhz);
}
 

Rev 534	Rev 1019
1	/*	1	/*
2	* Copyright (C) 2001-2004 Jakub Jermar	2	* Copyright (C) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#include <arch/cpu.h>	29	#include <arch/cpu.h>
30	#include <arch/cpuid.h>	30	#include <arch/cpuid.h>
31	#include <arch/pm.h>	31	#include <arch/pm.h>
32		32
33	#include <arch.h>	33	#include <arch.h>
34	#include <arch/types.h>	34	#include <arch/types.h>
35	#include <print.h>	35	#include <print.h>
36	#include <typedefs.h>	36	#include <typedefs.h>
37	#include <fpu_context.h>	37	#include <fpu_context.h>
38		38
39	#include <arch/smp/apic.h>	39	#include <arch/smp/apic.h>
40		40
41	/*	41	/*
42	* Identification of CPUs.	42	* Identification of CPUs.
43	* Contains only non-MP-Specification specific SMP code.	43	* Contains only non-MP-Specification specific SMP code.
44	*/	44	*/
45	#define AMD_CPUID_EBX 0x68747541	45	#define AMD_CPUID_EBX 0x68747541
46	#define AMD_CPUID_ECX 0x444d4163	46	#define AMD_CPUID_ECX 0x444d4163
47	#define AMD_CPUID_EDX 0x69746e65	47	#define AMD_CPUID_EDX 0x69746e65
48		48
49	#define INTEL_CPUID_EBX 0x756e6547	49	#define INTEL_CPUID_EBX 0x756e6547
50	#define INTEL_CPUID_ECX 0x6c65746e	50	#define INTEL_CPUID_ECX 0x6c65746e
51	#define INTEL_CPUID_EDX 0x49656e69	51	#define INTEL_CPUID_EDX 0x49656e69
52		52
53		53
54	enum vendor {	54	enum vendor {
55	VendorUnknown=0,	55	VendorUnknown=0,
56	VendorAMD,	56	VendorAMD,
57	VendorIntel	57	VendorIntel
58	};	58	};
59		59
60	static char *vendor_str[] = {	60	static char *vendor_str[] = {
61	"Unknown Vendor",	61	"Unknown Vendor",
62	"AuthenticAMD",	62	"AuthenticAMD",
63	"GenuineIntel"	63	"GenuineIntel"
64	};	64	};
65		65
66	void fpu_disable(void)	66	void fpu_disable(void)
67	{	67	{
68	__asm__ volatile (	68	__asm__ volatile (
69	"mov %%cr0,%%eax;"	69	"mov %%cr0,%%eax;"
70	"or $8,%%eax;"	70	"or $8,%%eax;"
71	"mov %%eax,%%cr0;"	71	"mov %%eax,%%cr0;"
72	:	72	:
73	:	73	:
74	:"%eax"	74	:"%eax"
75	);	75	);
76	}	76	}
77		77
78	void fpu_enable(void)	78	void fpu_enable(void)
79	{	79	{
80	__asm__ volatile (	80	__asm__ volatile (
81	"mov %%cr0,%%eax;"	81	"mov %%cr0,%%eax;"
82	"and $0xffFFffF7,%%eax;"	82	"and $0xffFFffF7,%%eax;"
83	"mov %%eax,%%cr0;"	83	"mov %%eax,%%cr0;"
84	:	84	:
85	:	85	:
86	:"%eax"	86	:"%eax"
87	);	87	);
88	}	88	}
89		89
90		90
91		91
92		92
93	void cpu_arch_init(void)	93	void cpu_arch_init(void)
94	{	94	{
-		95	__u32 help=0;
-		96
95	CPU->arch.tss = tss_p;	97	CPU->arch.tss = tss_p;
96	CPU->fpu_owner=NULL;	98	CPU->fpu_owner=NULL;
-		99
-		100	cpuid_feature_info fi;
-		101	cpuid_extended_feature_info efi;
-		102
-		103	cpu_info_t info;
-		104	cpuid(1, &info);
-		105
-		106	fi.word=info.cpuid_edx;
-		107	efi.word=info.cpuid_ecx;
-		108
-		109	if(fi.bits.fxsr) fpu_fxsr();
-		110	else fpu_fsr();
-		111
-		112	if(fi.bits.sse) asm volatile (
-		113	"mov %%cr4,%0;\n"
-		114	"or %1,%0;\n"
-		115	"mov %0,%%cr4;\n"
-		116	:"+r"(help)
-		117	:"i"(CR4_OSFXSR_MASK\|(1<<10))
-		118	);
-		119
97	}	120	}
98		121
99		122
100	void cpu_identify(void)	123	void cpu_identify(void)
101	{	124	{
102	cpu_info_t info;	125	cpu_info_t info;
103		126
104	CPU->arch.vendor = VendorUnknown;	127	CPU->arch.vendor = VendorUnknown;
105	if (has_cpuid()) {	128	if (has_cpuid()) {
106	cpuid(0, &info);	129	cpuid(0, &info);
107		130
108	/*	131	/*
109	* Check for AMD processor.	132	* Check for AMD processor.
110	*/	133	*/
111	if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {	134	if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
112	CPU->arch.vendor = VendorAMD;	135	CPU->arch.vendor = VendorAMD;
113	}	136	}
114		137
115	/*	138	/*
116	* Check for Intel processor.	139	* Check for Intel processor.
117	*/	140	*/
118	if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {	141	if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
119	CPU->arch.vendor = VendorIntel;	142	CPU->arch.vendor = VendorIntel;
120	}	143	}
121		144
122	cpuid(1, &info);	145	cpuid(1, &info);
123	CPU->arch.family = (info.cpuid_eax>>8)&0xf;	146	CPU->arch.family = (info.cpuid_eax>>8)&0xf;
124	CPU->arch.model = (info.cpuid_eax>>4)&0xf;	147	CPU->arch.model = (info.cpuid_eax>>4)&0xf;
125	CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;	148	CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;
126	}	149	}
127	}	150	}
128		151
129	void cpu_print_report(cpu_t* m)	152	void cpu_print_report(cpu_t* m)
130	{	153	{
131	printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",	154	printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
132	m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,	155	m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
133	m->frequency_mhz);	156	m->frequency_mhz);
134	}	157	}
135		158

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia32/src/cpu/cpu.c @ 1780 – Rev 534 → 1019