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1 | # |
1 | # |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | ## very low and hardware-level functions |
29 | ## very low and hardware-level functions |
30 | 30 | ||
31 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word |
31 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word |
32 | # and 1 means interrupt with error word |
32 | # and 1 means interrupt with error word |
33 | #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 |
33 | #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 |
34 | 34 | ||
35 | .text |
35 | .text |
36 | 36 | ||
37 | .global paging_on |
37 | .global paging_on |
38 | .global enable_l_apic_in_msr |
38 | .global enable_l_apic_in_msr |
39 | .global interrupt_handlers |
39 | .global interrupt_handlers |
40 | .global memsetb |
- | |
41 | .global memsetw |
- | |
42 | 40 | ||
43 | ## Turn paging on |
41 | ## Turn paging on |
44 | # |
42 | # |
45 | # Enable paging and write-back caching in CR0. |
43 | # Enable paging and write-back caching in CR0. |
46 | # |
44 | # |
47 | paging_on: |
45 | paging_on: |
48 | movl %cr0,%edx |
46 | movl %cr0,%edx |
49 | orl $(1<<31),%edx # paging on |
47 | orl $(1<<31),%edx # paging on |
50 | andl $~((1<<30)|(1<<29)),%edx # clear Cache Disable and not Write Though |
48 | andl $~((1<<30)|(1<<29)),%edx # clear Cache Disable and not Write Though |
51 | movl %edx,%cr0 |
49 | movl %edx,%cr0 |
52 | jmp 0f |
50 | jmp 0f |
53 | 0: |
51 | 0: |
54 | ret |
52 | ret |
55 | 53 | ||
56 | 54 | ||
57 | ## Enable local APIC |
55 | ## Enable local APIC |
58 | # |
56 | # |
59 | # Enable local APIC in MSR. |
57 | # Enable local APIC in MSR. |
60 | # |
58 | # |
61 | enable_l_apic_in_msr: |
59 | enable_l_apic_in_msr: |
62 | push %eax |
60 | push %eax |
63 | 61 | ||
64 | movl $0x1b, %ecx |
62 | movl $0x1b, %ecx |
65 | rdmsr |
63 | rdmsr |
66 | orl $(1<<11),%eax |
64 | orl $(1<<11),%eax |
67 | orl $(0xfee00000),%eax |
65 | orl $(0xfee00000),%eax |
68 | wrmsr |
66 | wrmsr |
69 | 67 | ||
70 | pop %eax |
68 | pop %eax |
71 | ret |
69 | ret |
72 | 70 | ||
73 | 71 | ||
74 | ## Declare interrupt handlers |
72 | ## Declare interrupt handlers |
75 | # |
73 | # |
76 | # Declare interrupt handlers for n interrupt |
74 | # Declare interrupt handlers for n interrupt |
77 | # vectors starting at vector i. |
75 | # vectors starting at vector i. |
78 | # |
76 | # |
79 | # The handlers setup data segment registers |
77 | # The handlers setup data segment registers |
80 | # and call trap_dispatcher(). |
78 | # and call trap_dispatcher(). |
81 | # |
79 | # |
82 | .macro handler i n |
80 | .macro handler i n |
83 | push %ebp |
81 | push %ebp |
84 | movl %esp,%ebp |
82 | movl %esp,%ebp |
85 | pusha |
83 | pusha |
86 | 84 | ||
87 | push %ds |
85 | push %ds |
88 | push %es |
86 | push %es |
89 | 87 | ||
90 | # we must fill the data segment registers |
88 | # we must fill the data segment registers |
91 | movw $16,%ax |
89 | movw $16,%ax |
92 | movw %ax,%ds |
90 | movw %ax,%ds |
93 | movw %ax,%es |
91 | movw %ax,%es |
94 | 92 | ||
95 | movl $(\i),%edi |
93 | movl $(\i),%edi |
96 | pushl %ebp |
94 | pushl %ebp |
97 | addl $4,(%esp) |
95 | addl $4,(%esp) |
98 | pushl %edi |
96 | pushl %edi |
99 | call trap_dispatcher |
97 | call trap_dispatcher |
100 | addl $8,%esp |
98 | addl $8,%esp |
101 | 99 | ||
102 | pop %es |
100 | pop %es |
103 | pop %ds |
101 | pop %ds |
104 | 102 | ||
105 | 103 | ||
106 | # CLNT |
104 | # CLNT |
107 | pushfl |
105 | pushfl |
108 | pop %eax |
106 | pop %eax |
109 | and $0xFFFFBFFF,%eax |
107 | and $0xFFFFBFFF,%eax |
110 | push %eax |
108 | push %eax |
111 | popfl |
109 | popfl |
112 | 110 | ||
113 | 111 | ||
114 | 112 | ||
115 | # Test if this is interrupt with error word or not |
113 | # Test if this is interrupt with error word or not |
116 | mov $\i,%cl |
114 | mov $\i,%cl |
117 | movl $1,%eax |
115 | movl $1,%eax |
118 | test $0xe0,%cl |
116 | test $0xe0,%cl |
119 | jnz 0f |
117 | jnz 0f |
120 | and $0x1f,%cl |
118 | and $0x1f,%cl |
121 | shl %cl,%eax |
119 | shl %cl,%eax |
122 | and $ERROR_WORD_INTERRUPT_LIST,%eax |
120 | and $ERROR_WORD_INTERRUPT_LIST,%eax |
123 | jz 0f |
121 | jz 0f |
124 | 122 | ||
125 | 123 | ||
126 | # Return with error word |
124 | # Return with error word |
127 | popa |
125 | popa |
128 | pop %ebp |
126 | pop %ebp |
129 | add $4,%esp # Skip error word |
127 | add $4,%esp # Skip error word |
130 | iret |
128 | iret |
131 | 129 | ||
132 | 0: |
130 | 0: |
133 | # Return with no error word |
131 | # Return with no error word |
134 | popa |
132 | popa |
135 | pop %ebp |
133 | pop %ebp |
136 | iret |
134 | iret |
137 | 135 | ||
138 | .if (\n-\i)-1 |
136 | .if (\n-\i)-1 |
139 | handler "(\i+1)",\n |
137 | handler "(\i+1)",\n |
140 | .endif |
138 | .endif |
141 | .endm |
139 | .endm |
142 | 140 | ||
143 | # keep in sync with pm.h !!! |
141 | # keep in sync with pm.h !!! |
144 | IDT_ITEMS=64 |
142 | IDT_ITEMS=64 |
145 | interrupt_handlers: |
143 | interrupt_handlers: |
146 | h_start: |
144 | h_start: |
147 | handler 0 64 |
145 | handler 0 64 |
148 | # handler 64 128 |
146 | # handler 64 128 |
149 | # handler 128 192 |
147 | # handler 128 192 |
150 | # handler 192 256 |
148 | # handler 192 256 |
151 | h_end: |
149 | h_end: |
152 | 150 | ||
153 | - | ||
154 | ## Fill memory with bytes |
- | |
155 | # |
- | |
156 | # Fill a given number of bytes (2nd argument) |
- | |
157 | # at memory defined by 1st argument with the |
- | |
158 | # byte value defined by 3rd argument. |
- | |
159 | # |
- | |
160 | DST=12 |
- | |
161 | CNT=16 |
- | |
162 | X=20 |
- | |
163 | memsetb: |
- | |
164 | push %eax |
- | |
165 | push %edi |
- | |
166 | - | ||
167 | movl CNT(%esp),%ecx |
- | |
168 | movl DST(%esp),%edi |
- | |
169 | movl X(%esp),%eax |
- | |
170 | - | ||
171 | rep stosb %al,%es:(%edi) |
- | |
172 | - | ||
173 | pop %edi |
- | |
174 | pop %eax |
- | |
175 | ret |
- | |
176 | - | ||
177 | - | ||
178 | ## Fill memory with words |
- | |
179 | # |
- | |
180 | # Fill a given number of words (2nd argument) |
- | |
181 | # at memory defined by 1st argument with the |
- | |
182 | # word value defined by 3rd argument. |
- | |
183 | # |
- | |
184 | DST=12 |
- | |
185 | CNT=16 |
- | |
186 | X=20 |
- | |
187 | memsetw: |
- | |
188 | push %eax |
- | |
189 | push %edi |
- | |
190 | - | ||
191 | movl CNT(%esp),%ecx |
- | |
192 | movl DST(%esp),%edi |
- | |
193 | movl X(%esp),%eax |
- | |
194 | - | ||
195 | rep stosw %ax,%es:(%edi) |
- | |
196 | - | ||
197 | pop %edi |
- | |
198 | pop %eax |
- | |
199 | - | ||
200 | ret |
- | |
201 | - | ||
202 | 151 | ||
203 | # THIS IS USERSPACE CODE |
152 | # THIS IS USERSPACE CODE |
204 | .global utext |
153 | .global utext |
205 | utext: |
154 | utext: |
206 | xor %ax,%ax |
155 | xor %ax,%ax |
207 | mov %ax,%ds |
156 | mov %ax,%ds |
208 | mov %ax,%es |
157 | mov %ax,%es |
209 | mov %ax,%fs |
158 | mov %ax,%fs |
210 | mov %ax,%gs |
159 | mov %ax,%gs |
211 | 0: |
160 | 0: |
212 | int $48 |
161 | int $48 |
213 | jmp 0b |
162 | jmp 0b |
214 | # not reached |
163 | # not reached |
215 | utext_end: |
164 | utext_end: |
216 | 165 | ||
217 | .data |
166 | .data |
218 | .global utext_size |
167 | .global utext_size |
219 | utext_size: |
168 | utext_size: |
220 | .long utext_end - utext |
169 | .long utext_end - utext |
221 | 170 | ||
222 | .global interrupt_handler_size |
171 | .global interrupt_handler_size |
223 | 172 | ||
224 | interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS |
173 | interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS |
225 | 174 |