WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia32/src/asm.S


#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## very low and hardware-level functions
 
#  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
# and 1 means interrupt with error word
#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
 
.text
 
.global paging_on
.global enable_l_apic_in_msr
.global interrupt_handlers
 
 
 
.global memcpy
.global memsetb
.global memsetw
.global memcmp
 
 
## Turn paging on
#
# Enable paging and write-back caching in CR0.
#
paging_on:
	movl %cr0,%edx
	orl $(1<<31),%edx		# paging on
	andl $~((1<<30)|(1<<29)),%edx	# clear Cache Disable and not Write Though
	movl %edx,%cr0
	jmp 0f
0:
	ret
 
 
## Enable local APIC
#
# Enable local APIC in MSR.
#
enable_l_apic_in_msr:
	push %eax
 
	movl $0x1b, %ecx
	rdmsr
	orl $(1<<11),%eax
	orl $(0xfee00000),%eax
	wrmsr
 
	pop %eax
	ret
 
 
## Declare interrupt handlers
#
# Declare interrupt handlers for n interrupt
# vectors starting at vector i.
#
# The handlers setup data segment registers
# and call trap_dispatcher().
#
.macro handler i n
	push %ebp
	movl %esp,%ebp
	pusha
 
	push %ds
	push %es
 
	# we must fill the data segment registers
	movw $16,%ax
	movw %ax,%ds
	movw %ax,%es
 
	movl $(\i),%edi
	pushl %ebp
	addl $4,(%esp)
	pushl %edi
	call trap_dispatcher
	addl $8,%esp
 
	pop %es
	pop %ds
 
 
# CLNT
	pushfl
	pop %eax
	and $0xFFFFBFFF,%eax
	push %eax
	popfl
	
 
 
# Test if this is interrupt with error word or not
	mov $\i,%cl
	movl $1,%eax
	test $0xe0,%cl
	jnz 0f
	and $0x1f,%cl
	shl %cl,%eax
	and $ERROR_WORD_INTERRUPT_LIST,%eax
	jz 0f
 
 
# Return with error word
	popa
	pop %ebp
	add $4,%esp	# Skip error word
	iret
 
0:
# Return with no error word
	popa
	pop %ebp
	iret
 
	.if (\n-\i)-1
	handler "(\i+1)",\n
	.endif
.endm
 
# keep in sync with pm.h !!!
IDT_ITEMS=64
interrupt_handlers:
h_start:
	handler 0 64
#	handler 64 128	
#	handler 128 192
#	handler 192 256
h_end:
 
 
## Copy memory
#
# Copy a given number of bytes (3rd argument)
# from the memory location defined by 2nd argument
# to the memory location defined by 1st argument.
# The memory areas cannot overlap.
#
SRC=16
DST=12
CNT=20
memcpy:
	push %esi
	push %edi
 
	movl CNT(%esp),%ecx
	movl DST(%esp),%edi
	movl SRC(%esp),%esi
 
	rep movsb %ds:(%esi),%es:(%edi)
 
	pop %edi
	pop %esi
	ret
 
 
## Fill memory with bytes
#
# Fill a given number of bytes (2nd argument)
# at memory defined by 1st argument with the
# byte value defined by 3rd argument.
#
DST=12
CNT=16
X=20
memsetb:
	push %eax
	push %edi
 
	movl CNT(%esp),%ecx
	movl DST(%esp),%edi
	movl X(%esp),%eax
 
	rep stosb %al,%es:(%edi)
 
	pop %edi
	pop %eax
	ret
 
 
## Fill memory with words
#
# Fill a given number of words (2nd argument)
# at memory defined by 1st argument with the
# word value defined by 3rd argument.
#
DST=12
CNT=16
X=20
memsetw:
	push %eax
	push %edi
 
	movl CNT(%esp),%ecx
	movl DST(%esp),%edi
	movl X(%esp),%eax
 
	rep stosw %ax,%es:(%edi)
 
	pop %edi
	pop %eax
 
	ret
 
 
## Compare memory regions for equality
#
# Compare a given number of bytes (3rd argument)
# at memory locations defined by 1st and 2nd argument
# for equality. If the bytes are equal, EAX contains
# 0.
#
SRC=12
DST=16
CNT=20
memcmp:
	push %esi
	push %edi
 
	movl CNT(%esp),%ecx
	movl DST(%esp),%edi
	movl SRC(%esp),%esi
 
	repe cmpsb %es:(%edi),%ds:(%esi)
	movl %ecx,%eax		# %ecx contains the return value (zero on success)
 
	pop %edi
	pop %esi
	
	ret
 
 
# THIS IS USERSPACE CODE
.global utext
utext:
	xor %ax,%ax
	mov %ax,%ds
	mov %ax,%es
	mov %ax,%fs
	mov %ax,%gs
0:
	int $48
	jmp 0b
	# not reached
utext_end:
 
.data
.global utext_size
utext_size:
	.long utext_end - utext 
 
.global interrupt_handler_size
 
interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
 

Rev 356	Rev 357
1	#	1	#
2	# Copyright (C) 2001-2004 Jakub Jermar	2	# Copyright (C) 2001-2004 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	## very low and hardware-level functions	29	## very low and hardware-level functions
30		30
31	# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word	31	# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
32	# and 1 means interrupt with error word	32	# and 1 means interrupt with error word
33	#define ERROR_WORD_INTERRUPT_LIST 0x00027D00	33	#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
34		34
35	.text	35	.text
36		36
37	.global paging_on	37	.global paging_on
38	.global enable_l_apic_in_msr	38	.global enable_l_apic_in_msr
39	.global interrupt_handlers	39	.global interrupt_handlers
40	.global inb	-
41	.global inw	-
42	.global inl	-
43	.global memcpy	40	.global memcpy
44	.global memsetb	41	.global memsetb
45	.global memsetw	42	.global memsetw
46	.global memcmp	43	.global memcmp
47		44
48		45
49	## Turn paging on	46	## Turn paging on
50	#	47	#
51	# Enable paging and write-back caching in CR0.	48	# Enable paging and write-back caching in CR0.
52	#	49	#
53	paging_on:	50	paging_on:
54	movl %cr0,%edx	51	movl %cr0,%edx
55	orl $(1<<31),%edx # paging on	52	orl $(1<<31),%edx # paging on
56	andl $~((1<<30)\|(1<<29)),%edx # clear Cache Disable and not Write Though	53	andl $~((1<<30)\|(1<<29)),%edx # clear Cache Disable and not Write Though
57	movl %edx,%cr0	54	movl %edx,%cr0
58	jmp 0f	55	jmp 0f
59	0:	56	0:
60	ret	57	ret
61		58
62		59
63	## Enable local APIC	60	## Enable local APIC
64	#	61	#
65	# Enable local APIC in MSR.	62	# Enable local APIC in MSR.
66	#	63	#
67	enable_l_apic_in_msr:	64	enable_l_apic_in_msr:
68	push %eax	65	push %eax
69		66
70	movl $0x1b, %ecx	67	movl $0x1b, %ecx
71	rdmsr	68	rdmsr
72	orl $(1<<11),%eax	69	orl $(1<<11),%eax
73	orl $(0xfee00000),%eax	70	orl $(0xfee00000),%eax
74	wrmsr	71	wrmsr
75		72
76	pop %eax	73	pop %eax
77	ret	74	ret
78		75
79		76
80	## Declare interrupt handlers	77	## Declare interrupt handlers
81	#	78	#
82	# Declare interrupt handlers for n interrupt	79	# Declare interrupt handlers for n interrupt
83	# vectors starting at vector i.	80	# vectors starting at vector i.
84	#	81	#
85	# The handlers setup data segment registers	82	# The handlers setup data segment registers
86	# and call trap_dispatcher().	83	# and call trap_dispatcher().
87	#	84	#
88	.macro handler i n	85	.macro handler i n
89	push %ebp	86	push %ebp
90	movl %esp,%ebp	87	movl %esp,%ebp
91	pusha	88	pusha
92		89
93	push %ds	90	push %ds
94	push %es	91	push %es
95		92
96	# we must fill the data segment registers	93	# we must fill the data segment registers
97	movw $16,%ax	94	movw $16,%ax
98	movw %ax,%ds	95	movw %ax,%ds
99	movw %ax,%es	96	movw %ax,%es
100		97
101	movl $(\i),%edi	98	movl $(\i),%edi
102	pushl %ebp	99	pushl %ebp
103	addl $4,(%esp)	100	addl $4,(%esp)
104	pushl %edi	101	pushl %edi
105	call trap_dispatcher	102	call trap_dispatcher
106	addl $8,%esp	103	addl $8,%esp
107		104
108	pop %es	105	pop %es
109	pop %ds	106	pop %ds
110		107
111		108
112	# CLNT	109	# CLNT
113	pushfl	110	pushfl
114	pop %eax	111	pop %eax
115	and $0xFFFFBFFF,%eax	112	and $0xFFFFBFFF,%eax
116	push %eax	113	push %eax
117	popfl	114	popfl
118		115
119		116
120		117
121	# Test if this is interrupt with error word or not	118	# Test if this is interrupt with error word or not
122	mov $\i,%cl	119	mov $\i,%cl
123	movl $1,%eax	120	movl $1,%eax
124	test $0xe0,%cl	121	test $0xe0,%cl
125	jnz 0f	122	jnz 0f
126	and $0x1f,%cl	123	and $0x1f,%cl
127	shl %cl,%eax	124	shl %cl,%eax
128	and $ERROR_WORD_INTERRUPT_LIST,%eax	125	and $ERROR_WORD_INTERRUPT_LIST,%eax
129	jz 0f	126	jz 0f
130		127
131		128
132	# Return with error word	129	# Return with error word
133	popa	130	popa
134	pop %ebp	131	pop %ebp
135	add $4,%esp # Skip error word	132	add $4,%esp # Skip error word
136	iret	133	iret
137		134
138	0:	135	0:
139	# Return with no error word	136	# Return with no error word
140	popa	137	popa
141	pop %ebp	138	pop %ebp
142	iret	139	iret
143		140
144	.if (\n-\i)-1	141	.if (\n-\i)-1
145	handler "(\i+1)",\n	142	handler "(\i+1)",\n
146	.endif	143	.endif
147	.endm	144	.endm
148		145
149	# keep in sync with pm.h !!!	146	# keep in sync with pm.h !!!
150	IDT_ITEMS=64	147	IDT_ITEMS=64
151	interrupt_handlers:	148	interrupt_handlers:
152	h_start:	149	h_start:
153	handler 0 64	150	handler 0 64
154	# handler 64 128	151	# handler 64 128
155	# handler 128 192	152	# handler 128 192
156	# handler 192 256	153	# handler 192 256
157	h_end:	154	h_end:
158		155
159		156
160	## Copy memory	157	## Copy memory
161	#	158	#
162	# Copy a given number of bytes (3rd argument)	159	# Copy a given number of bytes (3rd argument)
163	# from the memory location defined by 2nd argument	160	# from the memory location defined by 2nd argument
164	# to the memory location defined by 1st argument.	161	# to the memory location defined by 1st argument.
165	# The memory areas cannot overlap.	162	# The memory areas cannot overlap.
166	#	163	#
167	SRC=16	164	SRC=16
168	DST=12	165	DST=12
169	CNT=20	166	CNT=20
170	memcpy:	167	memcpy:
171	push %esi	168	push %esi
172	push %edi	169	push %edi
173		170
174	movl CNT(%esp),%ecx	171	movl CNT(%esp),%ecx
175	movl DST(%esp),%edi	172	movl DST(%esp),%edi
176	movl SRC(%esp),%esi	173	movl SRC(%esp),%esi
177		174
178	rep movsb %ds:(%esi),%es:(%edi)	175	rep movsb %ds:(%esi),%es:(%edi)
179		176
180	pop %edi	177	pop %edi
181	pop %esi	178	pop %esi
182	ret	179	ret
183		180
184		181
185	## Fill memory with bytes	182	## Fill memory with bytes
186	#	183	#
187	# Fill a given number of bytes (2nd argument)	184	# Fill a given number of bytes (2nd argument)
188	# at memory defined by 1st argument with the	185	# at memory defined by 1st argument with the
189	# byte value defined by 3rd argument.	186	# byte value defined by 3rd argument.
190	#	187	#
191	DST=12	188	DST=12
192	CNT=16	189	CNT=16
193	X=20	190	X=20
194	memsetb:	191	memsetb:
195	push %eax	192	push %eax
196	push %edi	193	push %edi
197		194
198	movl CNT(%esp),%ecx	195	movl CNT(%esp),%ecx
199	movl DST(%esp),%edi	196	movl DST(%esp),%edi
200	movl X(%esp),%eax	197	movl X(%esp),%eax
201		198
202	rep stosb %al,%es:(%edi)	199	rep stosb %al,%es:(%edi)
203		200
204	pop %edi	201	pop %edi
205	pop %eax	202	pop %eax
206	ret	203	ret
207		204
208		205
209	## Fill memory with words	206	## Fill memory with words
210	#	207	#
211	# Fill a given number of words (2nd argument)	208	# Fill a given number of words (2nd argument)
212	# at memory defined by 1st argument with the	209	# at memory defined by 1st argument with the
213	# word value defined by 3rd argument.	210	# word value defined by 3rd argument.
214	#	211	#
215	DST=12	212	DST=12
216	CNT=16	213	CNT=16
217	X=20	214	X=20
218	memsetw:	215	memsetw:
219	push %eax	216	push %eax
220	push %edi	217	push %edi
221		218
222	movl CNT(%esp),%ecx	219	movl CNT(%esp),%ecx
223	movl DST(%esp),%edi	220	movl DST(%esp),%edi
224	movl X(%esp),%eax	221	movl X(%esp),%eax
225		222
226	rep stosw %ax,%es:(%edi)	223	rep stosw %ax,%es:(%edi)
227		224
228	pop %edi	225	pop %edi
229	pop %eax	226	pop %eax
230		227
231	ret	228	ret
232		229
233		230
234	## Compare memory regions for equality	231	## Compare memory regions for equality
235	#	232	#
236	# Compare a given number of bytes (3rd argument)	233	# Compare a given number of bytes (3rd argument)
237	# at memory locations defined by 1st and 2nd argument	234	# at memory locations defined by 1st and 2nd argument
238	# for equality. If the bytes are equal, EAX contains	235	# for equality. If the bytes are equal, EAX contains
239	# 0.	236	# 0.
240	#	237	#
241	SRC=12	238	SRC=12
242	DST=16	239	DST=16
243	CNT=20	240	CNT=20
244	memcmp:	241	memcmp:
245	push %esi	242	push %esi
246	push %edi	243	push %edi
247		244
248	movl CNT(%esp),%ecx	245	movl CNT(%esp),%ecx
249	movl DST(%esp),%edi	246	movl DST(%esp),%edi
250	movl SRC(%esp),%esi	247	movl SRC(%esp),%esi
251		248
252	repe cmpsb %es:(%edi),%ds:(%esi)	249	repe cmpsb %es:(%edi),%ds:(%esi)
253	movl %ecx,%eax # %ecx contains the return value (zero on success)	250	movl %ecx,%eax # %ecx contains the return value (zero on success)
254		251
255	pop %edi	252	pop %edi
256	pop %esi	253	pop %esi
257		254
258	ret	255	ret
259		256
260		257
261	# THIS IS USERSPACE CODE	258	# THIS IS USERSPACE CODE
262	.global utext	259	.global utext
263	utext:	260	utext:
264	xor %ax,%ax	261	xor %ax,%ax
265	mov %ax,%ds	262	mov %ax,%ds
266	mov %ax,%es	263	mov %ax,%es
267	mov %ax,%fs	264	mov %ax,%fs
268	mov %ax,%gs	265	mov %ax,%gs
269	0:	266	0:
270	int $48	267	int $48
271	jmp 0b	268	jmp 0b
272	# not reached	269	# not reached
273	utext_end:	270	utext_end:
274		271
275	.data	272	.data
276	.global utext_size	273	.global utext_size
277	utext_size:	274	utext_size:
278	.long utext_end - utext	275	.long utext_end - utext
279		276
280	.global interrupt_handler_size	277	.global interrupt_handler_size
281		278
282	interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS	279	interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
283		280

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(root)/kernel/trunk/arch/ia32/src/asm.S @ 564 – Rev 356 → 357