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1 | # |
1 | # |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | ## very low and hardware-level functions |
29 | ## very low and hardware-level functions |
30 | 30 | ||
31 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word |
31 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word |
32 | # and 1 means interrupt with error word |
32 | # and 1 means interrupt with error word |
33 | #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 |
33 | #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 |
34 | 34 | ||
35 | .text |
35 | .text |
36 | 36 | ||
37 | .global paging_on |
37 | .global paging_on |
38 | .global enable_l_apic_in_msr |
38 | .global enable_l_apic_in_msr |
39 | .global interrupt_handlers |
39 | .global interrupt_handlers |
40 | 40 | ||
41 | ## Turn paging on |
41 | ## Turn paging on |
42 | # |
42 | # |
43 | # Enable paging and write-back caching in CR0. |
43 | # Enable paging and write-back caching in CR0. |
44 | # |
44 | # |
45 | paging_on: |
45 | paging_on: |
46 | movl %cr0,%edx |
46 | movl %cr0,%edx |
47 | orl $(1<<31),%edx # paging on |
47 | orl $(1<<31),%edx # paging on |
48 | andl $~((1<<30)|(1<<29)),%edx # clear Cache Disable and not Write Though |
48 | andl $~((1<<30)|(1<<29)),%edx # clear Cache Disable and not Write Though |
49 | movl %edx,%cr0 |
49 | movl %edx,%cr0 |
50 | jmp 0f |
50 | jmp 0f |
51 | 0: |
51 | 0: |
52 | ret |
52 | ret |
53 | 53 | ||
54 | 54 | ||
55 | ## Enable local APIC |
55 | ## Enable local APIC |
56 | # |
56 | # |
57 | # Enable local APIC in MSR. |
57 | # Enable local APIC in MSR. |
58 | # |
58 | # |
59 | enable_l_apic_in_msr: |
59 | enable_l_apic_in_msr: |
60 | push %eax |
60 | push %eax |
61 | 61 | ||
62 | movl $0x1b, %ecx |
62 | movl $0x1b, %ecx |
63 | rdmsr |
63 | rdmsr |
64 | orl $(1<<11),%eax |
64 | orl $(1<<11),%eax |
65 | orl $(0xfee00000),%eax |
65 | orl $(0xfee00000),%eax |
66 | wrmsr |
66 | wrmsr |
67 | 67 | ||
68 | pop %eax |
68 | pop %eax |
69 | ret |
69 | ret |
70 | 70 | ||
71 | # Clear nested flag |
71 | # Clear nested flag |
72 | # overwrites %ecx |
72 | # overwrites %ecx |
73 | .macro CLEAR_NT_FLAG |
73 | .macro CLEAR_NT_FLAG |
74 | pushfl |
74 | pushfl |
75 | pop %ecx |
75 | pop %ecx |
76 | and $0xffffbfff,%ecx |
76 | and $0xffffbfff,%ecx |
77 | push %ecx |
77 | push %ecx |
78 | popfl |
78 | popfl |
79 | .endm |
79 | .endm |
80 | 80 | ||
81 | ## Declare interrupt handlers |
81 | ## Declare interrupt handlers |
82 | # |
82 | # |
83 | # Declare interrupt handlers for n interrupt |
83 | # Declare interrupt handlers for n interrupt |
84 | # vectors starting at vector i. |
84 | # vectors starting at vector i. |
85 | # |
85 | # |
86 | # The handlers setup data segment registers |
86 | # The handlers setup data segment registers |
87 | # and call exc_dispatch(). |
87 | # and call exc_dispatch(). |
88 | # |
88 | # |
89 | #define INTERRUPT_ALIGN 64 |
89 | #define INTERRUPT_ALIGN 128 |
90 | .macro handler i n |
90 | .macro handler i n |
91 | 91 | ||
92 | .ifeq \i-0x30 # Syscall handler |
92 | .ifeq \i-0x30 # Syscall handler |
93 | push %ds |
93 | push %ds |
94 | push %es |
94 | push %es |
95 | push %fs |
95 | push %fs |
96 | push %gs |
96 | push %gs |
97 | 97 | ||
98 | # Push arguments on stack |
98 | # Push arguments on stack |
99 | push %edi |
99 | push %edi |
100 | push %esi |
100 | push %esi |
101 | push %edx |
101 | push %edx |
102 | push %ecx |
102 | push %ecx |
103 | push %eax |
103 | push %eax |
104 | 104 | ||
105 | # we must fill the data segment registers |
105 | # we must fill the data segment registers |
106 | movw $16,%ax |
106 | movw $16,%ax |
107 | movw %ax,%ds |
107 | movw %ax,%ds |
108 | movw %ax,%es |
108 | movw %ax,%es |
109 | 109 | ||
110 | sti |
110 | sti |
- | 111 | cmp $2, %edi # Is this SYS_INT_CONTROL? |
|
- | 112 | je sys_int_ctrl |
|
- | 113 | ||
111 | call syscall_handler # syscall_handler(ax,cx,dx,si,di) |
114 | call syscall_handler # syscall_handler(ax,cx,dx,si,di) |
- | 115 | sysc_end: |
|
112 | cli |
116 | cli |
113 | addl $20, %esp # clean-up of parameters |
117 | addl $20, %esp # clean-up of parameters |
114 | 118 | ||
115 | pop %gs |
119 | pop %gs |
116 | pop %fs |
120 | pop %fs |
117 | pop %es |
121 | pop %es |
118 | pop %ds |
122 | pop %ds |
119 | 123 | ||
120 | CLEAR_NT_FLAG |
124 | CLEAR_NT_FLAG |
121 | iret |
125 | iret |
- | 126 | sys_int_ctrl: # Interrupt control |
|
- | 127 | mov %esp, %eax |
|
- | 128 | add $44, %eax |
|
- | 129 | mov %eax, 4(%esp) # Pointer to flags - 2nd argument |
|
- | 130 | call ddi_int_control |
|
- | 131 | jmp sysc_end |
|
122 | .else |
132 | .else |
123 | /* |
133 | /* |
124 | * This macro distinguishes between two versions of ia32 exceptions. |
134 | * This macro distinguishes between two versions of ia32 exceptions. |
125 | * One version has error word and the other does not have it. |
135 | * One version has error word and the other does not have it. |
126 | * The latter version fakes the error word on the stack so that the |
136 | * The latter version fakes the error word on the stack so that the |
127 | * handlers and istate_t can be the same for both types. |
137 | * handlers and istate_t can be the same for both types. |
128 | */ |
138 | */ |
129 | .iflt \i-32 |
139 | .iflt \i-32 |
130 | .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST |
140 | .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST |
131 | /* |
141 | /* |
132 | * With error word, do nothing |
142 | * With error word, do nothing |
133 | */ |
143 | */ |
134 | .else |
144 | .else |
135 | /* |
145 | /* |
136 | * Version without error word, |
146 | * Version without error word, |
137 | */ |
147 | */ |
138 | subl $4, %esp |
148 | subl $4, %esp |
139 | .endif |
149 | .endif |
140 | .else |
150 | .else |
141 | /* |
151 | /* |
142 | * Version without error word, |
152 | * Version without error word, |
143 | */ |
153 | */ |
144 | subl $4, %esp |
154 | subl $4, %esp |
145 | .endif |
155 | .endif |
146 | 156 | ||
147 | push %ds |
157 | push %ds |
148 | push %es |
158 | push %es |
149 | push %fs |
159 | push %fs |
150 | push %gs |
160 | push %gs |
151 | 161 | ||
152 | #ifdef CONFIG_DEBUG_ALLREGS |
162 | #ifdef CONFIG_DEBUG_ALLREGS |
153 | push %ebx |
163 | push %ebx |
154 | push %ebp |
164 | push %ebp |
155 | push %edi |
165 | push %edi |
156 | push %esi |
166 | push %esi |
157 | #else |
167 | #else |
158 | sub $16, %esp |
168 | sub $16, %esp |
159 | #endif |
169 | #endif |
160 | push %edx |
170 | push %edx |
161 | push %ecx |
171 | push %ecx |
162 | push %eax |
172 | push %eax |
163 | 173 | ||
164 | # we must fill the data segment registers |
174 | # we must fill the data segment registers |
165 | movw $16,%ax |
175 | movw $16,%ax |
166 | movw %ax,%ds |
176 | movw %ax,%ds |
167 | movw %ax,%es |
177 | movw %ax,%es |
168 | 178 | ||
169 | pushl %esp # *istate |
179 | pushl %esp # *istate |
170 | pushl $(\i) # intnum |
180 | pushl $(\i) # intnum |
171 | call exc_dispatch # excdispatch(intnum, *istate) |
181 | call exc_dispatch # excdispatch(intnum, *istate) |
172 | addl $8,%esp # Clear arguments from stack |
182 | addl $8,%esp # Clear arguments from stack |
173 | 183 | ||
174 | CLEAR_NT_FLAG # Modifies %ecx |
184 | CLEAR_NT_FLAG # Modifies %ecx |
175 | 185 | ||
176 | pop %eax |
186 | pop %eax |
177 | pop %ecx |
187 | pop %ecx |
178 | pop %edx |
188 | pop %edx |
179 | #ifdef CONFIG_DEBUG_ALLREGS |
189 | #ifdef CONFIG_DEBUG_ALLREGS |
180 | pop %esi |
190 | pop %esi |
181 | pop %edi |
191 | pop %edi |
182 | pop %ebp |
192 | pop %ebp |
183 | pop %ebx |
193 | pop %ebx |
184 | #else |
194 | #else |
185 | add $16, %esp |
195 | add $16, %esp |
186 | #endif |
196 | #endif |
187 | 197 | ||
188 | pop %gs |
198 | pop %gs |
189 | pop %fs |
199 | pop %fs |
190 | pop %es |
200 | pop %es |
191 | pop %ds |
201 | pop %ds |
192 | 202 | ||
193 | addl $4,%esp # Skip error word, no matter whether real or fake. |
203 | addl $4,%esp # Skip error word, no matter whether real or fake. |
194 | iret |
204 | iret |
195 | .endif |
205 | .endif |
196 | 206 | ||
197 | .align INTERRUPT_ALIGN |
207 | .align INTERRUPT_ALIGN |
198 | .if (\n-\i)-1 |
208 | .if (\n-\i)-1 |
199 | handler "(\i+1)",\n |
209 | handler "(\i+1)",\n |
200 | .endif |
210 | .endif |
201 | .endm |
211 | .endm |
202 | 212 | ||
203 | # keep in sync with pm.h !!! |
213 | # keep in sync with pm.h !!! |
204 | IDT_ITEMS=64 |
214 | IDT_ITEMS=64 |
205 | .align INTERRUPT_ALIGN |
215 | .align INTERRUPT_ALIGN |
206 | interrupt_handlers: |
216 | interrupt_handlers: |
207 | h_start: |
217 | h_start: |
208 | handler 0 IDT_ITEMS |
218 | handler 0 IDT_ITEMS |
209 | h_end: |
219 | h_end: |
210 | 220 | ||
211 | .data |
221 | .data |
212 | .global interrupt_handler_size |
222 | .global interrupt_handler_size |
213 | 223 | ||
214 | interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS |
224 | interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS |
215 | 225 |