Subversion Repositories HelenOS

Rev

Rev 1016 | Go to most recent revision | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 1016 Rev 1021
1 
#
 1 
#
2 
# Copyright (C) 2001-2004 Jakub Jermar
 2 
# Copyright (C) 2001-2004 Jakub Jermar
3 
# All rights reserved.
 3 
# All rights reserved.
4 
#
 4 
#
5 
# Redistribution and use in source and binary forms, with or without
 5 
# Redistribution and use in source and binary forms, with or without
6 
# modification, are permitted provided that the following conditions
 6 
# modification, are permitted provided that the following conditions
7 
# are met:
 7 
# are met:
8 
#
 8 
#
9 
# - Redistributions of source code must retain the above copyright
 9 
# - Redistributions of source code must retain the above copyright
10 
#   notice, this list of conditions and the following disclaimer.
 10 
#   notice, this list of conditions and the following disclaimer.
11 
# - Redistributions in binary form must reproduce the above copyright
 11 
# - Redistributions in binary form must reproduce the above copyright
12 
#   notice, this list of conditions and the following disclaimer in the
 12 
#   notice, this list of conditions and the following disclaimer in the
13 
#   documentation and/or other materials provided with the distribution.
 13 
#   documentation and/or other materials provided with the distribution.
14 
# - The name of the author may not be used to endorse or promote products
 14 
# - The name of the author may not be used to endorse or promote products
15 
#   derived from this software without specific prior written permission.
 15 
#   derived from this software without specific prior written permission.
16 
#
 16 
#
17 
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 17 
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 18 
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 19 
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 20 
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 21 
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 22 
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 23 
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 24 
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 25 
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 26 
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 
#
 27 
#
28 
 
 28 
 
29 
## very low and hardware-level functions
 29 
## very low and hardware-level functions
30 
 
 30 
 
31 
# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
 31 
# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
32 
# and 1 means interrupt with error word
 32 
# and 1 means interrupt with error word
33 
#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
 33 
#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
34 
 
 34 
 
35 
.text
 35 
.text
36 
 
 36 
 
37 
.global paging_on
 37 
.global paging_on
38 
.global enable_l_apic_in_msr
 38 
.global enable_l_apic_in_msr
39 
.global interrupt_handlers
 39 
.global interrupt_handlers
40 
 
 40 
 
41 
## Turn paging on
 41 
## Turn paging on
42 
#
 42 
#
43 
# Enable paging and write-back caching in CR0.
 43 
# Enable paging and write-back caching in CR0.
44 
#
 44 
#
45 
paging_on:
 45 
paging_on:
46 
	movl %cr0,%edx
 46 
	movl %cr0,%edx
47 
	orl $(1<<31),%edx		# paging on
 47 
	orl $(1<<31),%edx		# paging on
48 
	andl $~((1<<30)|(1<<29)),%edx	# clear Cache Disable and not Write Though
 48 
	andl $~((1<<30)|(1<<29)),%edx	# clear Cache Disable and not Write Though
49 
	movl %edx,%cr0
 49 
	movl %edx,%cr0
50 
	jmp 0f
 50 
	jmp 0f
51 
0:
 51 
0:
52 
	ret
 52 
	ret
53 
 
 53 
 
54 
 
 54 
 
55 
## Enable local APIC
 55 
## Enable local APIC
56 
#
 56 
#
57 
# Enable local APIC in MSR.
 57 
# Enable local APIC in MSR.
58 
#
 58 
#
59 
enable_l_apic_in_msr:
 59 
enable_l_apic_in_msr:
60 
	push %eax
 60 
	push %eax
61 
 
 61 
 
62 
	movl $0x1b, %ecx
 62 
	movl $0x1b, %ecx
63 
	rdmsr
 63 
	rdmsr
64 
	orl $(1<<11),%eax
 64 
	orl $(1<<11),%eax
65 
	orl $(0xfee00000),%eax
 65 
	orl $(0xfee00000),%eax
66 
	wrmsr
 66 
	wrmsr
67 
 
 67 
 
68 
	pop %eax
 68 
	pop %eax
69 
	ret
 69 
	ret
70 
 
 70 
 
71 
 
 71 
 
72 
## Declare interrupt handlers
 72 
## Declare interrupt handlers
73 
#
 73 
#
74 
# Declare interrupt handlers for n interrupt
 74 
# Declare interrupt handlers for n interrupt
75 
# vectors starting at vector i.
 75 
# vectors starting at vector i.
76 
#
 76 
#
77 
# The handlers setup data segment registers
 77 
# The handlers setup data segment registers
78 
# and call exc_dispatch().
 78 
# and call exc_dispatch().
79 
#
 79 
#
80 
.macro handler i n
 80 
.macro handler i n
81 
	push %eax
 - 
 
82 
 
 - 
 
83 
	/*
 - 
 
84 
	 * Test if this is interrupt with error word or not.
 - 
 
85 
	 * Be careful about width of the shift.
 - 
 
86 
	 */
 - 
 
87 
	.iflt \i-32
 - 
 
88 
		movl $(1<<\i), %eax
 - 
 
89 
	.else
 - 
 
90 
		movl $0, %eax
 - 
 
91 
	.endif
 - 
 
92 
	andl $ERROR_WORD_INTERRUPT_LIST, %eax
 - 
 
93 
	movl (%esp), %eax
 - 
 
94 
 
 81 
 
95 
	/*
 82 
	/*
96 
	 * If this interrupt/exception stores error word,
 83 
	 * This macro distinguishes between two versions of ia32 exceptions.
97 
	 * we need to pop EAX.
 - 
 
98 
	 * If this interrupt doesn't store error word, we emulate it
 84 
	 * One version has error word and the other does not have it.
99 
	 * for the sake of consistent istate structure. In that case
 85 
	 * The latter version fakes the error word on the stack so that the
100 
	 * we merely leave the EAX on the stack.
 86 
	 * handlers and istate_t can be the same for both types.
101 
	 */
 87 
	 */
102 
	jz 0f
 - 
 
103 
 
 88 
 
- 
 
 89 
	.iflt \i-32
- 
 
 90 
		.if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
104 
	/*
 91 
			/*
105 
	 * This exception stores error word.
 92 
			 * Version with error word.
106 
	 * Remove EAX from the stack.
 93 
			 * Just take space equal to subl $4, %esp.
107 
	 */
 94 
			 */
- 
 
 95 
			nop
- 
 
 96 
			nop
- 
 
 97 
			nop
- 
 
 98 
                .else
- 
 
 99 
                        /*
- 
 
 100 
                         * Version without error word,
- 
 
 101 
                         */
- 
 
 102 
			subl $4, %esp
- 
 
 103 
                .endif
- 
 
 104 
        .else
- 
 
 105 
                /*
- 
 
 106 
                 * Version without error word,
- 
 
 107 
                 */
108 
	addl $4, %esp
 108 
		subl $4, %esp
- 
 
 109 
        .endif
109 
 
 110 
 
110 
0:
 - 
 
111 
	pusha
 111 
	pusha
112 
	movl %esp, %ebp
 112 
	movl %esp, %ebp
113 
	push %ds
 113 
	push %ds
114 
	push %es
 114 
	push %es
115 
	push %fs
 115 
	push %fs
116 
	push %gs
 116 
	push %gs
117 
 
 117 
 
118 
	# we must fill the data segment registers
 118 
	# we must fill the data segment registers
119 
	movw $16,%ax
 119 
	movw $16,%ax
120 
	movw %ax,%ds
 120 
	movw %ax,%ds
121 
	movw %ax,%es
 121 
	movw %ax,%es
122 
 
 122 
 
123 
	pushl %ebp
 123 
	pushl %ebp
124 
	pushl $(\i)
 124 
	pushl $(\i)
125 
	call exc_dispatch
 125 
	call exc_dispatch
126 
	addl $8,%esp
 126 
	addl $8,%esp
127 
 
 127 
 
128 
	pop %gs
 128 
	pop %gs
129 
	pop %fs
 129 
	pop %fs
130 
	pop %es
 130 
	pop %es
131 
	pop %ds
 131 
	pop %ds
132 
 
 132 
 
133 
# Clear Nested Task flag.
 133 
# Clear Nested Task flag.
134 
	pushfl
 134 
	pushfl
135 
	pop %eax
 135 
	pop %eax
136 
	and $0xffffbfff,%eax
 136 
	and $0xffffbfff,%eax
137 
	push %eax
 137 
	push %eax
138 
	popfl
 138 
	popfl
139
139
140 
	popa
 140 
	popa
141 
	addl $4,%esp	# Skip error word, whether real or fake.
 141 
	addl $4,%esp	# Skip error word, no matter whether real or fake.
142 
	iret
 142 
	iret
143 
 
 143 
 
144 
	.if (\n-\i)-1
 144 
	.if (\n-\i)-1
145 
	handler "(\i+1)",\n
 145 
	handler "(\i+1)",\n
146 
	.endif
 146 
	.endif
147 
.endm
 147 
.endm
148 
 
 148 
 
149 
# keep in sync with pm.h !!!
 149 
# keep in sync with pm.h !!!
150 
IDT_ITEMS=64
 150 
IDT_ITEMS=64
151 
interrupt_handlers:
 151 
interrupt_handlers:
152 
h_start:
 152 
h_start:
153 
	handler 0 64
 153 
	handler 0 64
154 
#	handler 64 128
154 
#	handler 64 128
155 
#	handler 128 192
 155 
#	handler 128 192
156 
#	handler 192 256
 156 
#	handler 192 256
157 
h_end:
 157 
h_end:
158 
 
 158 
 
159 
.data
 159 
.data
160 
.global interrupt_handler_size
 160 
.global interrupt_handler_size
161 
 
 161 
 
162 
interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
 162 
interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
163 
 
 163