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| 1 | /* |
1 | /* |
| 2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | #ifndef __ia32_ATOMIC_H__ |
29 | #ifndef __ia32_ATOMIC_H__ |
| 30 | #define __ia32_ATOMIC_H__ |
30 | #define __ia32_ATOMIC_H__ |
| 31 | 31 | ||
| 32 | #include <arch/types.h> |
32 | #include <arch/types.h> |
| 33 | 33 | ||
| 34 | static inline void atomic_inc(volatile int *val) { |
34 | static inline void atomic_inc(volatile int *val) { |
| 35 | #ifdef __SMP__ |
35 | #ifdef __SMP__ |
| 36 | __asm__ volatile ("lock incl (%0)\n" : : "r" (val)); |
36 | __asm__ volatile ("lock incl %0\n" : "=m" (*val)); |
| 37 | #else |
37 | #else |
| 38 | __asm__ volatile ("incl (%0)\n" : : "r" (val)); |
38 | __asm__ volatile ("incl %0\n" : "=m" (*val)); |
| 39 | #endif /* __SMP__ */ |
39 | #endif /* __SMP__ */ |
| 40 | } |
40 | } |
| 41 | 41 | ||
| 42 | static inline void atomic_dec(volatile int *val) { |
42 | static inline void atomic_dec(volatile int *val) { |
| 43 | #ifdef __SMP__ |
43 | #ifdef __SMP__ |
| 44 | __asm__ volatile ("lock decl (%0)\n" : : "r" (val)); |
44 | __asm__ volatile ("lock decl %0\n" : "=m" (*val)); |
| 45 | #else |
45 | #else |
| 46 | __asm__ volatile ("decl (%0)\n" : : "r" (val)); |
46 | __asm__ volatile ("decl %0\n" : "=m" (*val)); |
| 47 | #endif /* __SMP__ */ |
47 | #endif /* __SMP__ */ |
| 48 | } |
48 | } |
| 49 | 49 | ||
| 50 | static inline int test_and_set(volatile int *val) { |
50 | static inline int test_and_set(volatile int *val) { |
| 51 | int v; |
51 | int v; |
| 52 | 52 | ||
| 53 | __asm__ volatile ( |
53 | __asm__ volatile ( |
| 54 | "movl $1, %0\n" |
54 | "movl $1, %0\n" |
| 55 | "xchgl %0, (%1)\n" |
55 | "xchgl %0, %1\n" |
| 56 | : "=r" (v) |
- | |
| 57 | : "r" (val) |
56 | : "=r" (v),"=m" (*val) |
| 58 | ); |
57 | ); |
| 59 | 58 | ||
| 60 | return v; |
59 | return v; |
| 61 | } |
60 | } |
| 62 | 61 | ||
| 63 | 62 | ||
| 64 | extern void spinlock_arch(volatile int *val); |
63 | extern void spinlock_arch(volatile int *val); |
| 65 | 64 | ||
| 66 | #endif |
65 | #endif |
| 67 | 66 | ||