WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia32/include/asm.h


/*
 * Copyright (C) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef __ia32_ASM_H__
#define __ia32_ASM_H__
 
#include <arch/types.h>
#include <config.h>
 
extern __u32 interrupt_handler_size;
 
extern void paging_on(void);
 
extern void interrupt_handlers(void);
 
extern void enable_l_apic_in_msr(void);
 
 
void asm_delay_loop(__u32 t);
void asm_fake_loop(__u32 t);
 
 
/** Halt CPU
 *
 * Halt the current CPU until interrupt event.
 */
static inline void cpu_halt(void) { __asm__("hlt\n"); };
static inline void cpu_sleep(void) { __asm__("hlt\n"); };
 
/** Read CR2
 *
 * Return value in CR2
 *
 * @return Value read.
 */
static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; }
 
/** Write CR3
 *
 * Write value to CR3.
 *
 * @param v Value to be written.
 */
static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
 
/** Read CR3
 *
 * Return value in CR3
 *
 * @return Value read.
 */
static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; }
 
/** Byte to port
 *
 * Output byte to port
 *
 * @param port Port to write to
 * @param val Value to write
 */
static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
 
/** Word to port
 *
 * Output word to port
 *
 * @param port Port to write to
 * @param val Value to write
 */
static inline void outw(__u16 port, __u16 val) { __asm__ volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
 
/** Double word to port
 *
 * Output double word to port
 *
 * @param port Port to write to
 * @param val Value to write
 */
static inline void outl(__u16 port, __u32 val) { __asm__ volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
 
/** Byte from port
 *
 * Get byte from port
 *
 * @param port Port to read from
 * @return Value read
 */
static inline __u8 inb(__u16 port) { __u8 val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
 
/** Word from port
 *
 * Get word from port
 *
 * @param port Port to read from
 * @return Value read
 */
static inline __u16 inw(__u16 port) { __u16 val; __asm__ volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
 
/** Double word from port
 *
 * Get double word from port
 *
 * @param port Port to read from
 * @return Value read
 */
static inline __u32 inl(__u16 port) { __u32 val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
 
/** Set priority level low
 *
 * Enable interrupts and return previous
 * value of EFLAGS.
 */
static inline pri_t cpu_priority_low(void) {
    pri_t v;
    __asm__ volatile (
        "pushf\n\t"
        "popl %0\n\t"
        "sti\n"
        : "=r" (v)
    );
    return v;
}
 
/** Set priority level high
 *
 * Disable interrupts and return previous
 * value of EFLAGS.
 */
static inline pri_t cpu_priority_high(void) {
    pri_t v;
    __asm__ volatile (
        "pushf\n\t"
        "popl %0\n\t"
        "cli\n"
        : "=r" (v)
    );
    return v;
}
 
/** Restore priority level
 *
 * Restore EFLAGS.
 */
static inline void cpu_priority_restore(pri_t pri) {
    __asm__ volatile (
        "pushl %0\n\t"
        "popf\n"
        : : "r" (pri)
    );
}
 
/** Return raw priority level
 *
 * Return EFLAFS.
 */
static inline pri_t cpu_priority_read(void) {
    pri_t v;
    __asm__ volatile (
        "pushf\n\t"
        "popl %0\n"
        : "=r" (v)
    );
    return v;
}
 
/** Return base address of current stack
 *
 * Return the base address of the current stack.
 * The stack is assumed to be STACK_SIZE bytes long.
 * The stack must start on page boundary.
 */
static inline __address get_stack_base(void)
{
    __address v;
   
    __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
   
    return v;
}
 
static inline __u64 rdtsc(void)
{
    __u64 v;
   
    __asm__ volatile("rdtsc\n" : "=A" (v));
   
    return v;
}
 
/** Copy memory
 *
 * Copy a given number of bytes (3rd argument)
 * from the memory location defined by 2nd argument
 * to the memory location defined by 1st argument.
 * The memory areas cannot overlap.
 *
 * @param destination
 * @param source
 * @param number of bytes
 * @return destination
 */
static inline void * memcpy(void * dst, const void * src, size_t cnt)
{
    __u32 d0, d1, d2;
   
    __asm__ __volatile__(
        "rep movsl\n\t"
        "movl %4, %%ecx\n\t"
        "andl $3, %%ecx\n\t"
        "jz 1f\n\t"
        "rep movsb\n\t"
        "1:\n"
        : "=&c" (d0), "=&D" (d1), "=&S" (d2)
        : "0" (cnt / 4), "g" (cnt), "1" ((__u32) dst), "2" ((__u32) src)
        : "memory");
       
    return dst;
}
 
 
#endif
 

Rev 356	Rev 358
1	/*	1	/*
2	* Copyright (C) 2001-2004 Jakub Jermar	2	* Copyright (C) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#ifndef __ia32_ASM_H__	29	#ifndef __ia32_ASM_H__
30	#define __ia32_ASM_H__	30	#define __ia32_ASM_H__
31		31
32	#include <arch/types.h>	32	#include <arch/types.h>
33	#include <config.h>	33	#include <config.h>
34		34
35	extern __u32 interrupt_handler_size;	35	extern __u32 interrupt_handler_size;
36		36
37	extern void paging_on(void);	37	extern void paging_on(void);
38		38
39	extern void interrupt_handlers(void);	39	extern void interrupt_handlers(void);
40		40
41	extern void enable_l_apic_in_msr(void);	41	extern void enable_l_apic_in_msr(void);
42		42
43		43
44	void asm_delay_loop(__u32 t);	44	void asm_delay_loop(__u32 t);
45	void asm_fake_loop(__u32 t);	45	void asm_fake_loop(__u32 t);
46		46
47		47
48	/** Halt CPU	48	/** Halt CPU
49	*	49	*
50	* Halt the current CPU until interrupt event.	50	* Halt the current CPU until interrupt event.
51	*/	51	*/
52	static inline void cpu_halt(void) { __asm__("hlt\n"); };	52	static inline void cpu_halt(void) { __asm__("hlt\n"); };
53	static inline void cpu_sleep(void) { __asm__("hlt\n"); };	53	static inline void cpu_sleep(void) { __asm__("hlt\n"); };
54		54
55	/** Read CR2	55	/** Read CR2
56	*	56	*
57	* Return value in CR2	57	* Return value in CR2
58	*	58	*
59	* @return Value read.	59	* @return Value read.
60	*/	60	*/
61	static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; }	61	static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; }
62		62
63	/** Write CR3	63	/** Write CR3
64	*	64	*
65	* Write value to CR3.	65	* Write value to CR3.
66	*	66	*
67	* @param v Value to be written.	67	* @param v Value to be written.
68	*/	68	*/
69	static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }	69	static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
70		70
71	/** Read CR3	71	/** Read CR3
72	*	72	*
73	* Return value in CR3	73	* Return value in CR3
74	*	74	*
75	* @return Value read.	75	* @return Value read.
76	*/	76	*/
77	static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; }	77	static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; }
78		78
79	/** Byte to port	79	/** Byte to port
80	*	80	*
81	* Output byte to port	81	* Output byte to port
82	*	82	*
83	* @param port Port to write to	83	* @param port Port to write to
84	* @param val Value to write	84	* @param val Value to write
85	*/	85	*/
86	static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }	86	static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
87		87
88	/** Word to port	88	/** Word to port
89	*	89	*
90	* Output word to port	90	* Output word to port
91	*	91	*
92	* @param port Port to write to	92	* @param port Port to write to
93	* @param val Value to write	93	* @param val Value to write
94	*/	94	*/
95	static inline void outw(__u16 port, __u16 val) { __asm__ volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }	95	static inline void outw(__u16 port, __u16 val) { __asm__ volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
96		96
97	/** Double word to port	97	/** Double word to port
98	*	98	*
99	* Output double word to port	99	* Output double word to port
100	*	100	*
101	* @param port Port to write to	101	* @param port Port to write to
102	* @param val Value to write	102	* @param val Value to write
103	*/	103	*/
104	static inline void outl(__u16 port, __u32 val) { __asm__ volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }	104	static inline void outl(__u16 port, __u32 val) { __asm__ volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
105		105
106	/** Byte from port	106	/** Byte from port
107	*	107	*
108	* Get byte from port	108	* Get byte from port
109	*	109	*
110	* @param port Port to read from	110	* @param port Port to read from
111	* @return Value read	111	* @return Value read
112	*/	112	*/
113	static inline __u8 inb(__u16 port) { __u8 val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }	113	static inline __u8 inb(__u16 port) { __u8 val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
114		114
115	/** Word from port	115	/** Word from port
116	*	116	*
117	* Get word from port	117	* Get word from port
118	*	118	*
119	* @param port Port to read from	119	* @param port Port to read from
120	* @return Value read	120	* @return Value read
121	*/	121	*/
122	static inline __u16 inw(__u16 port) { __u16 val; __asm__ volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }	122	static inline __u16 inw(__u16 port) { __u16 val; __asm__ volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
123		123
124	/** Double word from port	124	/** Double word from port
125	*	125	*
126	* Get double word from port	126	* Get double word from port
127	*	127	*
128	* @param port Port to read from	128	* @param port Port to read from
129	* @return Value read	129	* @return Value read
130	*/	130	*/
131	static inline __u32 inl(__u16 port) { __u32 val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }	131	static inline __u32 inl(__u16 port) { __u32 val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
132		132
133	/** Set priority level low	133	/** Set priority level low
134	*	134	*
135	* Enable interrupts and return previous	135	* Enable interrupts and return previous
136	* value of EFLAGS.	136	* value of EFLAGS.
137	*/	137	*/
138	static inline pri_t cpu_priority_low(void) {	138	static inline pri_t cpu_priority_low(void) {
139	pri_t v;	139	pri_t v;
140	__asm__ volatile (	140	__asm__ volatile (
141	"pushf\n"	141	"pushf\n\t"
142	"popl %0\n"	142	"popl %0\n\t"
143	"sti\n"	143	"sti\n"
144	: "=r" (v)	144	: "=r" (v)
145	);	145	);
146	return v;	146	return v;
147	}	147	}
148		148
149	/** Set priority level high	149	/** Set priority level high
150	*	150	*
151	* Disable interrupts and return previous	151	* Disable interrupts and return previous
152	* value of EFLAGS.	152	* value of EFLAGS.
153	*/	153	*/
154	static inline pri_t cpu_priority_high(void) {	154	static inline pri_t cpu_priority_high(void) {
155	pri_t v;	155	pri_t v;
156	__asm__ volatile (	156	__asm__ volatile (
157	"pushf\n"	157	"pushf\n\t"
158	"popl %0\n"	158	"popl %0\n\t"
159	"cli\n"	159	"cli\n"
160	: "=r" (v)	160	: "=r" (v)
161	);	161	);
162	return v;	162	return v;
163	}	163	}
164		164
165	/** Restore priority level	165	/** Restore priority level
166	*	166	*
167	* Restore EFLAGS.	167	* Restore EFLAGS.
168	*/	168	*/
169	static inline void cpu_priority_restore(pri_t pri) {	169	static inline void cpu_priority_restore(pri_t pri) {
170	__asm__ volatile (	170	__asm__ volatile (
171	"pushl %0\n"	171	"pushl %0\n\t"
172	"popf\n"	172	"popf\n"
173	: : "r" (pri)	173	: : "r" (pri)
174	);	174	);
175	}	175	}
176		176
177	/** Return raw priority level	177	/** Return raw priority level
178	*	178	*
179	* Return EFLAFS.	179	* Return EFLAFS.
180	*/	180	*/
181	static inline pri_t cpu_priority_read(void) {	181	static inline pri_t cpu_priority_read(void) {
182	pri_t v;	182	pri_t v;
183	__asm__ volatile (	183	__asm__ volatile (
184	"pushf\n"	184	"pushf\n\t"
185	"popl %0\n"	185	"popl %0\n"
186	: "=r" (v)	186	: "=r" (v)
187	);	187	);
188	return v;	188	return v;
189	}	189	}
190		190
191	/** Return base address of current stack	191	/** Return base address of current stack
192	*	192	*
193	* Return the base address of the current stack.	193	* Return the base address of the current stack.
194	* The stack is assumed to be STACK_SIZE bytes long.	194	* The stack is assumed to be STACK_SIZE bytes long.
195	* The stack must start on page boundary.	195	* The stack must start on page boundary.
196	*/	196	*/
197	static inline __address get_stack_base(void)	197	static inline __address get_stack_base(void)
198	{	198	{
199	__address v;	199	__address v;
200		200
201	__asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));	201	__asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
202		202
203	return v;	203	return v;
204	}	204	}
205		205
206	static inline __u64 rdtsc(void)	206	static inline __u64 rdtsc(void)
207	{	207	{
208	__u64 v;	208	__u64 v;
209		209
210	__asm__ volatile("rdtsc\n" : "=A" (v));	210	__asm__ volatile("rdtsc\n" : "=A" (v));
211		211
212	return v;	212	return v;
213	}	213	}
-		214
-		215	/** Copy memory
-		216	*
-		217	* Copy a given number of bytes (3rd argument)
-		218	* from the memory location defined by 2nd argument
-		219	* to the memory location defined by 1st argument.
-		220	* The memory areas cannot overlap.
-		221	*
-		222	* @param destination
-		223	* @param source
-		224	* @param number of bytes
-		225	* @return destination
-		226	*/
-		227	static inline void * memcpy(void * dst, const void * src, size_t cnt)
-		228	{
-		229	__u32 d0, d1, d2;
-		230
-		231	__asm__ __volatile__(
-		232	"rep movsl\n\t"
-		233	"movl %4, %%ecx\n\t"
-		234	"andl $3, %%ecx\n\t"
-		235	"jz 1f\n\t"
-		236	"rep movsb\n\t"
-		237	"1:\n"
-		238	: "=&c" (d0), "=&D" (d1), "=&S" (d2)
-		239	: "0" (cnt / 4), "g" (cnt), "1" ((__u32) dst), "2" ((__u32) src)
-		240	: "memory");
-		241
-		242	return dst;
-		243	}
214		244
215		245
216	#endif	246	#endif
217		247

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(root)/kernel/trunk/arch/ia32/include/asm.h @ 1780 – Rev 356 → 358