WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia32/include/asm.h


/*
 * Copyright (C) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef __ia32_ASM_H__
#define __ia32_ASM_H__
 
#include <arch/types.h>
#include <typedefs.h>
#include <config.h>
#include <synch/spinlock.h>
#include <arch/boot/memmap.h>
#include <config.h>
 
extern __u32 interrupt_handler_size;
 
extern void paging_on(void);
 
extern void interrupt_handlers(void);
 
extern __u8 inb(int port);
extern __u16 inw(int port);
extern __u32 inl(int port);
 
extern void outb(int port, __u8 b);
extern void outw(int port, __u16 w);
extern void outl(int port, __u32 l);
 
extern void enable_l_apic_in_msr(void);
 
 
void asm_delay_loop(__u32 t);
void asm_fake_loop(__u32 t);
 
 
/** Halt CPU
 *
 * Halt the current CPU until interrupt event.
 */
static inline void cpu_halt(void) { __asm__("hlt"); };
static inline void cpu_sleep(void) { __asm__("hlt"); };
 
/** Read CR2
 *
 * Return value in CR2
 *
 * @return Value read.
 */
static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0" : "=r" (v)); return v; }
 
/** Write CR3
 *
 * Write value to CR3.
 *
 * @param v Value to be written.
 */
static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
 
/** Read CR3
 *
 * Return value in CR3
 *
 * @return Value read.
 */
static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0" : "=r" (v)); return v; }
 
/** Set priority level low
 *
 * Enable interrupts and return previous
 * value of EFLAGS.
 */
static inline pri_t cpu_priority_low(void) {
    pri_t v;
    __asm__ volatile (
        "pushf\n"
        "popl %0\n"
        "sti\n"
        : "=r" (v)
    );
    return v;
}
 
/** Set priority level high
 *
 * Disable interrupts and return previous
 * value of EFLAGS.
 */
static inline pri_t cpu_priority_high(void) {
    pri_t v;
    __asm__ volatile (
        "pushf\n"
        "popl %0\n"
        "cli\n"
        : "=r" (v)
    );
    return v;
}
 
/** Restore priority level
 *
 * Restore EFLAGS.
 */
static inline void cpu_priority_restore(pri_t pri) {
    __asm__ volatile (
        "pushl %0\n"
        "popf\n"
        : : "r" (pri)
    );
}
 
/** Return raw priority level
 *
 * Return EFLAFS.
 */
static inline pri_t cpu_priority_read(void) {
    pri_t v;
    __asm__ volatile (
        "pushf\n"
        "popl %0\n"
        : "=r" (v)
    );
    return v;
}
 
/** Return base address of current stack
 *
 * Return the base address of the current stack.
 * The stack is assumed to be STACK_SIZE bytes long.
 * The stack must start on page boundary.
 */
static inline __address get_stack_base(void)
{
    __address v;
   
    __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
   
    return v;
}
 
#endif
 

Rev 192	Rev 195
1	/*	1	/*
2	* Copyright (C) 2001-2004 Jakub Jermar	2	* Copyright (C) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#ifndef __ia32_ASM_H__	29	#ifndef __ia32_ASM_H__
30	#define __ia32_ASM_H__	30	#define __ia32_ASM_H__
31		31
32	#include <arch/types.h>	32	#include <arch/types.h>
33	#include <typedefs.h>	33	#include <typedefs.h>
34	#include <config.h>	34	#include <config.h>
35	#include <synch/spinlock.h>	35	#include <synch/spinlock.h>
36	#include <arch/boot/memmap.h>	36	#include <arch/boot/memmap.h>
37	#include <config.h>	37	#include <config.h>
38		38
39	extern __u32 interrupt_handler_size;	39	extern __u32 interrupt_handler_size;
40		40
41	extern void paging_on(void);	41	extern void paging_on(void);
42		42
43	extern void interrupt_handlers(void);	43	extern void interrupt_handlers(void);
44		44
45	extern __u8 inb(int port);	45	extern __u8 inb(int port);
46	extern __u16 inw(int port);	46	extern __u16 inw(int port);
47	extern __u32 inl(int port);	47	extern __u32 inl(int port);
48		48
49	extern void outb(int port, __u8 b);	49	extern void outb(int port, __u8 b);
50	extern void outw(int port, __u16 w);	50	extern void outw(int port, __u16 w);
51	extern void outl(int port, __u32 l);	51	extern void outl(int port, __u32 l);
52		52
53	extern void enable_l_apic_in_msr(void);	53	extern void enable_l_apic_in_msr(void);
54		54
-		55
-		56	void asm_delay_loop(__u32 t);
-		57	void asm_fake_loop(__u32 t);
-		58
-		59
55	/** Halt CPU	60	/** Halt CPU
56	*	61	*
57	* Halt the current CPU until interrupt event.	62	* Halt the current CPU until interrupt event.
58	*/	63	*/
59	static inline void cpu_halt(void) { __asm__("hlt"); };	64	static inline void cpu_halt(void) { __asm__("hlt"); };
60	static inline void cpu_sleep(void) { __asm__("hlt"); };	65	static inline void cpu_sleep(void) { __asm__("hlt"); };
61		66
62	/** Read CR2	67	/** Read CR2
63	*	68	*
64	* Return value in CR2	69	* Return value in CR2
65	*	70	*
66	* @return Value read.	71	* @return Value read.
67	*/	72	*/
68	static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0" : "=r" (v)); return v; }	73	static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0" : "=r" (v)); return v; }
69		74
70	/** Write CR3	75	/** Write CR3
71	*	76	*
72	* Write value to CR3.	77	* Write value to CR3.
73	*	78	*
74	* @param v Value to be written.	79	* @param v Value to be written.
75	*/	80	*/
76	static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }	81	static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
77		82
78	/** Read CR3	83	/** Read CR3
79	*	84	*
80	* Return value in CR3	85	* Return value in CR3
81	*	86	*
82	* @return Value read.	87	* @return Value read.
83	*/	88	*/
84	static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0" : "=r" (v)); return v; }	89	static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0" : "=r" (v)); return v; }
85		90
86	/** Set priority level low	91	/** Set priority level low
87	*	92	*
88	* Enable interrupts and return previous	93	* Enable interrupts and return previous
89	* value of EFLAGS.	94	* value of EFLAGS.
90	*/	95	*/
91	static inline pri_t cpu_priority_low(void) {	96	static inline pri_t cpu_priority_low(void) {
92	pri_t v;	97	pri_t v;
93	__asm__ volatile (	98	__asm__ volatile (
94	"pushf\n"	99	"pushf\n"
95	"popl %0\n"	100	"popl %0\n"
96	"sti\n"	101	"sti\n"
97	: "=r" (v)	102	: "=r" (v)
98	);	103	);
99	return v;	104	return v;
100	}	105	}
101		106
102	/** Set priority level high	107	/** Set priority level high
103	*	108	*
104	* Disable interrupts and return previous	109	* Disable interrupts and return previous
105	* value of EFLAGS.	110	* value of EFLAGS.
106	*/	111	*/
107	static inline pri_t cpu_priority_high(void) {	112	static inline pri_t cpu_priority_high(void) {
108	pri_t v;	113	pri_t v;
109	__asm__ volatile (	114	__asm__ volatile (
110	"pushf\n"	115	"pushf\n"
111	"popl %0\n"	116	"popl %0\n"
112	"cli\n"	117	"cli\n"
113	: "=r" (v)	118	: "=r" (v)
114	);	119	);
115	return v;	120	return v;
116	}	121	}
117		122
118	/** Restore priority level	123	/** Restore priority level
119	*	124	*
120	* Restore EFLAGS.	125	* Restore EFLAGS.
121	*/	126	*/
122	static inline void cpu_priority_restore(pri_t pri) {	127	static inline void cpu_priority_restore(pri_t pri) {
123	__asm__ volatile (	128	__asm__ volatile (
124	"pushl %0\n"	129	"pushl %0\n"
125	"popf\n"	130	"popf\n"
126	: : "r" (pri)	131	: : "r" (pri)
127	);	132	);
128	}	133	}
129		134
130	/** Return raw priority level	135	/** Return raw priority level
131	*	136	*
132	* Return EFLAFS.	137	* Return EFLAFS.
133	*/	138	*/
134	static inline pri_t cpu_priority_read(void) {	139	static inline pri_t cpu_priority_read(void) {
135	pri_t v;	140	pri_t v;
136	__asm__ volatile (	141	__asm__ volatile (
137	"pushf\n"	142	"pushf\n"
138	"popl %0\n"	143	"popl %0\n"
139	: "=r" (v)	144	: "=r" (v)
140	);	145	);
141	return v;	146	return v;
142	}	147	}
143		148
144	/** Return base address of current stack	149	/** Return base address of current stack
145	*	150	*
146	* Return the base address of the current stack.	151	* Return the base address of the current stack.
147	* The stack is assumed to be STACK_SIZE bytes long.	152	* The stack is assumed to be STACK_SIZE bytes long.
148	* The stack must start on page boundary.	153	* The stack must start on page boundary.
149	*/	154	*/
150	static inline __address get_stack_base(void)	155	static inline __address get_stack_base(void)
151	{	156	{
152	__address v;	157	__address v;
153		158
154	__asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));	159	__asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
155		160
156	return v;	161	return v;
157	}	162	}
158		163
159	#endif	164	#endif
160		165

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia32/include/asm.h @ 1780 – Rev 192 → 195