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/*
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/*
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 * Copyright (C) 2001-2004 Jakub Jermar
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 * Copyright (C) 2001-2004 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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#ifndef __ia32_ASM_H__
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#ifndef __ia32_ASM_H__
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#define __ia32_ASM_H__
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#define __ia32_ASM_H__
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#include <arch/types.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <typedefs.h>
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#include <mm/page.h>
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#include <mm/page.h>
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#include <synch/spinlock.h>
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#include <synch/spinlock.h>
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extern __u32 interrupt_handler_size;
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extern __u32 interrupt_handler_size;
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extern void paging_on(void);
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extern void paging_on(void);
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extern __address cpu_read_dba(void);
 - 
 
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extern void cpu_write_dba(__address dba);
 - 
 
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 - 
 
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extern __address cpu_read_cr2(void);
 - 
 
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extern void interrupt_handlers(void);
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extern void interrupt_handlers(void);
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extern __u8 inb(int port);
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extern __u8 inb(int port);
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extern __u16 inw(int port);
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extern __u16 inw(int port);
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extern __u32 inl(int port);
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extern __u32 inl(int port);
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extern void outb(int port, __u8 b);
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extern void outb(int port, __u8 b);
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extern void outw(int port, __u16 w);
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extern void outw(int port, __u16 w);
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extern void outl(int port, __u32 l);
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extern void outl(int port, __u32 l);
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extern void enable_l_apic_in_msr(void);
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extern void enable_l_apic_in_msr(void);
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- 
 
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/** Halt CPU
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 *
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 * Halt the current CPU until interrupt event.
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 */
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extern void halt_cpu(void);
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static inline void cpu_halt(void) { __asm__("hlt"); };
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extern void cpu_sleep(void);
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static inline void cpu_sleep(void) { __asm__("hlt"); };
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/** Read CR2
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 *
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 * Return value in CR2
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 *
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 * @return Value read.
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 */
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static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0" : "=r" (v)); return v; }
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/** Write CR3
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 *
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 * Write value to CR3.
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 *
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 * @param v Value to be written.
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 */
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static inline void write_dr0(__u32 v);
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static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
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/** Read CR3
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 *
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 * Return value in CR3
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 *
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static inline __u32 read_dr0(void);
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 * @return Value read.
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 */
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static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0" : "=r" (v)); return v; }
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/** Write DR0
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 *
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 * Write value to DR0.
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 *
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 * @param v Value to be written.
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 */
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inline void write_dr0(__u32 v) { __asm__ volatile ("movl %0,%%dr0\n" : : "r" (v)); }
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static inline void write_dr0(__u32 v) { __asm__ volatile ("movl %0,%%dr0\n" : : "r" (v)); }
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/** Read DR0
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 *
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 * Return value in DR0
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 *
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 * @return Value read.
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 */
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inline __u32 read_dr0(void) { __u32 v; __asm__ volatile ("movl %%dr0,%0" : "=r" (v)); return v; }
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static inline __u32 read_dr0(void) { __u32 v; __asm__ volatile ("movl %%dr0,%0" : "=r" (v)); return v; }
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/** Set priority level low
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 *
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 * Enable interrupts and return previous
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 * value of EFLAGS.
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 */
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static inline pri_t cpu_priority_low(void) {
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    pri_t v;
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    __asm__ volatile (
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        "pushf\n"
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        "popl %0\n"
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        "sti\n"
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        : "=r" (v)
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    );
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    return v;
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}
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/** Set priority level high
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 *
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 * Disable interrupts and return previous
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 * value of EFLAGS.
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 */
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static inline pri_t cpu_priority_high(void) {
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    pri_t v;
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    __asm__ volatile (
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        "pushf\n"
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        "popl %0\n"
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        "cli\n"
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        : "=r" (v)
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    );
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    return v;
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}
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/** Restore priority level
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 *
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 * Restore EFLAGS.
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 */
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static inline void cpu_priority_restore(pri_t pri) {
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    __asm__ volatile (
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        "pushl %0\n"
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        "popf\n"
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        : : "r" (pri)
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    );
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}
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/** Return raw priority level
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 *
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 * Return EFLAFS.
- 
 
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 */
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static inline pri_t cpu_priority_read(void) {
- 
 
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    pri_t v;
- 
 
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    __asm__ volatile (
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        "pushf\n"
- 
 
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        "popl %0\n"
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        : "=r" (v)
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    );
- 
 
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    return v;
- 
 
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}
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#endif
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#endif
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