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#
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#
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# Copyright (C) 2005 Ondrej Palkovsky
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# Copyright (C) 2005 Ondrej Palkovsky
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# modification, are permitted provided that the following conditions
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# are met:
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# are met:
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#
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#
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# - Redistributions of source code must retain the above copyright
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#   derived from this software without specific prior written permission.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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#  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
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#  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
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# and 1 means interrupt with error word
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# and 1 means interrupt with error word
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#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
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#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
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#include <arch/pm.h>
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#include <arch/pm.h>
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#include <arch/context_offset.h>
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.text
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.text
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.global interrupt_handlers
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.global interrupt_handlers
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.global panic_printf
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.global panic_printf
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panic_printf:
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panic_printf:
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	movq $halt, (%rsp)
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	movq $halt, (%rsp)
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	jmp printf
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	jmp printf
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.global memcpy
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.global memcpy
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memcpy:
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memcpy:
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	jmp _memcpy
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	jmp _memcpy
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.global cpuid
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.global cpuid
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.global has_cpuid
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.global has_cpuid
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.global rdtsc
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.global rdtsc
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.global read_efer_flag
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.global read_efer_flag
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.global set_efer_flag
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.global set_efer_flag
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## Determine CPUID support
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## Determine CPUID support
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#
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#
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# Return 0 in EAX if CPUID is not support, 1 if supported.
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# Return 0 in EAX if CPUID is not support, 1 if supported.
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#
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#
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has_cpuid:
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has_cpuid:
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	pushfq			# store flags
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	pushfq			# store flags
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	popq %rax		# read flags
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	popq %rax		# read flags
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	movq %rax,%rdx		# copy flags
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	movq %rax,%rdx		# copy flags
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	btcl $21,%edx		# swap the ID bit
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	btcl $21,%edx		# swap the ID bit
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	pushq %rdx
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	pushq %rdx
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	popfq			# propagate the change into flags
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	popfq			# propagate the change into flags
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	pushfq
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	pushfq
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	popq %rdx		# read flags
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	popq %rdx		# read flags
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	andl $(1<<21),%eax	# interested only in ID bit
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	andl $(1<<21),%eax	# interested only in ID bit
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	andl $(1<<21),%edx
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	andl $(1<<21),%edx
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	xorl %edx,%eax		# 0 if not supported, 1 if supported
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	xorl %edx,%eax		# 0 if not supported, 1 if supported
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	ret
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	ret
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cpuid:
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cpuid:
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	movq %rbx, %r10  # we have to preserve rbx across function calls
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	movq %rbx, %r10  # we have to preserve rbx across function calls
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	movl %edi,%eax	# load the command into %eax
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	movl %edi,%eax	# load the command into %eax
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	cpuid
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	cpuid
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	movl %eax,0(%rsi)
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	movl %eax,0(%rsi)
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	movl %ebx,4(%rsi)
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	movl %ebx,4(%rsi)
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	movl %ecx,8(%rsi)
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	movl %ecx,8(%rsi)
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	movl %edx,12(%rsi)
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	movl %edx,12(%rsi)
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	movq %r10, %rbx
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	movq %r10, %rbx
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	ret
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	ret
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rdtsc:
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rdtsc:
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	xorq %rax,%rax
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	xorq %rax,%rax
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	rdtsc
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	rdtsc
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	ret
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	ret
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set_efer_flag:
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set_efer_flag:
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	movq $0xc0000080, %rcx
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	movq $0xc0000080, %rcx
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	rdmsr
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	rdmsr
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	btsl %edi, %eax
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	btsl %edi, %eax
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	wrmsr
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	wrmsr
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	ret
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	ret
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read_efer_flag:
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read_efer_flag:
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	movq $0xc0000080, %rcx
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	movq $0xc0000080, %rcx
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	rdmsr
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	rdmsr
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	ret
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	ret
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# Push all general purpose registers on stack except %rbp, %rsp
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# Push all general purpose registers on stack except %rbp, %rsp
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.macro push_all_gpr
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.macro save_all_gpr
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	movq %rbp, IOFFSET_RBP(%rsp)
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	pushq %rax
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	movq %rax, IOFFSET_RAX(%rsp)
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	pushq %rbx
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	movq %rbx, IOFFSET_RBX(%rsp)
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	pushq %rcx
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	movq %rcx, IOFFSET_RCX(%rsp)
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	pushq %rdx
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	movq %rdx, IOFFSET_RDX(%rsp)
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	pushq %rsi
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	movq %rsi, IOFFSET_RSI(%rsp)
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	pushq %rdi
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	movq %rdi, IOFFSET_RDI(%rsp)
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	pushq %r8
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	movq %r8, IOFFSET_R8(%rsp)
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	pushq %r9
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	movq %r9, IOFFSET_R9(%rsp)
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	pushq %r10
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	movq %r10, IOFFSET_R10(%rsp)
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	pushq %r11
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	movq %r11, IOFFSET_R11(%rsp)
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	pushq %r12
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	movq %r12, IOFFSET_R12(%rsp)
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	pushq %r13
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	movq %r13, IOFFSET_R13(%rsp)
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	pushq %r14
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	movq %r14, IOFFSET_R14(%rsp)
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	pushq %r15
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	movq %r15, IOFFSET_R15(%rsp)
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.endm
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.endm
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.macro pop_all_gpr
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.macro restore_all_gpr
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	popq %r15
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	movq IOFFSET_RBP(%rsp), %rbp
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	popq %r14
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	movq IOFFSET_RAX(%rsp), %rax
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	popq %r13
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	movq IOFFSET_RBX(%rsp), %rbx
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	popq %r12
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	movq IOFFSET_RCX(%rsp), %rcx
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	popq %r11
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	movq IOFFSET_RDX(%rsp), %rdx
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	popq %r10
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	movq IOFFSET_RSI(%rsp), %rsi
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	popq %r9
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	movq IOFFSET_RDI(%rsp), %rdi
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	popq %r8
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	movq IOFFSET_R8(%rsp), %r8
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	popq %rdi
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	movq IOFFSET_R9(%rsp), %r9
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	movq IOFFSET_R10(%rsp), %r10
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	popq %rsi
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	movq IOFFSET_R11(%rsp), %r11
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	popq %rdx
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	movq IOFFSET_R12(%rsp), %r12
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	popq %rcx
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	movq IOFFSET_R13(%rsp), %r13
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	popq %rbx
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	movq IOFFSET_R14(%rsp), %r14
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	popq %rax
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	movq IOFFSET_R15(%rsp), %r15
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.endm
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.endm
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## Declare interrupt handlers
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## Declare interrupt handlers
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#
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#
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# Declare interrupt handlers for n interrupt
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# Declare interrupt handlers for n interrupt
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# vectors starting at vector i.
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# vectors starting at vector i.
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#
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#
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# The handlers setup data segment registers
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# The handlers setup data segment registers
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# and call exc_dispatch().
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# and call exc_dispatch().
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#
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#
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.macro handler i n
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.macro handler i n
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	pushq %rbp
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	movq %rsp,%rbp
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	subq $IREGISTER_SPACE, %rsp
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	push_all_gpr
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	save_all_gpr
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	movq $(\i),%rdi   # %rdi - first parameter
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	movq $(\i),%rdi   # %rdi - first parameter
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	movq %rbp, %rsi
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	addq $8, %rsi     # %rsi - second parameter - original stack
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	movq %rsp, %rsi   # %rsi - pointer to interrupt_context
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	call exc_dispatch 	# exc_dispatch(i, stack)
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	call exc_dispatch 	# exc_dispatch(i, stack)
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# Test if this is interrupt with error word or not
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# Test if this is interrupt with error word or not
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	mov $\i,%cl;
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	mov $\i,%cl;
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	movl $1,%eax;
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	movl $1,%eax;
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	test $0xe0,%cl;
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	test $0xe0,%cl;
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	jnz 0f;
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	jnz 0f;
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	and $0x1f,%cl;
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	and $0x1f,%cl;
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	shl %cl,%eax;
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	shl %cl,%eax;
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	and $ERROR_WORD_INTERRUPT_LIST,%eax;
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	and $ERROR_WORD_INTERRUPT_LIST,%eax;
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	jz 0f;
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	jz 0f;
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# Return with error word
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# Return with error word
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	pop_all_gpr
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	restore_all_gpr
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	popq %rbp;
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	# $8 = Skip error word
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	addq $8,%rsp;    # Skip error word
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	addq $IREGISTER_SPACE + 0x8, %rsp
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	iretq
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	iretq
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0:
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0:
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# Return with no error word
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# Return with no error word
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	pop_all_gpr
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	restore_all_gpr
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	popq %rbp
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	addq $IREGISTER_SPACE, %rsp
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	iretq
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	iretq
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	.if (\n-\i)-1
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	.if (\n-\i)-1
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	handler "(\i+1)",\n
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	handler "(\i+1)",\n
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	.endif
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	.endif
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.endm
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.endm
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interrupt_handlers:
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interrupt_handlers:
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h_start:
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h_start:
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	handler 0 IDT_ITEMS
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	handler 0 IDT_ITEMS
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h_end:
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h_end:
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.data
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.data
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.global interrupt_handler_size
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.global interrupt_handler_size
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interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
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interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
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