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1 | # |
1 | # |
2 | # Copyright (C) 2005 Ondrej Palkovsky |
2 | # Copyright (C) 2005 Ondrej Palkovsky |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | #define IREGISTER_SPACE 120 |
29 | #define IREGISTER_SPACE 120 |
30 | 30 | ||
31 | #define IOFFSET_RAX 0x0 |
31 | #define IOFFSET_RAX 0x0 |
32 | #define IOFFSET_RBX 0x8 |
32 | #define IOFFSET_RBX 0x8 |
33 | #define IOFFSET_RCX 0x10 |
33 | #define IOFFSET_RCX 0x10 |
34 | #define IOFFSET_RDX 0x18 |
34 | #define IOFFSET_RDX 0x18 |
35 | #define IOFFSET_RSI 0x20 |
35 | #define IOFFSET_RSI 0x20 |
36 | #define IOFFSET_RDI 0x28 |
36 | #define IOFFSET_RDI 0x28 |
37 | #define IOFFSET_R8 0x30 |
37 | #define IOFFSET_R8 0x30 |
38 | #define IOFFSET_R9 0x38 |
38 | #define IOFFSET_R9 0x38 |
39 | #define IOFFSET_R10 0x40 |
39 | #define IOFFSET_R10 0x40 |
40 | #define IOFFSET_R11 0x48 |
40 | #define IOFFSET_R11 0x48 |
41 | #define IOFFSET_R12 0x50 |
41 | #define IOFFSET_R12 0x50 |
42 | #define IOFFSET_R13 0x58 |
42 | #define IOFFSET_R13 0x58 |
43 | #define IOFFSET_R14 0x60 |
43 | #define IOFFSET_R14 0x60 |
44 | #define IOFFSET_R15 0x68 |
44 | #define IOFFSET_R15 0x68 |
45 | #define IOFFSET_RBP 0x70 |
45 | #define IOFFSET_RBP 0x70 |
46 | 46 | ||
47 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word |
47 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word |
48 | # and 1 means interrupt with error word |
48 | # and 1 means interrupt with error word |
49 | #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 |
49 | #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 |
50 | 50 | ||
51 | #include <arch/pm.h> |
51 | #include <arch/pm.h> |
52 | #include <arch/mm/page.h> |
52 | #include <arch/mm/page.h> |
53 | 53 | ||
54 | .text |
54 | .text |
55 | .global interrupt_handlers |
55 | .global interrupt_handlers |
56 | .global syscall_entry |
56 | .global syscall_entry |
57 | .global panic_printf |
57 | .global panic_printf |
58 | 58 | ||
59 | panic_printf: |
59 | panic_printf: |
60 | movq $halt, (%rsp) |
60 | movq $halt, (%rsp) |
61 | jmp printf |
61 | jmp printf |
62 | 62 | ||
63 | .global memcpy |
63 | .global memcpy |
64 | memcpy: |
64 | memcpy: |
65 | jmp _memcpy |
65 | jmp _memcpy |
66 | 66 | ||
67 | .global cpuid |
67 | .global cpuid |
68 | .global has_cpuid |
68 | .global has_cpuid |
69 | .global rdtsc |
69 | .global rdtsc |
70 | .global read_efer_flag |
70 | .global read_efer_flag |
71 | .global set_efer_flag |
71 | .global set_efer_flag |
72 | 72 | ||
73 | ## Determine CPUID support |
73 | ## Determine CPUID support |
74 | # |
74 | # |
75 | # Return 0 in EAX if CPUID is not support, 1 if supported. |
75 | # Return 0 in EAX if CPUID is not support, 1 if supported. |
76 | # |
76 | # |
77 | has_cpuid: |
77 | has_cpuid: |
78 | pushfq # store flags |
78 | pushfq # store flags |
79 | popq %rax # read flags |
79 | popq %rax # read flags |
80 | movq %rax,%rdx # copy flags |
80 | movq %rax,%rdx # copy flags |
81 | btcl $21,%edx # swap the ID bit |
81 | btcl $21,%edx # swap the ID bit |
82 | pushq %rdx |
82 | pushq %rdx |
83 | popfq # propagate the change into flags |
83 | popfq # propagate the change into flags |
84 | pushfq |
84 | pushfq |
85 | popq %rdx # read flags |
85 | popq %rdx # read flags |
86 | andl $(1<<21),%eax # interested only in ID bit |
86 | andl $(1<<21),%eax # interested only in ID bit |
87 | andl $(1<<21),%edx |
87 | andl $(1<<21),%edx |
88 | xorl %edx,%eax # 0 if not supported, 1 if supported |
88 | xorl %edx,%eax # 0 if not supported, 1 if supported |
89 | ret |
89 | ret |
90 | 90 | ||
91 | cpuid: |
91 | cpuid: |
92 | movq %rbx, %r10 # we have to preserve rbx across function calls |
92 | movq %rbx, %r10 # we have to preserve rbx across function calls |
93 | 93 | ||
94 | movl %edi,%eax # load the command into %eax |
94 | movl %edi,%eax # load the command into %eax |
95 | 95 | ||
96 | cpuid |
96 | cpuid |
97 | movl %eax,0(%rsi) |
97 | movl %eax,0(%rsi) |
98 | movl %ebx,4(%rsi) |
98 | movl %ebx,4(%rsi) |
99 | movl %ecx,8(%rsi) |
99 | movl %ecx,8(%rsi) |
100 | movl %edx,12(%rsi) |
100 | movl %edx,12(%rsi) |
101 | 101 | ||
102 | movq %r10, %rbx |
102 | movq %r10, %rbx |
103 | ret |
103 | ret |
104 | 104 | ||
105 | rdtsc: |
105 | rdtsc: |
106 | xorq %rax,%rax |
106 | xorq %rax,%rax |
107 | rdtsc |
107 | rdtsc |
108 | ret |
108 | ret |
109 | 109 | ||
110 | set_efer_flag: |
110 | set_efer_flag: |
111 | movq $0xc0000080, %rcx |
111 | movq $0xc0000080, %rcx |
112 | rdmsr |
112 | rdmsr |
113 | btsl %edi, %eax |
113 | btsl %edi, %eax |
114 | wrmsr |
114 | wrmsr |
115 | ret |
115 | ret |
116 | 116 | ||
117 | read_efer_flag: |
117 | read_efer_flag: |
118 | movq $0xc0000080, %rcx |
118 | movq $0xc0000080, %rcx |
119 | rdmsr |
119 | rdmsr |
120 | ret |
120 | ret |
121 | 121 | ||
122 | # Push all general purpose registers on stack except %rbp, %rsp |
122 | # Push all general purpose registers on stack except %rbp, %rsp |
123 | .macro save_all_gpr |
123 | .macro save_all_gpr |
124 | movq %rax, IOFFSET_RAX(%rsp) |
124 | movq %rax, IOFFSET_RAX(%rsp) |
125 | movq %rcx, IOFFSET_RCX(%rsp) |
125 | movq %rcx, IOFFSET_RCX(%rsp) |
126 | movq %rdx, IOFFSET_RDX(%rsp) |
126 | movq %rdx, IOFFSET_RDX(%rsp) |
127 | movq %rsi, IOFFSET_RSI(%rsp) |
127 | movq %rsi, IOFFSET_RSI(%rsp) |
128 | movq %rdi, IOFFSET_RDI(%rsp) |
128 | movq %rdi, IOFFSET_RDI(%rsp) |
129 | movq %r8, IOFFSET_R8(%rsp) |
129 | movq %r8, IOFFSET_R8(%rsp) |
130 | movq %r9, IOFFSET_R9(%rsp) |
130 | movq %r9, IOFFSET_R9(%rsp) |
131 | movq %r10, IOFFSET_R10(%rsp) |
131 | movq %r10, IOFFSET_R10(%rsp) |
132 | movq %r11, IOFFSET_R11(%rsp) |
132 | movq %r11, IOFFSET_R11(%rsp) |
133 | #ifdef CONFIG_DEBUG_ALLREGS |
133 | #ifdef CONFIG_DEBUG_ALLREGS |
134 | movq %rbx, IOFFSET_RBX(%rsp) |
134 | movq %rbx, IOFFSET_RBX(%rsp) |
135 | movq %rbp, IOFFSET_RBP(%rsp) |
135 | movq %rbp, IOFFSET_RBP(%rsp) |
136 | movq %r12, IOFFSET_R12(%rsp) |
136 | movq %r12, IOFFSET_R12(%rsp) |
137 | movq %r13, IOFFSET_R13(%rsp) |
137 | movq %r13, IOFFSET_R13(%rsp) |
138 | movq %r14, IOFFSET_R14(%rsp) |
138 | movq %r14, IOFFSET_R14(%rsp) |
139 | movq %r15, IOFFSET_R15(%rsp) |
139 | movq %r15, IOFFSET_R15(%rsp) |
140 | #endif |
140 | #endif |
141 | .endm |
141 | .endm |
142 | 142 | ||
143 | .macro restore_all_gpr |
143 | .macro restore_all_gpr |
144 | movq IOFFSET_RAX(%rsp), %rax |
144 | movq IOFFSET_RAX(%rsp), %rax |
145 | movq IOFFSET_RCX(%rsp), %rcx |
145 | movq IOFFSET_RCX(%rsp), %rcx |
146 | movq IOFFSET_RDX(%rsp), %rdx |
146 | movq IOFFSET_RDX(%rsp), %rdx |
147 | movq IOFFSET_RSI(%rsp), %rsi |
147 | movq IOFFSET_RSI(%rsp), %rsi |
148 | movq IOFFSET_RDI(%rsp), %rdi |
148 | movq IOFFSET_RDI(%rsp), %rdi |
149 | movq IOFFSET_R8(%rsp), %r8 |
149 | movq IOFFSET_R8(%rsp), %r8 |
150 | movq IOFFSET_R9(%rsp), %r9 |
150 | movq IOFFSET_R9(%rsp), %r9 |
151 | movq IOFFSET_R10(%rsp), %r10 |
151 | movq IOFFSET_R10(%rsp), %r10 |
152 | movq IOFFSET_R11(%rsp), %r11 |
152 | movq IOFFSET_R11(%rsp), %r11 |
153 | #ifdef CONFIG_DEBUG_ALLREGS |
153 | #ifdef CONFIG_DEBUG_ALLREGS |
154 | movq IOFFSET_RBX(%rsp), %rbx |
154 | movq IOFFSET_RBX(%rsp), %rbx |
155 | movq IOFFSET_RBP(%rsp), %rbp |
155 | movq IOFFSET_RBP(%rsp), %rbp |
156 | movq IOFFSET_R12(%rsp), %r12 |
156 | movq IOFFSET_R12(%rsp), %r12 |
157 | movq IOFFSET_R13(%rsp), %r13 |
157 | movq IOFFSET_R13(%rsp), %r13 |
158 | movq IOFFSET_R14(%rsp), %r14 |
158 | movq IOFFSET_R14(%rsp), %r14 |
159 | movq IOFFSET_R15(%rsp), %r15 |
159 | movq IOFFSET_R15(%rsp), %r15 |
160 | #endif |
160 | #endif |
161 | .endm |
161 | .endm |
162 | 162 | ||
163 | #ifdef CONFIG_DEBUG_ALLREGS |
163 | #ifdef CONFIG_DEBUG_ALLREGS |
164 | # define INTERRUPT_ALIGN 256 |
164 | # define INTERRUPT_ALIGN 256 |
165 | #else |
165 | #else |
166 | # define INTERRUPT_ALIGN 128 |
166 | # define INTERRUPT_ALIGN 128 |
167 | #endif |
167 | #endif |
168 | 168 | ||
169 | ## Declare interrupt handlers |
169 | ## Declare interrupt handlers |
170 | # |
170 | # |
171 | # Declare interrupt handlers for n interrupt |
171 | # Declare interrupt handlers for n interrupt |
172 | # vectors starting at vector i. |
172 | # vectors starting at vector i. |
173 | # |
173 | # |
174 | # The handlers call exc_dispatch(). |
174 | # The handlers call exc_dispatch(). |
175 | # |
175 | # |
176 | .macro handler i n |
176 | .macro handler i n |
177 | 177 | ||
178 | /* |
178 | /* |
179 | * Choose between version with error code and version without error code. |
179 | * Choose between version with error code and version without error code. |
180 | * Both versions have to be of the same size. amd64 assembly is, however, |
180 | * Both versions have to be of the same size. amd64 assembly is, however, |
181 | * a little bit tricky. For instance, subq $0x80, %rsp and subq $0x78, %rsp |
181 | * a little bit tricky. For instance, subq $0x80, %rsp and subq $0x78, %rsp |
182 | * can result in two instructions with different op-code lengths. |
182 | * can result in two instructions with different op-code lengths. |
183 | * Therefore, pay special attention to the extra NOP's that serve as |
183 | * Therefore we align the interrupt handlers. |
184 | * a necessary fill. |
- | |
185 | */ |
184 | */ |
186 | 185 | ||
187 | .iflt \i-32 |
186 | .iflt \i-32 |
188 | .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST |
187 | .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST |
189 | /* |
188 | /* |
190 | * Version with error word. |
189 | * Version with error word. |
191 | */ |
190 | */ |
192 | subq $IREGISTER_SPACE, %rsp |
191 | subq $IREGISTER_SPACE, %rsp |
193 | .else |
192 | .else |
194 | /* |
193 | /* |
195 | * Version without error word, |
194 | * Version without error word, |
196 | */ |
195 | */ |
197 | subq $(IREGISTER_SPACE+8), %rsp |
196 | subq $(IREGISTER_SPACE+8), %rsp |
198 | .endif |
197 | .endif |
199 | .else |
198 | .else |
200 | /* |
199 | /* |
201 | * Version without error word, |
200 | * Version without error word, |
202 | */ |
201 | */ |
203 | subq $(IREGISTER_SPACE+8), %rsp |
202 | subq $(IREGISTER_SPACE+8), %rsp |
204 | .endif |
203 | .endif |
205 | 204 | ||
206 | save_all_gpr |
205 | save_all_gpr |
207 | 206 | ||
208 | movq $(\i), %rdi # %rdi - first parameter |
207 | movq $(\i), %rdi # %rdi - first parameter |
209 | movq %rsp, %rsi # %rsi - pointer to istate |
208 | movq %rsp, %rsi # %rsi - pointer to istate |
210 | call exc_dispatch # exc_dispatch(i, istate) |
209 | call exc_dispatch # exc_dispatch(i, istate) |
211 | 210 | ||
212 | restore_all_gpr |
211 | restore_all_gpr |
213 | # $8 = Skip error word |
212 | # $8 = Skip error word |
214 | addq $(IREGISTER_SPACE+8), %rsp |
213 | addq $(IREGISTER_SPACE+8), %rsp |
215 | iretq |
214 | iretq |
216 | 215 | ||
217 | .align INTERRUPT_ALIGN |
216 | .align INTERRUPT_ALIGN |
218 | .if (\n-\i)-1 |
217 | .if (\n-\i)-1 |
219 | handler "(\i+1)",\n |
218 | handler "(\i+1)",\n |
220 | .endif |
219 | .endif |
221 | .endm |
220 | .endm |
222 | 221 | ||
223 | .align INTERRUPT_ALIGN |
222 | .align INTERRUPT_ALIGN |
224 | interrupt_handlers: |
223 | interrupt_handlers: |
225 | h_start: |
224 | h_start: |
226 | handler 0 IDT_ITEMS |
225 | handler 0 IDT_ITEMS |
227 | h_end: |
226 | h_end: |
228 | 227 | ||
229 | 228 | ||
230 | syscall_entry: |
229 | syscall_entry: |
231 | # Switch to hidden gs |
230 | # Switch to hidden gs |
232 | swapgs |
231 | swapgs |
233 | # %gs:0 now points to pointer to stack page |
232 | # %gs:0 now points to pointer to stack page |
234 | mov %gs:0, %r10 # We have a ptr to stack page in r10 |
233 | mov %gs:0, %r10 # We have a ptr to stack page in r10 |
235 | addq $PAGE_SIZE-16, %r10 # We need some space to store old %sp |
234 | addq $PAGE_SIZE-16, %r10 # We need some space to store old %sp |
236 | 235 | ||
237 | movq %rsp, 0(%r10) # Save old stack pointer to stack |
236 | movq %rsp, 0(%r10) # Save old stack pointer to stack |
238 | movq %r10, %rsp # Change to new stack |
237 | movq %r10, %rsp # Change to new stack |
239 | pushq %rcx # Return address |
238 | pushq %rcx # Return address |
240 | pushq %r11 # Save flags |
239 | pushq %r11 # Save flags |
241 | 240 | ||
242 | # Switch back to remain consistent |
241 | # Switch back to remain consistent |
243 | swapgs |
242 | swapgs |
244 | 243 | ||
245 | sti |
244 | sti |
246 | movq %r9, %rcx # Exchange last parameter as a third |
245 | movq %r9, %rcx # Exchange last parameter as a third |
247 | call syscall_handler |
246 | call syscall_handler |
248 | cli # We will be touching stack pointer |
247 | cli # We will be touching stack pointer |
249 | 248 | ||
250 | popq %r11 |
249 | popq %r11 |
251 | popq %rcx |
250 | popq %rcx |
252 | movq 0(%rsp), %rsp |
251 | movq 0(%rsp), %rsp |
253 | sysretq |
252 | sysretq |
254 | 253 | ||
255 | .data |
254 | .data |
256 | .global interrupt_handler_size |
255 | .global interrupt_handler_size |
257 | 256 | ||
258 | interrupt_handler_size: .quad (h_end-h_start)/IDT_ITEMS |
257 | interrupt_handler_size: .quad (h_end-h_start)/IDT_ITEMS |
259 | 258 |