WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/amd64/src/amd64.c


/*
 * Copyright (C) 2005 Ondrej Palkovsky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#include <arch.h>
 
#include <arch/types.h>
 
#include <config.h>
 
#include <arch/ega.h>
#include <arch/i8042.h>
#include <arch/i8254.h>
#include <arch/i8259.h>
 
#include <arch/bios/bios.h>
#include <arch/mm/memory_init.h>
#include <arch/cpu.h>
#include <print.h>
#include <arch/cpuid.h>
#include <genarch/acpi/acpi.h>
#include <panic.h>
#include <interrupt.h>
#include <arch/syscall.h>
 
/** Disable I/O on non-privileged levels
 *
 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
 */
static void clean_IOPL_NT_flags(void)
{
    asm
    (
        "pushfq;"
        "pop %%rax;"
        "and $~(0x7000),%%rax;"
        "pushq %%rax;"
        "popfq;"
        :
        :
        :"%rax"
    );
}
 
/** Disable alignment check
 *
 * Clean AM(18) flag in CR0 register
 */
static void clean_AM_flag(void)
{
    asm
    (
        "mov %%cr0,%%rax;"
        "and $~(0x40000),%%rax;"
        "mov %%rax,%%cr0;"
        :
        :
        :"%rax"
    );
}
 
void arch_pre_mm_init(void)
{
    struct cpu_info cpuid_s;
 
    cpuid(AMD_CPUID_EXTENDED,&cpuid_s);
    if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE)))
        panic("Processor does not support No-execute pages.\n");
 
    cpuid(INTEL_CPUID_STANDARD,&cpuid_s);
    if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE)))
        panic("Processor does not support FXSAVE/FXRESTORE.\n");
   
    if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2)))
        panic("Processor does not support SSE2 instructions.\n");
 
    /* Enable No-execute pages */
    set_efer_flag(AMD_NXE_FLAG);
 
 
    /* Enable FPU */
    cpu_setup_fpu();
 
    /* Initialize segmentation */
    pm_init();
 
        /* Disable I/O on nonprivileged levels
     * clear the NT(nested-thread) flag
     */
    clean_IOPL_NT_flags();
    /* Disable alignment check */
    clean_AM_flag();
 
 
    if (config.cpu_active == 1) {
        bios_init();
        i8259_init();   /* PIC */
        i8254_init();   /* hard clock */
 
        #ifdef CONFIG_SMP
        exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
                 tlb_shootdown_ipi);
        exc_register(VECTOR_WAKEUP_IPI, "wakeup_ipi", wakeup_ipi);
        #endif /* CONFIG_SMP */
    }
}
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        ega_init(); /* video */
    }
    /* Setup fast SYSCALL/SYSRET */
    syscall_setup_cpu();
 
}
 
void arch_pre_smp_init(void)
{
    if (config.cpu_active == 1) {
        memory_print_map();
       
        #ifdef CONFIG_SMP
        acpi_init();
        #endif /* CONFIG_SMP */
    }
}
 
void arch_post_smp_init(void)
{
        i8042_init();   /* keyboard controller */
}
 
void calibrate_delay_loop(void)
{
    i8254_calibrate_delay_loop();
    i8254_normal_operation();
}
 

Rev 799	Rev 803
1	/*	1	/*
2	* Copyright (C) 2005 Ondrej Palkovsky	2	* Copyright (C) 2005 Ondrej Palkovsky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#include <arch.h>	29	#include <arch.h>
30		30
31	#include <arch/types.h>	31	#include <arch/types.h>
32		32
33	#include <config.h>	33	#include <config.h>
34		34
35	#include <arch/ega.h>	35	#include <arch/ega.h>
36	#include <arch/i8042.h>	36	#include <arch/i8042.h>
37	#include <arch/i8254.h>	37	#include <arch/i8254.h>
38	#include <arch/i8259.h>	38	#include <arch/i8259.h>
39		39
40	#include <arch/bios/bios.h>	40	#include <arch/bios/bios.h>
41	#include <arch/mm/memory_init.h>	41	#include <arch/mm/memory_init.h>
42	#include <arch/cpu.h>	42	#include <arch/cpu.h>
43	#include <print.h>	43	#include <print.h>
44	#include <arch/cpuid.h>	44	#include <arch/cpuid.h>
45	#include <genarch/acpi/acpi.h>	45	#include <genarch/acpi/acpi.h>
46	#include <panic.h>	46	#include <panic.h>
47	#include <interrupt.h>	47	#include <interrupt.h>
-		48	#include <arch/syscall.h>
48		49
49	/** Disable I/O on non-privileged levels	50	/** Disable I/O on non-privileged levels
50	*	51	*
51	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register	52	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register
52	*/	53	*/
53	static void clean_IOPL_NT_flags(void)	54	static void clean_IOPL_NT_flags(void)
54	{	55	{
55	asm	56	asm
56	(	57	(
57	"pushfq;"	58	"pushfq;"
58	"pop %%rax;"	59	"pop %%rax;"
59	"and $~(0x7000),%%rax;"	60	"and $~(0x7000),%%rax;"
60	"pushq %%rax;"	61	"pushq %%rax;"
61	"popfq;"	62	"popfq;"
62	:	63	:
63	:	64	:
64	:"%rax"	65	:"%rax"
65	);	66	);
66	}	67	}
67		68
68	/** Disable alignment check	69	/** Disable alignment check
69	*	70	*
70	* Clean AM(18) flag in CR0 register	71	* Clean AM(18) flag in CR0 register
71	*/	72	*/
72	static void clean_AM_flag(void)	73	static void clean_AM_flag(void)
73	{	74	{
74	asm	75	asm
75	(	76	(
76	"mov %%cr0,%%rax;"	77	"mov %%cr0,%%rax;"
77	"and $~(0x40000),%%rax;"	78	"and $~(0x40000),%%rax;"
78	"mov %%rax,%%cr0;"	79	"mov %%rax,%%cr0;"
79	:	80	:
80	:	81	:
81	:"%rax"	82	:"%rax"
82	);	83	);
83	}	84	}
84		85
85	void arch_pre_mm_init(void)	86	void arch_pre_mm_init(void)
86	{	87	{
87	struct cpu_info cpuid_s;	88	struct cpu_info cpuid_s;
88		89
89	cpuid(AMD_CPUID_EXTENDED,&cpuid_s);	90	cpuid(AMD_CPUID_EXTENDED,&cpuid_s);
90	if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE)))	91	if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE)))
91	panic("Processor does not support No-execute pages.\n");	92	panic("Processor does not support No-execute pages.\n");
92		93
93	cpuid(INTEL_CPUID_STANDARD,&cpuid_s);	94	cpuid(INTEL_CPUID_STANDARD,&cpuid_s);
94	if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE)))	95	if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE)))
95	panic("Processor does not support FXSAVE/FXRESTORE.\n");	96	panic("Processor does not support FXSAVE/FXRESTORE.\n");
96		97
97	if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2)))	98	if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2)))
98	panic("Processor does not support SSE2 instructions.\n");	99	panic("Processor does not support SSE2 instructions.\n");
99		100
100	/* Enable No-execute pages */	101	/* Enable No-execute pages */
101	set_efer_flag(AMD_NXE_FLAG);	102	set_efer_flag(AMD_NXE_FLAG);
102	/* Enable SYSCALL/SYSRET */	-
103	set_efer_flag(AMD_SCE_FLAG);	-
104	/* Enable FPU */	103	/* Enable FPU */
105	cpu_setup_fpu();	104	cpu_setup_fpu();
-		105
106	/* Initialize segmentation */	106	/* Initialize segmentation */
107	pm_init();	107	pm_init();
108		108
109	/* Disable I/O on nonprivileged levels	109	/* Disable I/O on nonprivileged levels
110	* clear the NT(nested-thread) flag	110	* clear the NT(nested-thread) flag
111	*/	111	*/
112	clean_IOPL_NT_flags();	112	clean_IOPL_NT_flags();
113	/* Disable alignment check */	113	/* Disable alignment check */
114	clean_AM_flag();	114	clean_AM_flag();
115		-
116		115
117	if (config.cpu_active == 1) {	116	if (config.cpu_active == 1) {
118	bios_init();	117	bios_init();
119	i8259_init(); /* PIC */	118	i8259_init(); /* PIC */
120	i8254_init(); /* hard clock */	119	i8254_init(); /* hard clock */
121		120
122	#ifdef CONFIG_SMP	121	#ifdef CONFIG_SMP
123	exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",	122	exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
124	tlb_shootdown_ipi);	123	tlb_shootdown_ipi);
125	exc_register(VECTOR_WAKEUP_IPI, "wakeup_ipi", wakeup_ipi);	124	exc_register(VECTOR_WAKEUP_IPI, "wakeup_ipi", wakeup_ipi);
126	#endif /* CONFIG_SMP */	125	#endif /* CONFIG_SMP */
127	}	126	}
128	}	127	}
129		128
130	void arch_post_mm_init(void)	129	void arch_post_mm_init(void)
131	{	130	{
132	if (config.cpu_active == 1) {	131	if (config.cpu_active == 1) {
133	ega_init(); /* video */	132	ega_init(); /* video */
134	}	133	}
-		134	/* Setup fast SYSCALL/SYSRET */
-		135	syscall_setup_cpu();
-		136
135	}	137	}
136		138
137	void arch_pre_smp_init(void)	139	void arch_pre_smp_init(void)
138	{	140	{
139	if (config.cpu_active == 1) {	141	if (config.cpu_active == 1) {
140	memory_print_map();	142	memory_print_map();
141		143
142	#ifdef CONFIG_SMP	144	#ifdef CONFIG_SMP
143	acpi_init();	145	acpi_init();
144	#endif /* CONFIG_SMP */	146	#endif /* CONFIG_SMP */
145	}	147	}
146	}	148	}
147		149
148	void arch_post_smp_init(void)	150	void arch_post_smp_init(void)
149	{	151	{
150	i8042_init(); /* keyboard controller */	152	i8042_init(); /* keyboard controller */
151	}	153	}
152		154
153	void calibrate_delay_loop(void)	155	void calibrate_delay_loop(void)
154	{	156	{
155	i8254_calibrate_delay_loop();	157	i8254_calibrate_delay_loop();
156	i8254_normal_operation();	158	i8254_normal_operation();
157	}	159	}
158		160

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/amd64/src/amd64.c @ 1780 – Rev 799 → 803