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<?xml version="1.0" encoding="UTF-8"?>
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<?xml version="1.0" encoding="UTF-8"?>
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<chapter id="mm">
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<chapter id="mm">
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  <?dbhtml filename="mm.html"?>
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  <?dbhtml filename="mm.html"?>
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  <title>Memory management</title>
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  <title>Memory management</title>
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-
 
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  <section>
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    <title>Virtual memory management</title>
-
 
9
 
-
 
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    <section>
-
 
11
      <title>Introduction</title>
-
 
12
 
-
 
13
      <para>Virtual memory is a special memory management technique, used by
-
 
14
      kernel to achieve a bunch of mission critical goals. <itemizedlist>
-
 
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          <listitem>
-
 
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             Isolate each task from other tasks that are running on the system at the same time.
-
 
17
          </listitem>
-
 
18
 
-
 
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          <listitem>
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             Allow to allocate more memory, than is actual physical memory size of the machine.
-
 
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          </listitem>
-
 
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-
 
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          <listitem>
-
 
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             Allowing, in general, to load and execute two programs that are linked on the same address without complicated relocations.
-
 
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          </listitem>
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        </itemizedlist></para>
-
 
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-
 
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      <para><!--
-
 
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                <para>
-
 
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                        Address spaces. Address space area (B+ tree). Only for uspace. Set of syscalls (shrink/extend etc).
-
 
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                        Special address space area type - device - prohibits shrink/extend syscalls to call on it.
-
 
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                        Address space has link to mapping tables (hierarchical - per Address space, hash - global tables).
-
 
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                </para>
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--></para>
-
 
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    </section>
-
 
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-
 
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    <section>
-
 
39
      <title>Address spaces</title>
-
 
40
 
-
 
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      <section>
-
 
42
        <title>Address space areas</title>
-
 
43
 
-
 
44
        <para>Each address space consists of mutually disjunctive continuous
-
 
45
        address space areas. Address space area is precisely defined by its
-
 
46
        base address and the number of frames/pages is contains.</para>
-
 
47
 
-
 
48
        <para>Address space area , that define behaviour and permissions on
-
 
49
        the particular area. <itemizedlist>
-
 
50
            <listitem>
-
 
51
               
-
 
52
 
-
 
53
              <emphasis>AS_AREA_READ</emphasis>
-
 
54
 
-
 
55
               flag indicates reading permission.
-
 
56
            </listitem>
-
 
57
 
-
 
58
            <listitem>
-
 
59
               
-
 
60
 
-
 
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              <emphasis>AS_AREA_WRITE</emphasis>
-
 
62
 
-
 
63
               flag indicates writing permission.
-
 
64
            </listitem>
-
 
65
 
-
 
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            <listitem>
-
 
67
               
-
 
68
 
-
 
69
              <emphasis>AS_AREA_EXEC</emphasis>
-
 
70
 
-
 
71
               flag indicates code execution permission. Some architectures do not support execution persmission restriction. In this case this flag has no effect.
-
 
72
            </listitem>
-
 
73
 
-
 
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            <listitem>
-
 
75
               
-
 
76
 
-
 
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              <emphasis>AS_AREA_DEVICE</emphasis>
-
 
78
 
-
 
79
               marks area as mapped to the device memory.
-
 
80
            </listitem>
-
 
81
          </itemizedlist></para>
-
 
82
 
-
 
83
        <para>Kernel provides possibility tasks create/expand/shrink/share its
-
 
84
        address space via the set of syscalls.</para>
-
 
85
      </section>
-
 
86
 
-
 
87
      <section>
-
 
88
        <title>Address Space ID (ASID)</title>
-
 
89
 
-
 
90
        <para>When switching to the different task, kernel also require to
-
 
91
        switch mappings to the different address space. In case TLB cannot
-
 
92
        distinguish address space mappings, all mapping information in TLB
-
 
93
        from the old address space must be flushed, which can create certain
-
 
94
        uncessary overhead during the task switching. To avoid this, some
-
 
95
        architectures have capability to segregate different address spaces on
-
 
96
        hardware level introducing the address space identifier as a part of
-
 
97
        TLB record, telling the virtual address space translation unit to
-
 
98
        which address space this record is applicable.</para>
-
 
99
 
-
 
100
        <para>HelenOS kernel can take advantage of this hardware supported
-
 
101
        identifier by having an ASID abstraction which is somehow related to
-
 
102
        the corresponding architecture identifier. I.e. on ia64 kernel ASID is
-
 
103
        derived from RID (region identifier) and on the mips32 kernel ASID is
-
 
104
        actually the hardware identifier. As expected, this ASID information
-
 
105
        record is the part of <emphasis>as_t</emphasis> structure.</para>
-
 
106
 
-
 
107
        <para>Due to the hardware limitations, hardware ASID has limited
-
 
108
        length from 8 bits on ia64 to 24 bits on mips32, which makes it
-
 
109
        impossible to use it as unique address space identifier for all tasks
-
 
110
        running in the system. In such situations special ASID stealing
-
 
111
        algoritm is used, which takes ASID from inactive task and assigns it
-
 
112
        to the active task.<classname></classname></para>
-
 
113
      </section>
-
 
114
    </section>
-
 
115
 
-
 
116
    <section>
-
 
117
      <title>Virtual address translation</title>
-
 
118
 
-
 
119
      <section id="pagING">
-
 
120
        <title>Paging</title>
-
 
121
 
-
 
122
        <section>
-
 
123
          <title>Introduction</title>
-
 
124
 
-
 
125
          <para>Virtual memory is usually using paged memory model, where
-
 
126
          virtual memory address space is divided into the
-
 
127
          <emphasis>pages</emphasis> (usually having size 4096 bytes) and
-
 
128
          physical memory is divided into the frames (same sized as a page, of
-
 
129
          course). Each page may be mapped to some frame and then, upon memory
-
 
130
          access to the virtual address, CPU performs <emphasis>address
-
 
131
          translation</emphasis> during the instruction execution.
-
 
132
          Non-existing mapping generates page fault exception, calling kernel
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  <para>In previous chapters, this book described the scheduling subsystem as
133
          exception handler, thus allowing kernel to manipulate rules of
-
 
134
          memory access. Information for pages mapping is stored by kernel in
-
 
135
          the <link linkend="page_tables">page tables</link></para>
-
 
136
 
-
 
137
          <para>The majority of the architectures use multi-level page tables,
-
 
138
          which means need to access physical memory several times before
-
 
139
          getting physical address. This fact would make serios performance
-
 
140
          overhead in virtual memory management. To avoid this <link
-
 
141
          linkend="tlb">Traslation Lookaside Buffer (TLB)</link> is
-
 
142
          used.</para>
-
 
143
 
-
 
144
          <para>HelenOS kernel has two different approaches to the paging
-
 
145
          implementation: <emphasis>4 level page tables</emphasis> and
-
 
146
          <emphasis>global hash table</emphasis>, which are accessible via
-
 
147
          generic paging abstraction layer. Such different functionality was
-
 
148
          caused by the major architectural differences between supported
8
  the creator of the impression that threads execute in parallel. The memory
149
          platforms. This abstraction is implemented with help of the global
-
 
150
          structure of pointers to basic mapping functions
-
 
151
          <emphasis>page_mapping_operations</emphasis>. To achieve different
-
 
152
          functionality of page tables, corresponding layer must implement
-
 
153
          functions, declared in
-
 
154
          <emphasis>page_mapping_operations</emphasis></para>
-
 
155
 
-
 
156
          <para>Thanks to the abstract paging interface, there was a place
-
 
157
          left for more paging implementations (besides already implemented
-
 
158
          hieararchical page tables and hash table), for example B-Tree based
-
 
159
          page tables.</para>
-
 
160
        </section>
-
 
161
 
-
 
162
        <section>
-
 
163
          <title>Hierarchical 4-level page tables</title>
-
 
164
 
-
 
165
          <para>Hierarchical 4-level page tables are the generalization of the
-
 
166
          hardware capabilities of most architectures. Each address space has
-
 
167
          its own page tables.<itemizedlist>
-
 
168
              <listitem>
-
 
169
                 ia32 uses 2-level page tables, with full hardware support.
-
 
170
              </listitem>
-
 
171
 
-
 
172
              <listitem>
-
 
173
                 amd64 uses 4-level page tables, also coming with full hardware support.
-
 
174
              </listitem>
-
 
175
 
-
 
176
              <listitem>
-
 
177
                 mips and ppc32 have 2-level tables, software simulated support.
-
 
178
              </listitem>
-
 
179
            </itemizedlist></para>
-
 
180
        </section>
-
 
181
 
-
 
182
        <section>
-
 
183
          <title>Global hash table</title>
-
 
184
 
-
 
185
          <para>Implementation of the global hash table was encouraged by the
-
 
186
          ia64 architecture support. One of the major differences between
-
 
187
          global hash table and hierarchical tables is that global hash table
-
 
188
          exists only once in the system and the hierarchical tables are
-
 
189
          maintained per address space. </para>
-
 
190
 
-
 
191
          <para>Thus, hash table contains information about all address spaces
-
 
192
          mappings in the system, so, the hash of an entry must contain
-
 
193
          information of both address space pointer or id and the virtual
9
  management subsystem, on the other hand, creates the impression that there
194
          address of the page. Generic hash table implementation assumes that
10
  is enough physical memory for the kernel and that userspace tasks have the
195
          the addresses of the pointers to the address spaces are likely to be
-
 
196
          on the close addresses, so it uses least significant bits for hash;
-
 
197
          also it assumes that the virtual page addresses have roughly the
-
 
198
          same probability of occurring, so the least significant bits of VPN
-
 
199
          compose the hash index.</para>
-
 
200
 
-
 
201
          <para>- global page hash table: existuje jen jedna v celem systemu
-
 
202
          (vyuziva ji ia64), pozn. ia64 ma zatim vypnuty VHPT. Pouziva se
-
 
203
          genericke hash table s oddelenymi collision chains. ASID support is
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  entire address space only for themselves.</para>
204
          required to use global hash tables.</para>
-
 
205
        </section>
-
 
206
      </section>
-
 
207
 
-
 
208
      <section id="tlb">
-
 
209
        <title>Translation Lookaside buffer</title>
-
 
210
 
-
 
211
        <para>Due to the extensive overhead during the page mapping lookup in
-
 
212
        the page tables, all architectures has fast assotiative cache memory
-
 
213
        built-in CPU. This memory called TLB stores recently used page table
-
 
214
        entries.</para>
-
 
215
 
-
 
216
        <section id="tlb_shootdown">
-
 
217
          <title>TLB consistency. TLB shootdown algorithm.</title>
-
 
218
 
-
 
219
          <para>Operating system is responsible for keeping TLB consistent by
-
 
220
          invalidating the contents of TLB, whenever there is some change in
-
 
221
          page tables. Those changes may occur when page or group of pages
-
 
222
          were unmapped, mapping is changed or system switching active address
-
 
223
          space to schedule a new system task. Moreover, this invalidation
-
 
224
          operation must be done an all system CPUs because each CPU has its
-
 
225
          own independent TLB cache. Thus maintaining TLB consistency on SMP
-
 
226
          configuration as not as trivial task as it looks on the first
-
 
227
          glance. Naive solution would assume that is the CPU which wants to
-
 
228
          invalidate TLB will invalidate TLB caches on other CPUs. It is not
-
 
229
          possible on the most of the architectures, because of the simple
-
 
230
          fact - flushing TLB is allowed only on the local CPU and there is no
-
 
231
          possibility to access other CPUs' TLB caches, thus invalidate TLB
-
 
232
          remotely.</para>
-
 
233
 
-
 
234
          <para>Technique of remote invalidation of TLB entries is called "TLB
-
 
235
          shootdown". HelenOS uses a variation of the algorithm described by
-
 
236
          D. Black et al., "Translation Lookaside Buffer Consistency: A
-
 
237
          Software Approach," Proc. Third Int'l Conf. Architectural Support
-
 
238
          for Programming Languages and Operating Systems, 1989, pp.
-
 
239
          113-122.</para>
-
 
240
 
-
 
241
          <para>As the situation demands, you will want partitial invalidation
-
 
242
          of TLB caches. In case of simple memory mapping change it is
-
 
243
          necessary to invalidate only one or more adjacent pages. In case if
-
 
244
          the architecture is aware of ASIDs, when kernel needs to dump some
-
 
245
          ASID to use by another task, it invalidates only entries from this
-
 
246
          particular address space. Final option of the TLB invalidation is
-
 
247
          the complete TLB cache invalidation, which is the operation that
-
 
248
          flushes all entries in TLB.</para>
-
 
249
 
-
 
250
          <para>TLB shootdown is performed in two phases.</para>
-
 
251
 
-
 
252
          <formalpara>
-
 
253
            <title>Phase 1.</title>
-
 
254
 
-
 
255
            <para>First, initiator locks a global TLB spinlock, then request
-
 
256
            is being put to the local request cache of every other CPU in the
-
 
257
            system protected by its spinlock. In case the cache is full, all
-
 
258
            requests in the cache are replaced by one request, indicating
-
 
259
            global TLB flush. Then the initiator thread sends an IPI message
-
 
260
            indicating the TLB shootdown request to the rest of the CPUs and
-
 
261
            waits actively until all CPUs confirm TLB invalidating action
-
 
262
            execution by setting up a special flag. After setting this flag
-
 
263
            this thread is blocked on the TLB spinlock, held by the
-
 
264
            initiator.</para>
-
 
265
          </formalpara>
-
 
266
 
-
 
267
          <formalpara>
-
 
268
            <title>Phase 2.</title>
-
 
269
 
-
 
270
            <para>All CPUs are waiting on the TLB spinlock to execute TLB
-
 
271
            invalidation action and have indicated their intention to the
-
 
272
            initiator. Initiator continues, cleaning up its TLB and releasing
-
 
273
            the global TLB spinlock. After this all other CPUs gain and
-
 
274
            immidiately release TLB spinlock and perform TLB invalidation
-
 
275
            actions.</para>
-
 
276
          </formalpara>
-
 
277
        </section>
-
 
278
      </section>
-
 
279
    </section>
-
 
280
 
-
 
281
    <section>
-
 
282
      <title>---</title>
-
 
283
 
-
 
284
      <para>At the moment HelenOS does not support swapping.</para>
-
 
285
 
-
 
286
      <para>- pouzivame vypadky stranky k alokaci ramcu on-demand v ramci
-
 
287
      as_area - na architekturach, ktere to podporuji, podporujeme non-exec
-
 
288
      stranky</para>
-
 
289
    </section>
-
 
290
  </section>
12
 
291
 
13
  <section>
292
  <section>
14
    <title>Physical memory management</title>
293
    <title>Physical memory management</title>
15
 
294
 
16
    <section id="zones_and_frames">
295
    <section id="zones_and_frames">
17
      <title>Zones and frames</title>
296
      <title>Zones and frames</title>
18
 
297
 
19
      <para>HelenOS represents continuous areas of physical memory in
298
      <para>On some architectures not whole physical memory is available for
20
      structures called frame zones (abbreviated as zones). Each zone contains
299
      conventional usage. This limitations require from kernel to maintain a
21
      information about the number of allocated and unallocated physical
-
 
22
      memory frames as well as the physical base address of the zone and
300
      table of available and unavailable ranges of physical memory addresses.
23
      number of frames contained in it. A zone also contains an array of frame
301
      Main idea of zones is in creating memory zone entity, that is a
24
      structures describing each frame of the zone and, in the last, but not
302
      continuous chunk of memory available for allocation. If some chunk is
25
      the least important, front, each zone is equipped with a buddy system
-
 
26
      that faciliates effective allocation of power-of-two sized block of
303
      not available, we simply do not put it in any zone.</para>
27
      frames.</para>
-
 
28
 
304
 
29
      <para>This organization of physical memory provides good preconditions
305
      <para>Zone is also serves for informational purposes, containing
-
 
306
      information about number of free and busy frames. Physical memory
30
      for hot-plugging of more zones. There is also one currently unused zone
307
      allocation is also done inside the certain zone. Allocation of zone
31
      attribute: <code>flags</code>. The attribute could be used to give a
308
      frame must be organized by the <link linkend="frame_allocator">frame
32
      special meaning to some zones in the future.</para>
309
      allocator</link> associated with the zone.</para>
33
 
310
 
34
      <para>The zones are linked in a doubly-linked list. This might seem a
311
      <para>Some of the architectures (mips32, ppc32) have only one zone, that
35
      bit ineffective because the zone list is walked everytime a frame is
312
      covers whole physical memory, and the others (like ia32) may have
36
      allocated or deallocated. However, this does not represent a significant
313
      multiple zones. Information about zones on current machine is stored in
37
      performance problem as it is expected that the number of zones will be
314
      BIOS hardware tables or can be hardcoded into kernel during compile
38
      rather low. Moreover, most architectures merge all zones into
-
 
39
      one.</para>
315
      time.</para>
40
 
-
 
41
      <para>For each physical memory frame found in a zone, there is a frame
-
 
42
      structure that contains number of references and data used by buddy
-
 
43
      system.</para>
-
 
44
    </section>
316
    </section>
45
 
317
 
46
    <section id="frame_allocator">
318
    <section id="frame_allocator">
47
      <title>Frame allocator</title>
319
      <title>Frame allocator</title>
48
 
320
 
49
      <para>The frame allocator satisfies kernel requests to allocate
321
      <figure>
50
      power-of-two sized blocks of physical memory. Because of zonal
-
 
51
      organization of physical memory, the frame allocator is always working
322
        <mediaobject id="frame_alloc">
52
      within a context of some frame zone. In order to carry out the
323
          <imageobject role="html">
53
      allocation requests, the frame allocator is tightly integrated with the
-
 
54
      buddy system belonging to the zone. The frame allocator is also
324
            <imagedata fileref="images/frame_alloc.png" format="PNG" />
55
      responsible for updating information about the number of free and busy
-
 
56
      frames in the zone. <figure>
-
 
57
          <mediaobject id="frame_alloc">
325
          </imageobject>
-
 
326
 
58
            <imageobject role="html">
327
          <imageobject role="fop">
59
              <imagedata fileref="images/frame_alloc.png" format="PNG" />
328
            <imagedata fileref="images.vector/frame_alloc.svg" format="SVG" />
60
            </imageobject>
329
          </imageobject>
-
 
330
        </mediaobject>
61
 
331
 
62
            <imageobject role="fop">
332
        <title>Frame allocator scheme.</title>
63
              <imagedata fileref="images.vector/frame_alloc.svg" format="SVG" />
-
 
64
            </imageobject>
-
 
65
          </mediaobject>
333
      </figure>
66
 
334
 
-
 
335
      <formalpara>
67
          <title>Frame allocator scheme.</title>
336
        <title>Overview</title>
-
 
337
 
-
 
338
        <para>Frame allocator provides physical memory allocation for the
-
 
339
        kernel. Because of zonal organization of physical memory, frame
-
 
340
        allocator is always working in context of some zone, thus making
-
 
341
        impossible to allocate a piece of memory, which lays in different
-
 
342
        zone, which cannot happen, because two adjacent zones can be merged
-
 
343
        into one. Frame allocator is also being responsible to update
-
 
344
        information on the number of free/busy frames in zone. Physical memory
-
 
345
        allocation inside one <link linkend="zones_and_frames">memory
-
 
346
        zone</link> is being handled by an instance of <link
-
 
347
        linkend="buddy_allocator">buddy allocator</link> tailored to allocate
-
 
348
        blocks of physical memory frames.</para>
68
        </figure></para>
349
      </formalpara>
69
 
350
 
70
      <formalpara>
351
      <formalpara>
71
        <title>Allocation / deallocation</title>
352
        <title>Allocation / deallocation</title>
72
 
353
 
73
        <para>Upon allocation request via function <code>frame_alloc</code>,
354
        <para>Upon allocation request, frame allocator tries to find first
74
        the frame allocator first tries to find a zone that can satisfy the
355
        zone, that can satisfy the incoming request (has required amount of
75
        request (i.e. has the required amount of free frames). Once a suitable
356
        free frames to allocate). During deallocation, frame allocator needs
76
        zone is found, the frame allocator uses the buddy allocator on the
357
        to find zone, that contain deallocated frame. This approach could
77
        zone's buddy system to perform the allocation. During deallocation,
358
        bring up two potential problems: <itemizedlist>
78
        which is triggered by a call to <code>frame_free</code>, the frame
359
            <listitem>
79
        allocator looks up the respective zone that contains the frame being
360
               Linear search of zones does not any good to performance, but number of zones is not expected to be high. And if yes, list of zones can be replaced with more time-efficient B-tree.
-
 
361
            </listitem>
-
 
362
 
-
 
363
            <listitem>
80
        deallocated. Afterwards, it calls the buddy allocator again, this time
364
               Quickly find out if zone contains required number of frames to allocate and if this chunk of memory is properly aligned. This issue is perfectly solved bu the buddy allocator.
-
 
365
            </listitem>
81
        to take care of deallocation within the zone's buddy system.</para>
366
          </itemizedlist></para>
82
      </formalpara>
367
      </formalpara>
83
    </section>
368
    </section>
84
 
369
 
85
    <section id="buddy_allocator">
370
    <section id="buddy_allocator">
86
      <title>Buddy allocator</title>
371
      <title>Buddy allocator</title>
87
 
372
 
88
      <para>In the buddy system, the memory is broken down into power-of-two
-
 
89
      sized naturally aligned blocks. These blocks are organized in an array
-
 
90
      of lists, in which the list with index i contains all unallocated blocks
-
 
91
      of size <mathphrase>2<superscript>i</superscript></mathphrase>. The
-
 
92
      index i is called the order of block. Should there be two adjacent
-
 
93
      equally sized blocks in the list i<mathphrase />(i.e. buddies), the
-
 
94
      buddy allocator would coalesce them and put the resulting block in list
-
 
95
      <mathphrase>i + 1</mathphrase>, provided that the resulting block would
-
 
96
      be naturally aligned. Similarily, when the allocator is asked to
-
 
97
      allocate a block of size
373
      <section>
98
      <mathphrase>2<superscript>i</superscript></mathphrase>, it first tries
-
 
99
      to satisfy the request from the list with index i. If the request cannot
-
 
100
      be satisfied (i.e. the list i is empty), the buddy allocator will try to
-
 
101
      allocate and split a larger block from the list with index i + 1. Both
-
 
102
      of these algorithms are recursive. The recursion ends either when there
-
 
103
      are no blocks to coalesce in the former case or when there are no blocks
-
 
104
      that can be split in the latter case.</para>
374
        <title>Overview</title>
105
 
375
 
106
      <para>This approach greatly reduces external fragmentation of memory and
-
 
107
      helps in allocating bigger continuous blocks of memory aligned to their
-
 
108
      size. On the other hand, the buddy allocator suffers increased internal
-
 
109
      fragmentation of memory and is not suitable for general kernel
-
 
110
      allocations. This purpose is better addressed by the <link
-
 
111
      linkend="slab">slab allocator</link>.<figure>
376
        <figure>
112
          <mediaobject id="buddy_alloc">
377
          <mediaobject id="buddy_alloc">
113
            <imageobject role="html">
378
            <imageobject role="html">
114
              <imagedata fileref="images/buddy_alloc.png" format="PNG" />
379
              <imagedata fileref="images/buddy_alloc.png" format="PNG" />
115
            </imageobject>
380
            </imageobject>
116
 
381
 
117
            <imageobject role="fop">
382
            <imageobject role="fop">
118
              <imagedata fileref="images.vector/buddy_alloc.svg" format="SVG" />
383
              <imagedata fileref="images.vector/buddy_alloc.svg" format="SVG" />
119
            </imageobject>
384
            </imageobject>
120
          </mediaobject>
385
          </mediaobject>
121
 
386
 
122
          <title>Buddy system scheme.</title>
387
          <title>Buddy system scheme.</title>
123
        </figure></para>
388
        </figure>
-
 
389
 
-
 
390
        <para>In the buddy allocator, the memory is broken down into
-
 
391
        power-of-two sized naturally aligned blocks. These blocks are
-
 
392
        organized in an array of lists, in which the list with index i
-
 
393
        contains all unallocated blocks of size
-
 
394
        <mathphrase>2<superscript>i</superscript></mathphrase>. The index i is
-
 
395
        called the order of block. Should there be two adjacent equally sized
-
 
396
        blocks in the list i<mathphrase />(i.e. buddies), the buddy allocator
-
 
397
        would coalesce them and put the resulting block in list <mathphrase>i
-
 
398
        + 1</mathphrase>, provided that the resulting block would be naturally
-
 
399
        aligned. Similarily, when the allocator is asked to allocate a block
-
 
400
        of size <mathphrase>2<superscript>i</superscript></mathphrase>, it
-
 
401
        first tries to satisfy the request from the list with index i. If the
-
 
402
        request cannot be satisfied (i.e. the list i is empty), the buddy
-
 
403
        allocator will try to allocate and split a larger block from the list
-
 
404
        with index i + 1. Both of these algorithms are recursive. The
-
 
405
        recursion ends either when there are no blocks to coalesce in the
-
 
406
        former case or when there are no blocks that can be split in the
-
 
407
        latter case.</para>
-
 
408
 
-
 
409
        <!--graphic fileref="images/mm1.png" format="EPS" /-->
-
 
410
 
-
 
411
        <para>This approach greatly reduces external fragmentation of memory
-
 
412
        and helps in allocating bigger continuous blocks of memory aligned to
-
 
413
        their size. On the other hand, the buddy allocator suffers increased
-
 
414
        internal fragmentation of memory and is not suitable for general
-
 
415
        kernel allocations. This purpose is better addressed by the <link
-
 
416
        linkend="slab">slab allocator</link>.</para>
-
 
417
      </section>
124
 
418
 
125
      <section>
419
      <section>
126
        <title>Implementation</title>
420
        <title>Implementation</title>
127
 
421
 
128
        <para>The buddy allocator is, in fact, an abstract framework wich can
422
        <para>The buddy allocator is, in fact, an abstract framework wich can
129
        be easily specialized to serve one particular task. It knows nothing
423
        be easily specialized to serve one particular task. It knows nothing
130
        about the nature of memory it helps to allocate. In order to beat the
424
        about the nature of memory it helps to allocate. In order to beat the
131
        lack of this knowledge, the buddy allocator exports an interface that
425
        lack of this knowledge, the buddy allocator exports an interface that
132
        each of its clients is required to implement. When supplied with an
426
        each of its clients is required to implement. When supplied with an
133
        implementation of this interface, the buddy allocator can use
427
        implementation of this interface, the buddy allocator can use
134
        specialized external functions to find a buddy for a block, split and
428
        specialized external functions to find a buddy for a block, split and
135
        coalesce blocks, manipulate block order and mark blocks busy or
429
        coalesce blocks, manipulate block order and mark blocks busy or
136
        available.</para>
430
        available. For precise documentation of this interface, refer to
-
 
431
        <emphasis>"HelenOS Generic Kernel Reference Manual"</emphasis>.</para>
137
 
432
 
138
        <formalpara>
433
        <formalpara>
139
          <title>Data organization</title>
434
          <title>Data organization</title>
140
 
435
 
141
          <para>Each entity allocable by the buddy allocator is required to
436
          <para>Each entity allocable by the buddy allocator is required to
142
          contain space for storing block order number and a link variable
437
          contain space for storing block order number and a link variable
143
          used to interconnect blocks within the same order.</para>
438
          used to interconnect blocks within the same order.</para>
144
 
439
 
145
          <para>Whatever entities are allocated by the buddy allocator, the
440
          <para>Whatever entities are allocated by the buddy allocator, the
146
          first entity within a block is used to represent the entire block.
441
          first entity within a block is used to represent the entire block.
147
          The first entity keeps the order of the whole block. Other entities
442
          The first entity keeps the order of the whole block. Other entities
148
          within the block are assigned the magic value
443
          within the block are assigned the magic value
149
          <constant>BUDDY_INNER_BLOCK</constant>. This is especially important
444
          <constant>BUDDY_INNER_BLOCK</constant>. This is especially important
150
          for effective identification of buddies in a one-dimensional array
445
          for effective identification of buddies in a one-dimensional array
151
          because the entity that represents a potential buddy cannot be
446
          because the entity that represents a potential buddy cannot be
152
          associated with <constant>BUDDY_INNER_BLOCK</constant> (i.e. if it
447
          associated with <constant>BUDDY_INNER_BLOCK</constant> (i.e. if it
153
          is associated with <constant>BUDDY_INNER_BLOCK</constant> then it is
448
          is associated with <constant>BUDDY_INNER_BLOCK</constant> then it is
154
          not a buddy).</para>
449
          not a buddy).</para>
-
 
450
 
-
 
451
          <para>The buddy allocator always uses the first frame to represent
-
 
452
          the frame block. This frame contains <varname>buddy_order</varname>
-
 
453
          variable to provide information about the block size it actually
-
 
454
          represents (
-
 
455
          <mathphrase>2<superscript>buddy_order</superscript></mathphrase>
-
 
456
          frames block). Other frames in block have this value set to magic
-
 
457
          <constant>BUDDY_INNER_BLOCK</constant> that is much greater than
-
 
458
          buddy <varname>max_order</varname> value.</para>
-
 
459
 
-
 
460
          <para>Each <varname>frame_t</varname> also contains pointer member
-
 
461
          to hold frame structure in the linked list inside one order.</para>
-
 
462
        </formalpara>
-
 
463
 
-
 
464
        <formalpara>
-
 
465
          <title>Allocation algorithm</title>
-
 
466
 
-
 
467
          <para>Upon <mathphrase>2<superscript>i</superscript></mathphrase>
-
 
468
          frames block allocation request, allocator checks if there are any
-
 
469
          blocks available at the order list <varname>i</varname>. If yes,
-
 
470
          removes block from order list and returns its address. If no,
-
 
471
          recursively allocates
-
 
472
          <mathphrase>2<superscript>i+1</superscript></mathphrase> frame
-
 
473
          block, splits it into two
-
 
474
          <mathphrase>2<superscript>i</superscript></mathphrase> frame blocks.
-
 
475
          Then adds one of the blocks to the <varname>i</varname> order list
-
 
476
          and returns address of another.</para>
-
 
477
        </formalpara>
-
 
478
 
-
 
479
        <formalpara>
-
 
480
          <title>Deallocation algorithm</title>
-
 
481
 
-
 
482
          <para>Check if block has so called buddy (another free
-
 
483
          <mathphrase>2<superscript>i</superscript></mathphrase> frame block
-
 
484
          that can be linked with freed block into the
-
 
485
          <mathphrase>2<superscript>i+1</superscript></mathphrase> block).
-
 
486
          Technically, buddy is a odd/even block for even/odd block
-
 
487
          respectively. Plus we can put an extra requirement, that resulting
-
 
488
          block must be aligned to its size. This requirement guarantees
-
 
489
          natural block alignment for the blocks coming out the allocation
-
 
490
          system.</para>
-
 
491
 
-
 
492
          <para>Using direct pointer arithmetics,
-
 
493
          <varname>frame_t::ref_count</varname> and
-
 
494
          <varname>frame_t::buddy_order</varname> variables, finding buddy is
-
 
495
          done at constant time.</para>
155
        </formalpara>
496
        </formalpara>
156
      </section>
497
      </section>
157
    </section>
498
    </section>
158
 
499
 
159
    <section id="slab">
500
    <section id="slab">
160
      <title>Slab allocator</title>
501
      <title>Slab allocator</title>
161
 
502
 
162
      <para>The majority of memory allocation requests in the kernel is for
-
 
163
      small, frequently used data structures. The basic idea behind the slab
-
 
164
      allocator is that commonly used objects are preallocated in continuous
-
 
165
      areas of physical memory called slabs<footnote>
-
 
166
          <para>Slabs are in fact blocks of physical memory frames allocated
-
 
167
          from the frame allocator.</para>
-
 
168
        </footnote>. Whenever an object is to be allocated, the slab allocator
-
 
169
      returns the first available item from a suitable slab corresponding to
-
 
170
      the object type<footnote>
503
      <section>
171
          <para>The mechanism is rather more complicated, see the next
-
 
172
          paragraph.</para>
504
        <title>Overview</title>
173
        </footnote>. Due to the fact that the sizes of the requested and
-
 
174
      allocated object match, the slab allocator significantly freduces
-
 
175
      internal fragmentation.</para>
-
 
176
 
-
 
177
      <para>Slabs of one object type are organized in a structure called slab
-
 
178
      cache. There are ususally more slabs in the slab cache, depending on
-
 
179
      previous allocations. If the the slab cache runs out of available slabs,
-
 
180
      new slabs are allocated. In order to exploit parallelism and to avoid
-
 
181
      locking of shared spinlocks, slab caches can have variants of
-
 
182
      CPU-private slabs called magazines. Each object begins its life in a
-
 
183
      slab. When it is allocated from there, the slab allocator calls a
-
 
184
      constructor that is registered in the respective slab cache. The
-
 
185
      constructor initializes and brings the object into a known state. The
-
 
186
      object is then used by the user. When the user later frees the object,
-
 
187
      the slab allocator puts it into a CPU-private magazine, from where it
-
 
188
      can be precedently allocated again. Note that allocations satisfied from
-
 
189
      a magazine are already initialized by the constructor.</para>
-
 
190
 
-
 
191
      <para>Should HelenOS run short of memory, it would start deallocating
-
 
192
      objects from magazines, calling slab cache destructor on them and
-
 
193
      putting them back into slabs. When a slab contanins no allocated object,
-
 
194
      it is immediately freed.</para>
-
 
195
 
505
 
-
 
506
        <para><termdef><glossterm>Slab</glossterm> represents a contiguous
-
 
507
        piece of memory, usually made of several physically contiguous
-
 
508
        pages.</termdef> <termdef><glossterm>Slab cache</glossterm> consists
-
 
509
        of one or more slabs.</termdef></para>
-
 
510
 
-
 
511
        <para>The majority of memory allocation requests in the kernel are for
-
 
512
        small, frequently used data structures. For this purpose the slab
-
 
513
        allocator is a perfect solution. The basic idea behind the slab
-
 
514
        allocator is to have lists of commonly used objects available packed
-
 
515
        into pages. This avoids the overhead of allocating and destroying
-
 
516
        commonly used types of objects such threads, virtual memory structures
-
 
517
        etc. Also due to the exact allocated size matching, slab allocation
-
 
518
        completely eliminates internal fragmentation issue.</para>
-
 
519
      </section>
-
 
520
 
-
 
521
      <section>
-
 
522
        <title>Implementation</title>
-
 
523
 
196
      <para><figure>
524
        <figure>
197
          <mediaobject id="slab_alloc">
525
          <mediaobject id="slab_alloc">
198
            <imageobject role="html">
526
            <imageobject role="html">
199
              <imagedata fileref="images/slab_alloc.png" format="PNG" />
527
              <imagedata fileref="images/slab_alloc.png" format="PNG" />
200
            </imageobject>
528
            </imageobject>
-
 
529
 
-
 
530
            <imageobject role="fop">
-
 
531
              <imagedata fileref="images.vector/slab_alloc.svg" format="SVG" />
-
 
532
            </imageobject>
201
          </mediaobject>
533
          </mediaobject>
202
 
534
 
203
          <title>Slab allocator scheme.</title>
535
          <title>Slab allocator scheme.</title>
204
        </figure></para>
536
        </figure>
205
 
-
 
206
      <section>
-
 
207
        <title>Implementation</title>
-
 
208
 
537
 
209
        <para>The slab allocator is closely modelled after <ulink
538
        <para>The slab allocator is closely modelled after <ulink
210
        url="http://www.usenix.org/events/usenix01/full_papers/bonwick/bonwick_html/">
539
        url="http://www.usenix.org/events/usenix01/full_papers/bonwick/bonwick_html/">
211
        OpenSolaris slab allocator by Jeff Bonwick and Jonathan Adams </ulink>
540
        OpenSolaris slab allocator by Jeff Bonwick and Jonathan Adams </ulink>
212
        with the following exceptions:<itemizedlist>
541
        with the following exceptions: <itemizedlist>
-
 
542
            <listitem>
-
 
543
               empty slabs are deallocated immediately (in Linux they are kept in linked list, in Solaris ???)
-
 
544
            </listitem>
-
 
545
 
213
            <listitem>
546
            <listitem>
214
               empty magazines are deallocated when not needed
547
               empty magazines are deallocated when not needed (in Solaris they are held in linked list in slab cache)
215
            </listitem>
548
            </listitem>
216
          </itemizedlist> Following features are not currently supported but
549
          </itemizedlist> Following features are not currently supported but
217
        would be easy to do: <itemizedlist>
550
        would be easy to do: <itemizedlist>
218
            <listitem>
551
            <listitem>
219
               cache coloring
552
               - cache coloring
220
            </listitem>
553
            </listitem>
221
 
554
 
222
            <listitem>
555
            <listitem>
223
               dynamic magazine grow (different magazine sizes are already supported, but we would need to adjust allocation strategy)
556
               - dynamic magazine grow (different magazine sizes are already supported, but we would need to adjust allocation strategy)
224
            </listitem>
557
            </listitem>
225
          </itemizedlist></para>
558
          </itemizedlist></para>
226
 
559
 
227
        <section>
560
        <section>
228
          <title>Magazine layer</title>
561
          <title>Magazine layer</title>
229
 
562
 
230
          <para>Due to the extensive bottleneck on SMP architures, caused by
563
          <para>Due to the extensive bottleneck on SMP architures, caused by
231
          global slab locking mechanism, making processing of all slab
564
          global slab locking mechanism, making processing of all slab
232
          allocation requests serialized, a new layer was introduced to the
565
          allocation requests serialized, a new layer was introduced to the
233
          classic slab allocator design. Slab allocator was extended to
566
          classic slab allocator design. Slab allocator was extended to
234
          support per-CPU caches 'magazines' to achieve good SMP scaling.
567
          support per-CPU caches 'magazines' to achieve good SMP scaling.
235
          <termdef>Slab SMP perfromance bottleneck was resolved by introducing
568
          <termdef>Slab SMP perfromance bottleneck was resolved by introducing
236
          a per-CPU caching scheme called as <glossterm>magazine
569
          a per-CPU caching scheme called as <glossterm>magazine
237
          layer</glossterm></termdef>.</para>
570
          layer</glossterm></termdef>.</para>
238
 
571
 
239
          <para>Magazine is a N-element cache of objects, so each magazine can
572
          <para>Magazine is a N-element cache of objects, so each magazine can
240
          satisfy N allocations. Magazine behaves like a automatic weapon
573
          satisfy N allocations. Magazine behaves like a automatic weapon
241
          magazine (LIFO, stack), so the allocation/deallocation become simple
574
          magazine (LIFO, stack), so the allocation/deallocation become simple
242
          push/pop pointer operation. Trick is that CPU does not access global
575
          push/pop pointer operation. Trick is that CPU does not access global
243
          slab allocator data during the allocation from its magazine, thus
576
          slab allocator data during the allocation from its magazine, thus
244
          making possible parallel allocations between CPUs.</para>
577
          making possible parallel allocations between CPUs.</para>
245
 
578
 
246
          <para>Implementation also requires adding another feature as the
579
          <para>Implementation also requires adding another feature as the
247
          CPU-bound magazine is actually a pair of magazines to avoid
580
          CPU-bound magazine is actually a pair of magazines to avoid
248
          thrashing when during allocation/deallocatiion of 1 item at the
581
          thrashing when during allocation/deallocatiion of 1 item at the
249
          magazine size boundary. LIFO order is enforced, which should avoid
582
          magazine size boundary. LIFO order is enforced, which should avoid
250
          fragmentation as much as possible.</para>
583
          fragmentation as much as possible.</para>
251
 
584
 
252
          <para>Another important entity of magazine layer is the common full
585
          <para>Another important entity of magazine layer is the common full
253
          magazine list (also called a depot), that stores full magazines that
586
          magazine list (also called a depot), that stores full magazines that
254
          may be used by any of the CPU magazine caches to reload active CPU
587
          may be used by any of the CPU magazine caches to reload active CPU
255
          magazine. This list of magazines can be pre-filled with full
588
          magazine. This list of magazines can be pre-filled with full
256
          magazines during initialization, but in current implementation it is
589
          magazines during initialization, but in current implementation it is
257
          filled during object deallocation, when CPU magazine becomes
590
          filled during object deallocation, when CPU magazine becomes
258
          full.</para>
591
          full.</para>
259
 
592
 
260
          <para>Slab allocator control structures are allocated from special
593
          <para>Slab allocator control structures are allocated from special
261
          slabs, that are marked by special flag, indicating that it should
594
          slabs, that are marked by special flag, indicating that it should
262
          not be used for slab magazine layer. This is done to avoid possible
595
          not be used for slab magazine layer. This is done to avoid possible
263
          infinite recursions and deadlock during conventional slab allocaiton
596
          infinite recursions and deadlock during conventional slab allocaiton
264
          requests.</para>
597
          requests.</para>
265
        </section>
598
        </section>
266
 
599
 
267
        <section>
600
        <section>
268
          <title>Allocation/deallocation</title>
601
          <title>Allocation/deallocation</title>
269
 
602
 
270
          <para>Every cache contains list of full slabs and list of partialy
603
          <para>Every cache contains list of full slabs and list of partialy
271
          full slabs. Empty slabs are immediately freed (thrashing will be
604
          full slabs. Empty slabs are immediately freed (thrashing will be
272
          avoided because of magazines).</para>
605
          avoided because of magazines).</para>
273
 
606
 
274
          <para>The SLAB allocator allocates lots of space and does not free
607
          <para>The SLAB allocator allocates lots of space and does not free
275
          it. When frame allocator fails to allocate the frame, it calls
608
          it. When frame allocator fails to allocate the frame, it calls
276
          slab_reclaim(). It tries 'light reclaim' first, then brutal reclaim.
609
          slab_reclaim(). It tries 'light reclaim' first, then brutal reclaim.
277
          The light reclaim releases slabs from cpu-shared magazine-list,
610
          The light reclaim releases slabs from cpu-shared magazine-list,
278
          until at least 1 slab is deallocated in each cache (this algorithm
611
          until at least 1 slab is deallocated in each cache (this algorithm
279
          should probably change). The brutal reclaim removes all cached
612
          should probably change). The brutal reclaim removes all cached
280
          objects, even from CPU-bound magazines.</para>
613
          objects, even from CPU-bound magazines.</para>
281
 
614
 
282
          <formalpara>
615
          <formalpara>
283
            <title>Allocation</title>
616
            <title>Allocation</title>
284
 
617
 
285
            <para><emphasis>Step 1.</emphasis> When it comes to the allocation
618
            <para><emphasis>Step 1.</emphasis> When it comes to the allocation
286
            request, slab allocator first of all checks availability of memory
619
            request, slab allocator first of all checks availability of memory
287
            in local CPU-bound magazine. If it is there, we would just "pop"
620
            in local CPU-bound magazine. If it is there, we would just "pop"
288
            the CPU magazine and return the pointer to object.</para>
621
            the CPU magazine and return the pointer to object.</para>
289
 
622
 
290
            <para><emphasis>Step 2.</emphasis> If the CPU-bound magazine is
623
            <para><emphasis>Step 2.</emphasis> If the CPU-bound magazine is
291
            empty, allocator will attempt to reload magazin, swapping it with
624
            empty, allocator will attempt to reload magazin, swapping it with
292
            second CPU magazine and returns to the first step.</para>
625
            second CPU magazine and returns to the first step.</para>
293
 
626
 
294
            <para><emphasis>Step 3.</emphasis> Now we are in the situation
627
            <para><emphasis>Step 3.</emphasis> Now we are in the situation
295
            when both CPU-bound magazines are empty, which makes allocator to
628
            when both CPU-bound magazines are empty, which makes allocator to
296
            access shared full-magazines depot to reload CPU-bound magazines.
629
            access shared full-magazines depot to reload CPU-bound magazines.
297
            If reload is succesful (meaning there are full magazines in depot)
630
            If reload is succesful (meaning there are full magazines in depot)
298
            algoritm continues at Step 1.</para>
631
            algoritm continues at Step 1.</para>
299
 
632
 
300
            <para><emphasis>Step 4.</emphasis> Final step of the allocation.
633
            <para><emphasis>Step 4.</emphasis> Final step of the allocation.
301
            In this step object is allocated from the conventional slab layer
634
            In this step object is allocated from the conventional slab layer
302
            and pointer is returned.</para>
635
            and pointer is returned.</para>
303
          </formalpara>
636
          </formalpara>
304
 
637
 
305
          <formalpara>
638
          <formalpara>
306
            <title>Deallocation</title>
639
            <title>Deallocation</title>
307
 
640
 
308
            <para><emphasis>Step 1.</emphasis> During deallocation request,
641
            <para><emphasis>Step 1.</emphasis> During deallocation request,
309
            slab allocator will check if the local CPU-bound magazine is not
642
            slab allocator will check if the local CPU-bound magazine is not
310
            full. In this case we will just push the pointer to this
643
            full. In this case we will just push the pointer to this
311
            magazine.</para>
644
            magazine.</para>
312
 
645
 
313
            <para><emphasis>Step 2.</emphasis> If the CPU-bound magazine is
646
            <para><emphasis>Step 2.</emphasis> If the CPU-bound magazine is
314
            full, allocator will attempt to reload magazin, swapping it with
647
            full, allocator will attempt to reload magazin, swapping it with
315
            second CPU magazine and returns to the first step.</para>
648
            second CPU magazine and returns to the first step.</para>
316
 
649
 
317
            <para><emphasis>Step 3.</emphasis> Now we are in the situation
650
            <para><emphasis>Step 3.</emphasis> Now we are in the situation
318
            when both CPU-bound magazines are full, which makes allocator to
651
            when both CPU-bound magazines are full, which makes allocator to
319
            access shared full-magazines depot to put one of the magazines to
652
            access shared full-magazines depot to put one of the magazines to
320
            the depot and creating new empty magazine. Algoritm continues at
653
            the depot and creating new empty magazine. Algoritm continues at
321
            Step 1.</para>
654
            Step 1.</para>
322
          </formalpara>
655
          </formalpara>
323
        </section>
656
        </section>
324
      </section>
657
      </section>
325
    </section>
658
    </section>
326
 
659
 
327
    <!-- End of Physmem -->
660
    <!-- End of Physmem -->
328
  </section>
661
  </section>
329
 
662
 
330
  <section>
663
  <section>
331
    <title>Virtual memory management</title>
664
    <title>Memory sharing</title>
332
 
665
 
333
    <section>
-
 
334
      <title>Introduction</title>
-
 
335
 
-
 
336
      <para>Virtual memory is a special memory management technique, used by
-
 
337
      kernel to achieve a bunch of mission critical goals. <itemizedlist>
-
 
338
          <listitem>
-
 
339
             Isolate each task from other tasks that are running on the system at the same time.
-
 
340
          </listitem>
-
 
341
 
-
 
342
          <listitem>
-
 
343
             Allow to allocate more memory, than is actual physical memory size of the machine.
-
 
344
          </listitem>
-
 
345
 
-
 
346
          <listitem>
-
 
347
             Allowing, in general, to load and execute two programs that are linked on the same address without complicated relocations.
-
 
348
          </listitem>
-
 
349
        </itemizedlist></para>
-
 
350
 
-
 
351
      <para><!--
-
 
352
 
-
 
353
                TLB shootdown ASID/ASID:PAGE/ALL.
-
 
354
                TLB shootdown requests can come in asynchroniously
-
 
355
                so there is a cache of TLB shootdown requests. Upon cache overflow TLB shootdown ALL is executed
-
 
356
 
-
 
357
 
-
 
358
                <para>
-
 
359
                        Address spaces. Address space area (B+ tree). Only for uspace. Set of syscalls (shrink/extend etc).
-
 
360
                        Special address space area type - device - prohibits shrink/extend syscalls to call on it.
-
 
361
                        Address space has link to mapping tables (hierarchical - per Address space, hash - global tables).
-
 
362
                </para>
-
 
363
 
-
 
364
--></para>
-
 
365
    </section>
-
 
366
 
-
 
367
    <section>
-
 
368
      <title>Paging</title>
-
 
369
 
-
 
370
      <para>Virtual memory is usually using paged memory model, where virtual
-
 
371
      memory address space is divided into the <emphasis>pages</emphasis>
-
 
372
      (usually having size 4096 bytes) and physical memory is divided into the
-
 
373
      frames (same sized as a page, of course). Each page may be mapped to
-
 
374
      some frame and then, upon memory access to the virtual address, CPU
-
 
375
      performs <emphasis>address translation</emphasis> during the instruction
-
 
376
      execution. Non-existing mapping generates page fault exception, calling
-
 
377
      kernel exception handler, thus allowing kernel to manipulate rules of
-
 
378
      memory access. Information for pages mapping is stored by kernel in the
-
 
379
      <link linkend="page_tables">page tables</link></para>
-
 
380
 
-
 
381
      <para>The majority of the architectures use multi-level page tables,
-
 
382
      which means need to access physical memory several times before getting
-
 
383
      physical address. This fact would make serios performance overhead in
-
 
384
      virtual memory management. To avoid this <link linkend="tlb">Traslation
-
 
385
      Lookaside Buffer (TLB)</link> is used.</para>
-
 
386
    </section>
-
 
387
 
-
 
388
    <section>
-
 
389
      <title>Address spaces</title>
-
 
390
 
-
 
391
      <section>
-
 
392
        <title>Address space areas</title>
-
 
393
 
-
 
394
        <para>Each address space consists of mutually disjunctive continuous
-
 
395
        address space areas. Address space area is precisely defined by its
-
 
396
        base address and the number of frames/pages is contains.</para>
-
 
397
 
-
 
398
        <para>Address space area , that define behaviour and permissions on
-
 
399
        the particular area. <itemizedlist>
-
 
400
            <listitem>
-
 
401
               
-
 
402
 
-
 
403
              <emphasis>AS_AREA_READ</emphasis>
-
 
404
 
-
 
405
               flag indicates reading permission.
-
 
406
            </listitem>
-
 
407
 
-
 
408
            <listitem>
-
 
409
               
-
 
410
 
-
 
411
              <emphasis>AS_AREA_WRITE</emphasis>
-
 
412
 
-
 
413
               flag indicates writing permission.
-
 
414
            </listitem>
-
 
415
 
-
 
416
            <listitem>
-
 
417
               
-
 
418
 
-
 
419
              <emphasis>AS_AREA_EXEC</emphasis>
-
 
420
 
-
 
421
               flag indicates code execution permission. Some architectures do not support execution persmission restriction. In this case this flag has no effect.
-
 
422
            </listitem>
-
 
423
 
-
 
424
            <listitem>
-
 
425
               
-
 
426
 
-
 
427
              <emphasis>AS_AREA_DEVICE</emphasis>
-
 
428
 
-
 
429
               marks area as mapped to the device memory.
-
 
430
            </listitem>
-
 
431
          </itemizedlist></para>
-
 
432
 
-
 
433
        <para>Kernel provides possibility tasks create/expand/shrink/share its
-
 
434
        address space via the set of syscalls.</para>
-
 
435
      </section>
-
 
436
 
-
 
437
      <section>
-
 
438
        <title>Address Space ID (ASID)</title>
-
 
439
 
-
 
440
        <para>When switching to the different task, kernel also require to
-
 
441
        switch mappings to the different address space. In case TLB cannot
-
 
442
        distinguish address space mappings, all mapping information in TLB
-
 
443
        from the old address space must be flushed, which can create certain
-
 
444
        uncessary overhead during the task switching. To avoid this, some
-
 
445
        architectures have capability to segregate different address spaces on
-
 
446
        hardware level introducing the address space identifier as a part of
-
 
447
        TLB record, telling the virtual address space translation unit to
-
 
448
        which address space this record is applicable.</para>
-
 
449
 
-
 
450
        <para>HelenOS kernel can take advantage of this hardware supported
-
 
451
        identifier by having an ASID abstraction which is somehow related to
-
 
452
        the corresponding architecture identifier. I.e. on ia64 kernel ASID is
-
 
453
        derived from RID (region identifier) and on the mips32 kernel ASID is
-
 
454
        actually the hardware identifier. As expected, this ASID information
-
 
455
        record is the part of <emphasis>as_t</emphasis> structure.</para>
-
 
456
 
-
 
457
        <para>Due to the hardware limitations, hardware ASID has limited
-
 
458
        length from 8 bits on ia64 to 24 bits on mips32, which makes it
-
 
459
        impossible to use it as unique address space identifier for all tasks
-
 
460
        running in the system. In such situations special ASID stealing
-
 
461
        algoritm is used, which takes ASID from inactive task and assigns it
-
 
462
        to the active task.</para>
-
 
463
 
-
 
464
        <para><classname>ASID stealing algoritm here.</classname></para>
-
 
465
      </section>
-
 
466
    </section>
-
 
467
 
-
 
468
    <section>
-
 
469
      <title>Virtual address translation</title>
-
 
470
 
-
 
471
      <section id="page_tables">
-
 
472
        <title>Page tables</title>
-
 
473
 
-
 
474
        <para>HelenOS kernel has two different approaches to the paging
-
 
475
        implementation: <emphasis>4 level page tables</emphasis> and
-
 
476
        <emphasis>global hash tables</emphasis>, which are accessible via
-
 
477
        generic paging abstraction layer. Such different functionality was
-
 
478
        caused by the major architectural differences between supported
-
 
479
        platforms. This abstraction is implemented with help of the global
-
 
480
        structure of pointers to basic mapping functions
-
 
481
        <emphasis>page_mapping_operations</emphasis>. To achieve different
-
 
482
        functionality of page tables, corresponding layer must implement
-
 
483
        functions, declared in
-
 
484
        <emphasis>page_mapping_operations</emphasis></para>
-
 
485
 
-
 
486
        <formalpara>
-
 
487
          <title>4-level page tables</title>
-
 
488
 
-
 
489
          <para>4-level page tables are the generalization of the hardware
-
 
490
          capabilities of several architectures.<itemizedlist>
-
 
491
              <listitem>
-
 
492
                 ia32 uses 2-level page tables, with full hardware support.
-
 
493
              </listitem>
-
 
494
 
-
 
495
              <listitem>
-
 
496
                 amd64 uses 4-level page tables, also coming with full hardware support.
-
 
497
              </listitem>
-
 
498
 
-
 
499
              <listitem>
-
 
500
                 mips and ppc32 have 2-level tables, software simulated support.
-
 
501
              </listitem>
-
 
502
            </itemizedlist></para>
666
    <para>Not implemented yet(?)</para>
503
        </formalpara>
-
 
504
 
-
 
505
        <formalpara>
-
 
506
          <title>Global hash tables</title>
-
 
507
 
-
 
508
          <para>- global page hash table: existuje jen jedna v celem systemu
-
 
509
          (vyuziva ji ia64), pozn. ia64 ma zatim vypnuty VHPT. Pouziva se
-
 
510
          genericke hash table s oddelenymi collision chains. ASID support is
-
 
511
          required to use global hash tables.</para>
-
 
512
        </formalpara>
-
 
513
 
-
 
514
        <para>Thanks to the abstract paging interface, there is possibility
-
 
515
        left have more paging implementations, for example B-Tree page
-
 
516
        tables.</para>
-
 
517
      </section>
-
 
518
 
-
 
519
      <section id="tlb">
-
 
520
        <title>Translation Lookaside buffer</title>
-
 
521
 
-
 
522
        <para>Due to the extensive overhead during the page mapping lookup in
-
 
523
        the page tables, all architectures has fast assotiative cache memory
-
 
524
        built-in CPU. This memory called TLB stores recently used page table
-
 
525
        entries.</para>
-
 
526
 
-
 
527
        <section id="tlb_shootdown">
-
 
528
          <title>TLB consistency. TLB shootdown algorithm.</title>
-
 
529
 
-
 
530
          <para>Operating system is responsible for keeping TLB consistent by
-
 
531
          invalidating the contents of TLB, whenever there is some change in
-
 
532
          page tables. Those changes may occur when page or group of pages
-
 
533
          were unmapped, mapping is changed or system switching active address
-
 
534
          space to schedule a new system task (which is a batch unmap of all
-
 
535
          address space mappings). Moreover, this invalidation operation must
-
 
536
          be done an all system CPUs because each CPU has its own independent
-
 
537
          TLB cache. Thus maintaining TLB consistency on SMP configuration as
-
 
538
          not as trivial task as it looks at the first glance. Naive solution
-
 
539
          would assume remote TLB invalidatation, which is not possible on the
-
 
540
          most of the architectures, because of the simple fact - flushing TLB
-
 
541
          is allowed only on the local CPU and there is no possibility to
-
 
542
          access other CPUs' TLB caches.</para>
-
 
543
 
-
 
544
          <para>Technique of remote invalidation of TLB entries is called "TLB
-
 
545
          shootdown". HelenOS uses a variation of the algorithm described by
-
 
546
          D. Black et al., "Translation Lookaside Buffer Consistency: A
-
 
547
          Software Approach," Proc. Third Int'l Conf. Architectural Support
-
 
548
          for Programming Languages and Operating Systems, 1989, pp.
-
 
549
          113-122.</para>
-
 
550
 
-
 
551
          <para>As the situation demands, you will want partitial invalidation
-
 
552
          of TLB caches. In case of simple memory mapping change it is
-
 
553
          necessary to invalidate only one or more adjacent pages. In case if
-
 
554
          the architecture is aware of ASIDs, during the address space
-
 
555
          switching, kernel invalidates only entries from this particular
-
 
556
          address space. Final option of the TLB invalidation is the complete
-
 
557
          TLB cache invalidation, which is the operation that flushes all
-
 
558
          entries in TLB.</para>
-
 
559
 
-
 
560
          <para>TLB shootdown is performed in two phases. First, the initiator
-
 
561
          process sends an IPI message indicating the TLB shootdown request to
-
 
562
          the rest of the CPUs. Then, it waits until all CPUs confirm TLB
-
 
563
          invalidating action execution.</para>
-
 
564
        </section>
-
 
565
      </section>
-
 
566
    </section>
-
 
567
 
-
 
568
    <section>
-
 
569
      <title>---</title>
-
 
570
 
-
 
571
      <para>At the moment HelenOS does not support swapping.</para>
-
 
572
 
-
 
573
      <para>- pouzivame vypadky stranky k alokaci ramcu on-demand v ramci
-
 
574
      as_area - na architekturach, ktere to podporuji, podporujeme non-exec
-
 
575
      stranky</para>
-
 
576
    </section>
-
 
577
  </section>
667
  </section>
578
</chapter>
668
</chapter>