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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Jakub Jermar |
2 | * Copyright (c) 2006 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ofw |
29 | /** @addtogroup ofw |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief EBUS 'reg' and 'ranges' properties handling. |
34 | * @brief EBUS 'reg' and 'ranges' properties handling. |
35 | * |
35 | * |
36 | */ |
36 | */ |
37 | 37 | ||
38 | #include <genarch/ofw/ofw_tree.h> |
38 | #include <genarch/ofw/ofw_tree.h> |
39 | #include <arch/memstr.h> |
39 | #include <arch/memstr.h> |
40 | #include <arch/trap/interrupt.h> |
40 | #include <arch/trap/interrupt.h> |
41 | #include <func.h> |
41 | #include <func.h> |
42 | #include <panic.h> |
42 | #include <panic.h> |
43 | #include <debug.h> |
43 | #include <debug.h> |
44 | #include <macros.h> |
44 | #include <macros.h> |
45 | 45 | ||
46 | /** Apply EBUS ranges to EBUS register. */ |
46 | /** Apply EBUS ranges to EBUS register. */ |
47 | bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa) |
47 | bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa) |
48 | { |
48 | { |
49 | ofw_tree_property_t *prop; |
49 | ofw_tree_property_t *prop; |
50 | ofw_ebus_range_t *range; |
50 | ofw_ebus_range_t *range; |
51 | count_t ranges; |
51 | count_t ranges; |
52 | 52 | ||
53 | prop = ofw_tree_getprop(node, "ranges"); |
53 | prop = ofw_tree_getprop(node, "ranges"); |
54 | if (!prop) |
54 | if (!prop) |
55 | return false; |
55 | return false; |
56 | 56 | ||
57 | ranges = prop->size / sizeof(ofw_ebus_range_t); |
57 | ranges = prop->size / sizeof(ofw_ebus_range_t); |
58 | range = prop->value; |
58 | range = prop->value; |
59 | 59 | ||
60 | unsigned int i; |
60 | unsigned int i; |
61 | 61 | ||
62 | for (i = 0; i < ranges; i++) { |
62 | for (i = 0; i < ranges; i++) { |
63 | if (reg->space != range[i].child_space) |
63 | if (reg->space != range[i].child_space) |
64 | continue; |
64 | continue; |
65 | if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) { |
65 | if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) { |
66 | ofw_pci_reg_t pci_reg; |
66 | ofw_pci_reg_t pci_reg; |
67 | 67 | ||
68 | pci_reg.space = range[i].parent_space; |
68 | pci_reg.space = range[i].parent_space; |
69 | pci_reg.addr = range[i].parent_base + (reg->addr - range[i].child_base); |
69 | pci_reg.addr = range[i].parent_base + (reg->addr - range[i].child_base); |
70 | pci_reg.size = reg->size; |
70 | pci_reg.size = reg->size; |
71 | 71 | ||
72 | return ofw_pci_apply_ranges(node->parent, &pci_reg, pa); |
72 | return ofw_pci_apply_ranges(node->parent, &pci_reg, pa); |
73 | } |
73 | } |
74 | } |
74 | } |
75 | 75 | ||
76 | return false; |
76 | return false; |
77 | } |
77 | } |
78 | 78 | ||
79 | bool ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr) |
79 | bool ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr) |
80 | { |
80 | { |
81 | ofw_tree_property_t *prop; |
81 | ofw_tree_property_t *prop; |
82 | ofw_tree_node_t *controller; |
82 | ofw_tree_node_t *controller; |
83 | 83 | ||
84 | prop = ofw_tree_getprop(node, "interrupt-map"); |
84 | prop = ofw_tree_getprop(node, "interrupt-map"); |
85 | if (!prop || !prop->value) |
85 | if (!prop || !prop->value) |
86 | return false; |
86 | return false; |
87 | 87 | ||
88 | ofw_ebus_intr_map_t *intr_map = prop->value; |
88 | ofw_ebus_intr_map_t *intr_map = prop->value; |
89 | count_t count = prop->size / sizeof(ofw_ebus_intr_map_t); |
89 | count_t count = prop->size / sizeof(ofw_ebus_intr_map_t); |
90 | 90 | ||
91 | ASSERT(count); |
91 | ASSERT(count); |
92 | 92 | ||
93 | prop = ofw_tree_getprop(node, "interrupt-map-mask"); |
93 | prop = ofw_tree_getprop(node, "interrupt-map-mask"); |
94 | if (!prop || !prop->value) |
94 | if (!prop || !prop->value) |
95 | return false; |
95 | return false; |
96 | 96 | ||
97 | ofw_ebus_intr_mask_t *intr_mask = prop->value; |
97 | ofw_ebus_intr_mask_t *intr_mask = prop->value; |
98 | 98 | ||
99 | ASSERT(prop->size == sizeof(ofw_ebus_intr_mask_t)); |
99 | ASSERT(prop->size == sizeof(ofw_ebus_intr_mask_t)); |
100 | 100 | ||
101 | uint32_t space = reg->space & intr_mask->space_mask; |
101 | uint32_t space = reg->space & intr_mask->space_mask; |
102 | uint32_t addr = reg->addr & intr_mask->addr_mask; |
102 | uint32_t addr = reg->addr & intr_mask->addr_mask; |
103 | uint32_t intr = interrupt & intr_mask->intr_mask; |
103 | uint32_t intr = interrupt & intr_mask->intr_mask; |
104 | 104 | ||
105 | unsigned int i; |
105 | unsigned int i; |
106 | for (i = 0; i < count; i++) { |
106 | for (i = 0; i < count; i++) { |
107 | if ((intr_map[i].space == space) && (intr_map[i].addr == addr) |
107 | if ((intr_map[i].space == space) && (intr_map[i].addr == addr) |
108 | && (intr_map[i].intr == intr)) |
108 | && (intr_map[i].intr == intr)) |
109 | goto found; |
109 | goto found; |
110 | } |
110 | } |
111 | return false; |
111 | return false; |
112 | 112 | ||
113 | found: |
113 | found: |
114 | /* |
114 | /* |
115 | * We found the device that functions as an interrupt controller |
115 | * We found the device that functions as an interrupt controller |
116 | * for the interrupt. We also found partial mapping from interrupt to INO. |
116 | * for the interrupt. We also found partial mapping from interrupt to INO. |
117 | */ |
117 | */ |
118 | 118 | ||
119 | controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle); |
119 | controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle); |
120 | if (!controller) |
120 | if (!controller) |
121 | return false; |
121 | return false; |
122 | 122 | ||
123 | if (strcmp(ofw_tree_node_name(controller), "pci") != 0) { |
123 | if (strcmp(ofw_tree_node_name(controller), "pci") != 0) { |
124 | /* |
124 | /* |
125 | * This is not a PCI node. |
125 | * This is not a PCI node. |
126 | */ |
126 | */ |
127 | return false; |
127 | return false; |
128 | } |
128 | } |
129 | 129 | ||
130 | /* |
130 | /* |
131 | * Let the PCI do the next step in mapping the interrupt. |
131 | * Let the PCI do the next step in mapping the interrupt. |
132 | */ |
132 | */ |
133 | if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino, inr)) |
133 | if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino, inr)) |
134 | return false; |
134 | return false; |
135 | 135 | ||
136 | return true; |
136 | return true; |
137 | } |
137 | } |
138 | 138 | ||
139 | /** @} |
139 | /** @} |
140 | */ |
140 | */ |
141 | 141 |