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#
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#
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# Copyright (C) 2005 Jakub Jermar
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# Copyright (C) 2005 Jakub Jermar
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
5
# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# modification, are permitted provided that the following conditions
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# are met:
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# are met:
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#
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#
9
# - Redistributions of source code must retain the above copyright
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
14
# - The name of the author may not be used to endorse or promote products
15
#   derived from this software without specific prior written permission.
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#   derived from this software without specific prior written permission.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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29
/**
29
/**
30
 * This file contains kernel trap table.
30
 * This file contains kernel trap table.
31
 */
31
 */
32
 
32
 
33
.register %g2, #scratch
33
.register %g2, #scratch
34
.register %g3, #scratch
34
.register %g3, #scratch
35
.register %g6, #scratch
35
.register %g6, #scratch
36
.register %g7, #scratch 
36
.register %g7, #scratch 
37
 
37
 
38
.text
38
.text
39
 
39
 
40
#include <arch/trap/trap_table.h>
40
#include <arch/trap/trap_table.h>
41
#include <arch/trap/regwin.h>
41
#include <arch/trap/regwin.h>
42
#include <arch/trap/interrupt.h>
42
#include <arch/trap/interrupt.h>
43
#include <arch/trap/exception.h>
43
#include <arch/trap/exception.h>
44
#include <arch/trap/mmu.h>
44
#include <arch/trap/mmu.h>
45
#include <arch/stack.h>
45
#include <arch/stack.h>
46
 
46
 
47
#define TABLE_SIZE	TRAP_TABLE_SIZE
47
#define TABLE_SIZE	TRAP_TABLE_SIZE
48
#define ENTRY_SIZE	TRAP_TABLE_ENTRY_SIZE
48
#define ENTRY_SIZE	TRAP_TABLE_ENTRY_SIZE
49
 
49
 
50
/*
50
/*
51
 * Kernel trap table.
51
 * Kernel trap table.
52
 */
52
 */
53
.align TABLE_SIZE
53
.align TABLE_SIZE
54
.global trap_table
54
.global trap_table
55
trap_table:
55
trap_table:
56
 
56
 
57
/* TT = 0x08, TL = 0, instruction_access_exception */
57
/* TT = 0x08, TL = 0, instruction_access_exception */
58
.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
58
.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
59
.global instruction_access_exception
59
.global instruction_access_exception
60
instruction_access_exception:
60
instruction_access_exception:
61
	SIMPLE_HANDLER do_instruction_access_exc
61
	SIMPLE_HANDLER do_instruction_access_exc
62
 
62
 
63
/* TT = 0x10, TL = 0, illegal_instruction */
63
/* TT = 0x10, TL = 0, illegal_instruction */
64
.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
64
.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
65
.global illegal_instruction
65
.global illegal_instruction
66
illegal_instruction:
66
illegal_instruction:
67
	SIMPLE_HANDLER do_illegal_instruction
67
	SIMPLE_HANDLER do_illegal_instruction
68
 
68
 
69
/* TT = 0x24, TL = 0, clean_window handler */
69
/* TT = 0x24, TL = 0, clean_window handler */
70
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
70
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
71
.global clean_window_handler
71
.global clean_window_handler
72
clean_window_handler:
72
clean_window_handler:
73
	CLEAN_WINDOW_HANDLER
73
	CLEAN_WINDOW_HANDLER
74
 
74
 
-
 
75
/* TT = 0x32, TL = 0, data_access_error */
-
 
76
.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
-
 
77
.global data_access_error
-
 
78
data_access_error:
-
 
79
	SIMPLE_HANDLER do_data_access_error
-
 
80
 
75
/* TT = 0x34, TL = 0, mem_address_not_aligned */
81
/* TT = 0x34, TL = 0, mem_address_not_aligned */
76
.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
82
.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
77
.global mem_address_not_aligned
83
.global mem_address_not_aligned
78
mem_address_not_aligned:
84
mem_address_not_aligned:
79
	SIMPLE_HANDLER do_mem_address_not_aligned
85
	SIMPLE_HANDLER do_mem_address_not_aligned
80
 
86
 
81
/* TT = 0x41, TL = 0, interrupt_level_1 handler */
87
/* TT = 0x41, TL = 0, interrupt_level_1 handler */
82
.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
88
.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
83
.global interrupt_level_1_handler
89
.global interrupt_level_1_handler
84
interrupt_level_1_handler:
90
interrupt_level_1_handler:
85
	INTERRUPT_LEVEL_N_HANDLER 1
91
	INTERRUPT_LEVEL_N_HANDLER 1
86
 
92
 
87
/* TT = 0x42, TL = 0, interrupt_level_2 handler */
93
/* TT = 0x42, TL = 0, interrupt_level_2 handler */
88
.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
94
.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
89
.global interrupt_level_2_handler
95
.global interrupt_level_2_handler
90
interrupt_level_2_handler:
96
interrupt_level_2_handler:
91
	INTERRUPT_LEVEL_N_HANDLER 2
97
	INTERRUPT_LEVEL_N_HANDLER 2
92
 
98
 
93
/* TT = 0x43, TL = 0, interrupt_level_3 handler */
99
/* TT = 0x43, TL = 0, interrupt_level_3 handler */
94
.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
100
.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
95
.global interrupt_level_3_handler
101
.global interrupt_level_3_handler
96
interrupt_level_3_handler:
102
interrupt_level_3_handler:
97
	INTERRUPT_LEVEL_N_HANDLER 3
103
	INTERRUPT_LEVEL_N_HANDLER 3
98
 
104
 
99
/* TT = 0x44, TL = 0, interrupt_level_4 handler */
105
/* TT = 0x44, TL = 0, interrupt_level_4 handler */
100
.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
106
.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
101
.global interrupt_level_4_handler
107
.global interrupt_level_4_handler
102
interrupt_level_4_handler:
108
interrupt_level_4_handler:
103
	INTERRUPT_LEVEL_N_HANDLER 4
109
	INTERRUPT_LEVEL_N_HANDLER 4
104
 
110
 
105
/* TT = 0x45, TL = 0, interrupt_level_5 handler */
111
/* TT = 0x45, TL = 0, interrupt_level_5 handler */
106
.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
112
.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
107
.global interrupt_level_5_handler
113
.global interrupt_level_5_handler
108
interrupt_level_5_handler:
114
interrupt_level_5_handler:
109
	INTERRUPT_LEVEL_N_HANDLER 5
115
	INTERRUPT_LEVEL_N_HANDLER 5
110
 
116
 
111
/* TT = 0x46, TL = 0, interrupt_level_6 handler */
117
/* TT = 0x46, TL = 0, interrupt_level_6 handler */
112
.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
118
.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
113
.global interrupt_level_6_handler
119
.global interrupt_level_6_handler
114
interrupt_level_6_handler:
120
interrupt_level_6_handler:
115
	INTERRUPT_LEVEL_N_HANDLER 6
121
	INTERRUPT_LEVEL_N_HANDLER 6
116
 
122
 
117
/* TT = 0x47, TL = 0, interrupt_level_7 handler */
123
/* TT = 0x47, TL = 0, interrupt_level_7 handler */
118
.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
124
.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
119
.global interrupt_level_7_handler
125
.global interrupt_level_7_handler
120
interrupt_level_7_handler:
126
interrupt_level_7_handler:
121
	INTERRUPT_LEVEL_N_HANDLER 7
127
	INTERRUPT_LEVEL_N_HANDLER 7
122
 
128
 
123
/* TT = 0x48, TL = 0, interrupt_level_8 handler */
129
/* TT = 0x48, TL = 0, interrupt_level_8 handler */
124
.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
130
.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
125
.global interrupt_level_8_handler
131
.global interrupt_level_8_handler
126
interrupt_level_8_handler:
132
interrupt_level_8_handler:
127
	INTERRUPT_LEVEL_N_HANDLER 8
133
	INTERRUPT_LEVEL_N_HANDLER 8
128
 
134
 
129
/* TT = 0x49, TL = 0, interrupt_level_9 handler */
135
/* TT = 0x49, TL = 0, interrupt_level_9 handler */
130
.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
136
.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
131
.global interrupt_level_9_handler
137
.global interrupt_level_9_handler
132
interrupt_level_9_handler:
138
interrupt_level_9_handler:
133
	INTERRUPT_LEVEL_N_HANDLER 9
139
	INTERRUPT_LEVEL_N_HANDLER 9
134
 
140
 
135
/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
141
/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
136
.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
142
.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
137
.global interrupt_level_10_handler
143
.global interrupt_level_10_handler
138
interrupt_level_10_handler:
144
interrupt_level_10_handler:
139
	INTERRUPT_LEVEL_N_HANDLER 10
145
	INTERRUPT_LEVEL_N_HANDLER 10
140
 
146
 
141
/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
147
/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
142
.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
148
.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
143
.global interrupt_level_11_handler
149
.global interrupt_level_11_handler
144
interrupt_level_11_handler:
150
interrupt_level_11_handler:
145
	INTERRUPT_LEVEL_N_HANDLER 11
151
	INTERRUPT_LEVEL_N_HANDLER 11
146
 
152
 
147
/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
153
/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
148
.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
154
.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
149
.global interrupt_level_12_handler
155
.global interrupt_level_12_handler
150
interrupt_level_12_handler:
156
interrupt_level_12_handler:
151
	INTERRUPT_LEVEL_N_HANDLER 12
157
	INTERRUPT_LEVEL_N_HANDLER 12
152
 
158
 
153
/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
159
/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
154
.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
160
.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
155
.global interrupt_level_13_handler
161
.global interrupt_level_13_handler
156
interrupt_level_13_handler:
162
interrupt_level_13_handler:
157
	INTERRUPT_LEVEL_N_HANDLER 13
163
	INTERRUPT_LEVEL_N_HANDLER 13
158
 
164
 
159
/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
165
/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
160
.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
166
.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
161
.global interrupt_level_14_handler
167
.global interrupt_level_14_handler
162
interrupt_level_14_handler:
168
interrupt_level_14_handler:
163
	INTERRUPT_LEVEL_N_HANDLER 14
169
	INTERRUPT_LEVEL_N_HANDLER 14
164
 
170
 
165
/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
171
/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
166
.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
172
.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
167
.global interrupt_level_15_handler
173
.global interrupt_level_15_handler
168
interrupt_level_15_handler:
174
interrupt_level_15_handler:
169
	INTERRUPT_LEVEL_N_HANDLER 15
175
	INTERRUPT_LEVEL_N_HANDLER 15
170
 
176
 
171
/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
177
/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
172
.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
178
.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
173
.global interrupt_vector_trap_handler
179
.global interrupt_vector_trap_handler
174
interrupt_vector_trap_handler:
180
interrupt_vector_trap_handler:
175
	INTERRUPT_VECTOR_TRAP_HANDLER
181
	INTERRUPT_VECTOR_TRAP_HANDLER
176
 
182
 
177
/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
183
/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
178
.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
184
.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
179
.global fast_instruction_access_mmu_miss_handler
185
.global fast_instruction_access_mmu_miss_handler
180
fast_instruction_access_mmu_miss_handler:
186
fast_instruction_access_mmu_miss_handler:
181
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
187
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
182
 
188
 
183
/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
189
/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
184
.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
190
.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
185
.global fast_data_access_mmu_miss_handler
191
.global fast_data_access_mmu_miss_handler
186
fast_data_access_mmu_miss_handler:
192
fast_data_access_mmu_miss_handler:
187
	FAST_DATA_ACCESS_MMU_MISS_HANDLER
193
	FAST_DATA_ACCESS_MMU_MISS_HANDLER
188
 
194
 
189
/* TT = 0x6c, TL = 0, fast_data_access_protection */
195
/* TT = 0x6c, TL = 0, fast_data_access_protection */
190
.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
196
.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
191
.global fast_data_access_protection_handler
197
.global fast_data_access_protection_handler
192
fast_data_access_protection_handler:
198
fast_data_access_protection_handler:
193
	FAST_DATA_ACCESS_PROTECTION_HANDLER
199
	FAST_DATA_ACCESS_PROTECTION_HANDLER
194
 
200
 
195
/* TT = 0x80, TL = 0, spill_0_normal handler */
201
/* TT = 0x80, TL = 0, spill_0_normal handler */
196
.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
202
.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
197
.global spill_0_normal
203
.global spill_0_normal
198
spill_0_normal:
204
spill_0_normal:
199
	SPILL_NORMAL_HANDLER
205
	SPILL_NORMAL_HANDLER
200
 
206
 
201
/* TT = 0xc0, TL = 0, fill_0_normal handler */
207
/* TT = 0xc0, TL = 0, fill_0_normal handler */
202
.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
208
.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
203
.global fill_0_normal
209
.global fill_0_normal
204
fill_0_normal:
210
fill_0_normal:
205
	FILL_NORMAL_HANDLER
211
	FILL_NORMAL_HANDLER
206
 
212
 
207
/*
213
/*
208
 * Handlers for TL>0.
214
 * Handlers for TL>0.
209
 */
215
 */
210
 
216
 
211
/* TT = 0x08, TL > 0, instruction_access_exception */
217
/* TT = 0x08, TL > 0, instruction_access_exception */
212
.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
218
.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
213
.global instruction_access_exception_high
219
.global instruction_access_exception_high
214
instruction_access_exception_high:
220
instruction_access_exception_high:
215
	SIMPLE_HANDLER do_instruction_access_exc
221
	SIMPLE_HANDLER do_instruction_access_exc
216
 
222
 
217
/* TT = 0x10, TL > 0, illegal_instruction */
223
/* TT = 0x10, TL > 0, illegal_instruction */
218
.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
224
.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
219
.global illegal_instruction_high
225
.global illegal_instruction_high
220
illegal_instruction_high:
226
illegal_instruction_high:
221
	SIMPLE_HANDLER do_illegal_instruction
227
	SIMPLE_HANDLER do_illegal_instruction
222
 
228
 
223
/* TT = 0x24, TL > 0, clean_window handler */
229
/* TT = 0x24, TL > 0, clean_window handler */
224
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
230
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
225
.global clean_window_handler_high
231
.global clean_window_handler_high
226
clean_window_handler_high:
232
clean_window_handler_high:
227
	CLEAN_WINDOW_HANDLER
233
	CLEAN_WINDOW_HANDLER
228
 
234
 
-
 
235
/* TT = 0x32, TL > 0, data_access_error */
-
 
236
.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
-
 
237
.global data_access_error_high
-
 
238
data_access_error_high:
-
 
239
	SIMPLE_HANDLER do_data_access_error
-
 
240
 
229
/* TT = 0x34, TL > 0, mem_address_not_aligned */
241
/* TT = 0x34, TL > 0, mem_address_not_aligned */
230
.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
242
.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
231
.global mem_address_not_aligned_high
243
.global mem_address_not_aligned_high
232
mem_address_not_aligned_high:
244
mem_address_not_aligned_high:
233
	SIMPLE_HANDLER do_mem_address_not_aligned
245
	SIMPLE_HANDLER do_mem_address_not_aligned
234
 
246
 
235
/* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */
247
/* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */
236
.org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE
248
.org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE
237
.global fast_instruction_access_mmu_miss_handler_high
249
.global fast_instruction_access_mmu_miss_handler_high
238
fast_instruction_access_mmu_miss_handler_high:
250
fast_instruction_access_mmu_miss_handler_high:
239
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
251
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
240
 
252
 
241
/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
253
/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
242
.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
254
.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
243
.global fast_data_access_mmu_miss_handler_high
255
.global fast_data_access_mmu_miss_handler_high
244
fast_data_access_mmu_miss_handler_high:
256
fast_data_access_mmu_miss_handler_high:
245
	FAST_DATA_ACCESS_MMU_MISS_HANDLER
257
	FAST_DATA_ACCESS_MMU_MISS_HANDLER
246
 
258
 
247
/* TT = 0x6c, TL > 0, fast_data_access_protection */
259
/* TT = 0x6c, TL > 0, fast_data_access_protection */
248
.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
260
.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
249
.global fast_data_access_protection_handler_high
261
.global fast_data_access_protection_handler_high
250
fast_data_access_protection_handler_high:
262
fast_data_access_protection_handler_high:
251
	FAST_DATA_ACCESS_PROTECTION_HANDLER
263
	FAST_DATA_ACCESS_PROTECTION_HANDLER
252
 
264
 
253
/* TT = 0x80, TL > 0, spill_0_normal handler */
265
/* TT = 0x80, TL > 0, spill_0_normal handler */
254
.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
266
.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
255
.global spill_0_normal_high
267
.global spill_0_normal_high
256
spill_0_normal_high:
268
spill_0_normal_high:
257
	SPILL_NORMAL_HANDLER
269
	SPILL_NORMAL_HANDLER
258
 
270
 
259
/* TT = 0xc0, TL > 0, fill_0_normal handler */
271
/* TT = 0xc0, TL > 0, fill_0_normal handler */
260
.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
272
.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
261
.global fill_0_normal_high
273
.global fill_0_normal_high
262
fill_0_normal_high:
274
fill_0_normal_high:
263
	FILL_NORMAL_HANDLER
275
	FILL_NORMAL_HANDLER
264
 
276
 
265
 
277
 
266
/* Preemptible trap handler.
278
/* Preemptible trap handler.
267
 *
279
 *
268
 * This trap handler makes arrangements to
280
 * This trap handler makes arrangements to
269
 * make calling scheduler() possible.
281
 * make calling scheduler() possible.
270
 *
282
 *
271
 * The caller is responsible for doing save
283
 * The caller is responsible for doing save
272
 * and allocating PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE
284
 * and allocating PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE
273
 * bytes on stack.
285
 * bytes on stack.
274
 *
286
 *
275
 * Input registers:
287
 * Input registers:
276
 * 	%l0	 	Address of function to call.
288
 * 	%l0	 	Address of function to call.
277
 * Output registers:
289
 * Output registers:
278
 *	 %l1 - %l7 	Copy of %g1 - %g7
290
 *	 %l1 - %l7 	Copy of %g1 - %g7
279
 */
291
 */
280
.global preemptible_handler
292
.global preemptible_handler
281
preemptible_handler:
293
preemptible_handler:
282
	/*
294
	/*
283
	 * Save TSTATE, TPC, TNPC and PSTATE aside.
295
	 * Save TSTATE, TPC, TNPC and PSTATE aside.
284
	 */
296
	 */
285
	rdpr %tstate, %g1
297
	rdpr %tstate, %g1
286
	rdpr %tpc, %g2
298
	rdpr %tpc, %g2
287
	rdpr %tnpc, %g3
299
	rdpr %tnpc, %g3
288
	rdpr %pstate, %g4
300
	rdpr %pstate, %g4
289
 
301
 
290
	stx %g1, [%fp + STACK_BIAS + SAVED_TSTATE]
302
	stx %g1, [%fp + STACK_BIAS + SAVED_TSTATE]
291
	stx %g2, [%fp + STACK_BIAS + SAVED_TPC]
303
	stx %g2, [%fp + STACK_BIAS + SAVED_TPC]
292
	stx %g3, [%fp + STACK_BIAS + SAVED_TNPC]
304
	stx %g3, [%fp + STACK_BIAS + SAVED_TNPC]
293
	stx %g4, [%fp + STACK_BIAS + SAVED_PSTATE]
305
	stx %g4, [%fp + STACK_BIAS + SAVED_PSTATE]
294
	
306
	
295
	/*
307
	/*
296
	 * Write 0 to TL.
308
	 * Write 0 to TL.
297
	 */
309
	 */
298
	wrpr %g0, 0, %tl
310
	wrpr %g0, 0, %tl
299
	
311
	
300
	/*
312
	/*
301
	 * Alter PSTATE.
313
	 * Alter PSTATE.
302
	 * - switch to normal globals.
314
	 * - switch to normal globals.
303
	 */
315
	 */
304
	and %g4, ~1, %g4		! mask alternate globals
316
	and %g4, ~1, %g4		! mask alternate globals
305
	wrpr %g4, 0, %pstate
317
	wrpr %g4, 0, %pstate
306
	 
318
	 
307
	/*
319
	/*
308
	 * Save the normal globals.
320
	 * Save the normal globals.
309
	 */
321
	 */
310
	SAVE_GLOBALS
322
	SAVE_GLOBALS
311
	
323
	
312
	/*
324
	/*
313
	 * Call the higher-level handler.
325
	 * Call the higher-level handler.
314
	 */
326
	 */
315
	call %l0
327
	call %l0
316
	nop
328
	nop
317
	
329
	
318
	/*
330
	/*
319
	 * Restore the normal global register set.
331
	 * Restore the normal global register set.
320
	 */
332
	 */
321
	RESTORE_GLOBALS
333
	RESTORE_GLOBALS
322
	
334
	
323
	/*
335
	/*
324
	 * Restore PSTATE from saved copy.
336
	 * Restore PSTATE from saved copy.
325
	 * Alternate globals become active.
337
	 * Alternate globals become active.
326
	 */
338
	 */
327
	ldx [%fp + STACK_BIAS + SAVED_PSTATE], %l4
339
	ldx [%fp + STACK_BIAS + SAVED_PSTATE], %l4
328
	wrpr %l4, 0, %pstate
340
	wrpr %l4, 0, %pstate
329
	
341
	
330
	/*
342
	/*
331
	 * Write 1 to TL.
343
	 * Write 1 to TL.
332
	 */
344
	 */
333
	wrpr %g0, 1, %tl
345
	wrpr %g0, 1, %tl
334
	
346
	
335
	/*
347
	/*
336
	 * Read TSTATE, TPC and TNPC from saved copy.
348
	 * Read TSTATE, TPC and TNPC from saved copy.
337
	 */
349
	 */
338
	ldx [%fp + STACK_BIAS + SAVED_TSTATE], %g1
350
	ldx [%fp + STACK_BIAS + SAVED_TSTATE], %g1
339
	ldx [%fp + STACK_BIAS + SAVED_TPC], %g2
351
	ldx [%fp + STACK_BIAS + SAVED_TPC], %g2
340
	ldx [%fp + STACK_BIAS + SAVED_TNPC], %g3
352
	ldx [%fp + STACK_BIAS + SAVED_TNPC], %g3
341
 
353
 
342
	/*
354
	/*
343
	 * Do restore to match the save instruction from the top-level handler.
355
	 * Do restore to match the save instruction from the top-level handler.
344
	 */
356
	 */
345
	restore
357
	restore
346
 
358
 
347
	/*
359
	/*
348
	 * On execution of retry instruction, CWP will be restored from TSTATE register.
360
	 * On execution of retry instruction, CWP will be restored from TSTATE register.
349
	 * However, because of scheduling, it is possible that CWP in saved TSTATE
361
	 * However, because of scheduling, it is possible that CWP in saved TSTATE
350
	 * is different from current CWP. The following chunk of code fixes CWP
362
	 * is different from current CWP. The following chunk of code fixes CWP
351
	 * in the saved copy of TSTATE.
363
	 * in the saved copy of TSTATE.
352
	 */
364
	 */
353
	rdpr %cwp, %g4		! read current CWP
365
	rdpr %cwp, %g4		! read current CWP
354
	and %g1, ~0x1f, %g1	! clear CWP field in saved TSTATE
366
	and %g1, ~0x1f, %g1	! clear CWP field in saved TSTATE
355
	or %g1, %g4, %g1	! write current CWP to TSTATE
367
	or %g1, %g4, %g1	! write current CWP to TSTATE
356
	
368
	
357
	/*
369
	/*
358
	 * Restore TSTATE, TPC and TNPC from saved copies.
370
	 * Restore TSTATE, TPC and TNPC from saved copies.
359
	 */
371
	 */
360
	wrpr %g1, 0, %tstate
372
	wrpr %g1, 0, %tstate
361
	wrpr %g2, 0, %tpc
373
	wrpr %g2, 0, %tpc
362
	wrpr %g3, 0, %tnpc
374
	wrpr %g3, 0, %tnpc
363
	 
375
	 
364
	/*
376
	/*
365
	 * Return from interrupt.
377
	 * Return from interrupt.
366
	 */
378
	 */
367
	retry
379
	retry
368
 
380
 
369
 
381
 
370

Generated by GNU Enscript 1.6.6.
382

Generated by GNU Enscript 1.6.6.
371
 
383
 
372
 
384
 
373
 
385