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1 
#
 1 
#
2 
# Copyright (c) 2005 Jakub Jermar
 2 
# Copyright (c) 2005 Jakub Jermar
3 
# All rights reserved.
 3 
# All rights reserved.
4 
#
 4 
#
5 
# Redistribution and use in source and binary forms, with or without
 5 
# Redistribution and use in source and binary forms, with or without
6 
# modification, are permitted provided that the following conditions
 6 
# modification, are permitted provided that the following conditions
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# are met:
 7 
# are met:
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#
 8 
#
9 
# - Redistributions of source code must retain the above copyright
 9 
# - Redistributions of source code must retain the above copyright
10 
#   notice, this list of conditions and the following disclaimer.
 10 
#   notice, this list of conditions and the following disclaimer.
11 
# - Redistributions in binary form must reproduce the above copyright
 11 
# - Redistributions in binary form must reproduce the above copyright
12 
#   notice, this list of conditions and the following disclaimer in the
 12 
#   notice, this list of conditions and the following disclaimer in the
13 
#   documentation and/or other materials provided with the distribution.
 13 
#   documentation and/or other materials provided with the distribution.
14 
# - The name of the author may not be used to endorse or promote products
 14 
# - The name of the author may not be used to endorse or promote products
15 
#   derived from this software without specific prior written permission.
 15 
#   derived from this software without specific prior written permission.
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#
 16 
#
17 
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 17 
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 18 
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 19 
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 20 
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 21 
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 22 
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 23 
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 24 
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 25 
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 26 
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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 28 
 
29 
/**
 29 
/**
30 
 * @file
 30 
 * @file
31 
 * @brief This file contains kernel trap table.
 31 
 * @brief This file contains kernel trap table.
32 
 */
 32 
 */
33 
 
 33 
 
34 
.register %g2, #scratch
 34 
.register %g2, #scratch
35 
.register %g3, #scratch
 35 
.register %g3, #scratch
36 
 
 36 
 
37 
.text
 37 
.text
38 
 
 38 
 
39 
#include <arch/trap/trap_table.h>
 39 
#include <arch/trap/trap_table.h>
40 
#include <arch/trap/regwin.h>
 40 
#include <arch/trap/regwin.h>
41 
#include <arch/trap/interrupt.h>
 41 
#include <arch/trap/interrupt.h>
42 
#include <arch/trap/exception.h>
 42 
#include <arch/trap/exception.h>
43 
#include <arch/trap/syscall.h>
 43 
#include <arch/trap/syscall.h>
44 
#include <arch/trap/mmu.h>
 44 
#include <arch/trap/mmu.h>
45 
#include <arch/mm/mmu.h>
 45 
#include <arch/mm/mmu.h>
46 
#include <arch/mm/page.h>
 46 
#include <arch/mm/page.h>
47 
#include <arch/stack.h>
 47 
#include <arch/stack.h>
48 
#include <arch/regdef.h>
 48 
#include <arch/regdef.h>
49 
 
 49 
 
50 
#define TABLE_SIZE	TRAP_TABLE_SIZE
 50 
#define TABLE_SIZE	TRAP_TABLE_SIZE
51 
#define ENTRY_SIZE	TRAP_TABLE_ENTRY_SIZE
 51 
#define ENTRY_SIZE	TRAP_TABLE_ENTRY_SIZE
52 
 
 52 
 
53 
/*
 53 
/*
54 
 * Kernel trap table.
 54 
 * Kernel trap table.
55 
 */
 55 
 */
56 
.align TABLE_SIZE
 56 
.align TABLE_SIZE
57 
.global trap_table
 57 
.global trap_table
58 
trap_table:
 58 
trap_table:
59 
 
 59 
 
60 
/* TT = 0x08, TL = 0, instruction_access_exception */
 60 
/* TT = 0x08, TL = 0, instruction_access_exception */
61 
.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
 61 
.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
62 
.global instruction_access_exception_tl0
 62 
.global instruction_access_exception_tl0
63 
instruction_access_exception_tl0:
 63 
instruction_access_exception_tl0:
64 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
 64 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
65 
	PREEMPTIBLE_HANDLER instruction_access_exception
 65 
	PREEMPTIBLE_HANDLER instruction_access_exception
66 
 
 66 
 
67 
/* TT = 0x0a, TL = 0, instruction_access_error */
 67 
/* TT = 0x0a, TL = 0, instruction_access_error */
68 
.org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE
 68 
.org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE
69 
.global instruction_access_error_tl0
 69 
.global instruction_access_error_tl0
70 
instruction_access_error_tl0:
 70 
instruction_access_error_tl0:
71 
	PREEMPTIBLE_HANDLER instruction_access_error
 71 
	PREEMPTIBLE_HANDLER instruction_access_error
72 
 
 72 
 
73 
/* TT = 0x10, TL = 0, illegal_instruction */
 73 
/* TT = 0x10, TL = 0, illegal_instruction */
74 
.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
 74 
.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
75 
.global illegal_instruction_tl0
 75 
.global illegal_instruction_tl0
76 
illegal_instruction_tl0:
 76 
illegal_instruction_tl0:
77 
	PREEMPTIBLE_HANDLER illegal_instruction
 77 
	PREEMPTIBLE_HANDLER illegal_instruction
78 
 
 78 
 
79 
/* TT = 0x11, TL = 0, privileged_opcode */
 79 
/* TT = 0x11, TL = 0, privileged_opcode */
80 
.org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE
 80 
.org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE
81 
.global privileged_opcode_tl0
 81 
.global privileged_opcode_tl0
82 
privileged_opcode_tl0:
 82 
privileged_opcode_tl0:
83 
	PREEMPTIBLE_HANDLER privileged_opcode
 83 
	PREEMPTIBLE_HANDLER privileged_opcode
84 
 
 84 
 
85 
/* TT = 0x12, TL = 0, unimplemented_LDD */
 85 
/* TT = 0x12, TL = 0, unimplemented_LDD */
86 
.org trap_table + TT_UNIMPLEMENTED_LDD*ENTRY_SIZE
 86 
.org trap_table + TT_UNIMPLEMENTED_LDD*ENTRY_SIZE
87 
.global unimplemented_LDD_tl0
 87 
.global unimplemented_LDD_tl0
88 
unimplemented_LDD_tl0:
 88 
unimplemented_LDD_tl0:
89 
	PREEMPTIBLE_HANDLER unimplemented_LDD
 89 
	PREEMPTIBLE_HANDLER unimplemented_LDD
90 
 
 90 
 
91 
/* TT = 0x13, TL = 0, unimplemented_STD */
 91 
/* TT = 0x13, TL = 0, unimplemented_STD */
92 
.org trap_table + TT_UNIMPLEMENTED_STD*ENTRY_SIZE
 92 
.org trap_table + TT_UNIMPLEMENTED_STD*ENTRY_SIZE
93 
.global unimplemented_STD_tl0
 93 
.global unimplemented_STD_tl0
94 
unimplemented_STD_tl0:
 94 
unimplemented_STD_tl0:
95 
	PREEMPTIBLE_HANDLER unimplemented_STD
 95 
	PREEMPTIBLE_HANDLER unimplemented_STD
96 
 
 96 
 
97 
/* TT = 0x20, TL = 0, fb_disabled handler */
 97 
/* TT = 0x20, TL = 0, fb_disabled handler */
98 
.org trap_table + TT_FP_DISABLED*ENTRY_SIZE
 98 
.org trap_table + TT_FP_DISABLED*ENTRY_SIZE
99 
.global fb_disabled_tl0
 99 
.global fb_disabled_tl0
100 
fp_disabled_tl0:
 100 
fp_disabled_tl0:
101 
	PREEMPTIBLE_HANDLER fp_disabled
 101 
	PREEMPTIBLE_HANDLER fp_disabled
102 
 
 102 
 
103 
/* TT = 0x21, TL = 0, fb_exception_ieee_754 handler */
 103 
/* TT = 0x21, TL = 0, fb_exception_ieee_754 handler */
104 
.org trap_table + TT_FP_EXCEPTION_IEEE_754*ENTRY_SIZE
 104 
.org trap_table + TT_FP_EXCEPTION_IEEE_754*ENTRY_SIZE
105 
.global fb_exception_ieee_754_tl0
 105 
.global fb_exception_ieee_754_tl0
106 
fp_exception_ieee_754_tl0:
 106 
fp_exception_ieee_754_tl0:
107 
	PREEMPTIBLE_HANDLER fp_exception_ieee_754
 107 
	PREEMPTIBLE_HANDLER fp_exception_ieee_754
108 
 
 108 
 
109 
/* TT = 0x22, TL = 0, fb_exception_other handler */
 109 
/* TT = 0x22, TL = 0, fb_exception_other handler */
110 
.org trap_table + TT_FP_EXCEPTION_OTHER*ENTRY_SIZE
 110 
.org trap_table + TT_FP_EXCEPTION_OTHER*ENTRY_SIZE
111 
.global fb_exception_other_tl0
 111 
.global fb_exception_other_tl0
112 
fp_exception_other_tl0:
 112 
fp_exception_other_tl0:
113 
	PREEMPTIBLE_HANDLER fp_exception_other
 113 
	PREEMPTIBLE_HANDLER fp_exception_other
114 
 
 114 
 
115 
/* TT = 0x23, TL = 0, tag_overflow */
 115 
/* TT = 0x23, TL = 0, tag_overflow */
116 
.org trap_table + TT_TAG_OVERFLOW*ENTRY_SIZE
 116 
.org trap_table + TT_TAG_OVERFLOW*ENTRY_SIZE
117 
.global tag_overflow_tl0
 117 
.global tag_overflow_tl0
118 
tag_overflow_tl0:
 118 
tag_overflow_tl0:
119 
	PREEMPTIBLE_HANDLER tag_overflow
 119 
	PREEMPTIBLE_HANDLER tag_overflow
120 
 
 120 
 
121 
/* TT = 0x24, TL = 0, clean_window handler */
 121 
/* TT = 0x24, TL = 0, clean_window handler */
122 
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
 122 
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
123 
.global clean_window_tl0
 123 
.global clean_window_tl0
124 
clean_window_tl0:
 124 
clean_window_tl0:
125 
	CLEAN_WINDOW_HANDLER
 125 
	CLEAN_WINDOW_HANDLER
126 
 
 126 
 
127 
/* TT = 0x28, TL = 0, division_by_zero */
 127 
/* TT = 0x28, TL = 0, division_by_zero */
128 
.org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE
 128 
.org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE
129 
.global division_by_zero_tl0
 129 
.global division_by_zero_tl0
130 
division_by_zero_tl0:
 130 
division_by_zero_tl0:
131 
	PREEMPTIBLE_HANDLER division_by_zero
 131 
	PREEMPTIBLE_HANDLER division_by_zero
132 
 
 132 
 
133 
/* TT = 0x30, TL = 0, data_access_exception */
 133 
/* TT = 0x30, TL = 0, data_access_exception */
134 
.org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE
 134 
.org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE
135 
.global data_access_exception_tl0
 135 
.global data_access_exception_tl0
136 
data_access_exception_tl0:
 136 
data_access_exception_tl0:
137 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
 137 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
138 
	PREEMPTIBLE_HANDLER data_access_exception
 138 
	PREEMPTIBLE_HANDLER data_access_exception
139 
 
 139 
 
140 
/* TT = 0x32, TL = 0, data_access_error */
 140 
/* TT = 0x32, TL = 0, data_access_error */
141 
.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
 141 
.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
142 
.global data_access_error_tl0
 142 
.global data_access_error_tl0
143 
data_access_error_tl0:
 143 
data_access_error_tl0:
144 
	PREEMPTIBLE_HANDLER data_access_error
 144 
	PREEMPTIBLE_HANDLER data_access_error
145 
 
 145 
 
146 
/* TT = 0x34, TL = 0, mem_address_not_aligned */
 146 
/* TT = 0x34, TL = 0, mem_address_not_aligned */
147 
.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
 147 
.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
148 
.global mem_address_not_aligned_tl0
 148 
.global mem_address_not_aligned_tl0
149 
mem_address_not_aligned_tl0:
 149 
mem_address_not_aligned_tl0:
150 
	PREEMPTIBLE_HANDLER mem_address_not_aligned
 150 
	PREEMPTIBLE_HANDLER mem_address_not_aligned
151 
 
 151 
 
152 
/* TT = 0x35, TL = 0, LDDF_mem_address_not_aligned */
 152 
/* TT = 0x35, TL = 0, LDDF_mem_address_not_aligned */
153 
.org trap_table + TT_LDDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
 153 
.org trap_table + TT_LDDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
154 
.global LDDF_mem_address_not_aligned_tl0
 154 
.global LDDF_mem_address_not_aligned_tl0
155 
LDDF_mem_address_not_aligned_tl0:
 155 
LDDF_mem_address_not_aligned_tl0:
156 
	PREEMPTIBLE_HANDLER LDDF_mem_address_not_aligned
 156 
	PREEMPTIBLE_HANDLER LDDF_mem_address_not_aligned
157 
 
 157 
 
158 
/* TT = 0x36, TL = 0, STDF_mem_address_not_aligned */
 158 
/* TT = 0x36, TL = 0, STDF_mem_address_not_aligned */
159 
.org trap_table + TT_STDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
 159 
.org trap_table + TT_STDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
160 
.global STDF_mem_address_not_aligned_tl0
 160 
.global STDF_mem_address_not_aligned_tl0
161 
STDF_mem_address_not_aligned_tl0:
 161 
STDF_mem_address_not_aligned_tl0:
162 
	PREEMPTIBLE_HANDLER STDF_mem_address_not_aligned
 162 
	PREEMPTIBLE_HANDLER STDF_mem_address_not_aligned
163 
 
 163 
 
164 
/* TT = 0x37, TL = 0, privileged_action */
 164 
/* TT = 0x37, TL = 0, privileged_action */
165 
.org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE
 165 
.org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE
166 
.global privileged_action_tl0
 166 
.global privileged_action_tl0
167 
privileged_action_tl0:
 167 
privileged_action_tl0:
168 
	PREEMPTIBLE_HANDLER privileged_action
 168 
	PREEMPTIBLE_HANDLER privileged_action
169 
 
 169 
 
170 
/* TT = 0x38, TL = 0, LDQF_mem_address_not_aligned */
 170 
/* TT = 0x38, TL = 0, LDQF_mem_address_not_aligned */
171 
.org trap_table + TT_LDQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
 171 
.org trap_table + TT_LDQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
172 
.global LDQF_mem_address_not_aligned_tl0
 172 
.global LDQF_mem_address_not_aligned_tl0
173 
LDQF_mem_address_not_aligned_tl0:
 173 
LDQF_mem_address_not_aligned_tl0:
174 
	PREEMPTIBLE_HANDLER LDQF_mem_address_not_aligned
 174 
	PREEMPTIBLE_HANDLER LDQF_mem_address_not_aligned
175 
 
 175 
 
176 
/* TT = 0x39, TL = 0, STQF_mem_address_not_aligned */
 176 
/* TT = 0x39, TL = 0, STQF_mem_address_not_aligned */
177 
.org trap_table + TT_STQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
 177 
.org trap_table + TT_STQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
178 
.global STQF_mem_address_not_aligned_tl0
 178 
.global STQF_mem_address_not_aligned_tl0
179 
STQF_mem_address_not_aligned_tl0:
 179 
STQF_mem_address_not_aligned_tl0:
180 
	PREEMPTIBLE_HANDLER STQF_mem_address_not_aligned
 180 
	PREEMPTIBLE_HANDLER STQF_mem_address_not_aligned
181 
 
 181 
 
182 
/* TT = 0x41, TL = 0, interrupt_level_1 handler */
 182 
/* TT = 0x41, TL = 0, interrupt_level_1 handler */
183 
.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
 183 
.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
184 
.global interrupt_level_1_handler_tl0
 184 
.global interrupt_level_1_handler_tl0
185 
interrupt_level_1_handler_tl0:
 185 
interrupt_level_1_handler_tl0:
186 
	INTERRUPT_LEVEL_N_HANDLER 1
 186 
	INTERRUPT_LEVEL_N_HANDLER 1
187 
 
 187 
 
188 
/* TT = 0x42, TL = 0, interrupt_level_2 handler */
 188 
/* TT = 0x42, TL = 0, interrupt_level_2 handler */
189 
.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
 189 
.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
190 
.global interrupt_level_2_handler_tl0
 190 
.global interrupt_level_2_handler_tl0
191 
interrupt_level_2_handler_tl0:
 191 
interrupt_level_2_handler_tl0:
192 
	INTERRUPT_LEVEL_N_HANDLER 2
 192 
	INTERRUPT_LEVEL_N_HANDLER 2
193 
 
 193 
 
194 
/* TT = 0x43, TL = 0, interrupt_level_3 handler */
 194 
/* TT = 0x43, TL = 0, interrupt_level_3 handler */
195 
.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
 195 
.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
196 
.global interrupt_level_3_handler_tl0
 196 
.global interrupt_level_3_handler_tl0
197 
interrupt_level_3_handler_tl0:
 197 
interrupt_level_3_handler_tl0:
198 
	INTERRUPT_LEVEL_N_HANDLER 3
 198 
	INTERRUPT_LEVEL_N_HANDLER 3
199 
 
 199 
 
200 
/* TT = 0x44, TL = 0, interrupt_level_4 handler */
 200 
/* TT = 0x44, TL = 0, interrupt_level_4 handler */
201 
.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
 201 
.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
202 
.global interrupt_level_4_handler_tl0
 202 
.global interrupt_level_4_handler_tl0
203 
interrupt_level_4_handler_tl0:
 203 
interrupt_level_4_handler_tl0:
204 
	INTERRUPT_LEVEL_N_HANDLER 4
 204 
	INTERRUPT_LEVEL_N_HANDLER 4
205 
 
 205 
 
206 
/* TT = 0x45, TL = 0, interrupt_level_5 handler */
 206 
/* TT = 0x45, TL = 0, interrupt_level_5 handler */
207 
.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
 207 
.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
208 
.global interrupt_level_5_handler_tl0
 208 
.global interrupt_level_5_handler_tl0
209 
interrupt_level_5_handler_tl0:
 209 
interrupt_level_5_handler_tl0:
210 
	INTERRUPT_LEVEL_N_HANDLER 5
 210 
	INTERRUPT_LEVEL_N_HANDLER 5
211 
 
 211 
 
212 
/* TT = 0x46, TL = 0, interrupt_level_6 handler */
 212 
/* TT = 0x46, TL = 0, interrupt_level_6 handler */
213 
.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
 213 
.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
214 
.global interrupt_level_6_handler_tl0
 214 
.global interrupt_level_6_handler_tl0
215 
interrupt_level_6_handler_tl0:
 215 
interrupt_level_6_handler_tl0:
216 
	INTERRUPT_LEVEL_N_HANDLER 6
 216 
	INTERRUPT_LEVEL_N_HANDLER 6
217 
 
 217 
 
218 
/* TT = 0x47, TL = 0, interrupt_level_7 handler */
 218 
/* TT = 0x47, TL = 0, interrupt_level_7 handler */
219 
.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
 219 
.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
220 
.global interrupt_level_7_handler_tl0
 220 
.global interrupt_level_7_handler_tl0
221 
interrupt_level_7_handler_tl0:
 221 
interrupt_level_7_handler_tl0:
222 
	INTERRUPT_LEVEL_N_HANDLER 7
 222 
	INTERRUPT_LEVEL_N_HANDLER 7
223 
 
 223 
 
224 
/* TT = 0x48, TL = 0, interrupt_level_8 handler */
 224 
/* TT = 0x48, TL = 0, interrupt_level_8 handler */
225 
.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
 225 
.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
226 
.global interrupt_level_8_handler_tl0
 226 
.global interrupt_level_8_handler_tl0
227 
interrupt_level_8_handler_tl0:
 227 
interrupt_level_8_handler_tl0:
228 
	INTERRUPT_LEVEL_N_HANDLER 8
 228 
	INTERRUPT_LEVEL_N_HANDLER 8
229 
 
 229 
 
230 
/* TT = 0x49, TL = 0, interrupt_level_9 handler */
 230 
/* TT = 0x49, TL = 0, interrupt_level_9 handler */
231 
.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
 231 
.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
232 
.global interrupt_level_9_handler_tl0
 232 
.global interrupt_level_9_handler_tl0
233 
interrupt_level_9_handler_tl0:
 233 
interrupt_level_9_handler_tl0:
234 
	INTERRUPT_LEVEL_N_HANDLER 9
 234 
	INTERRUPT_LEVEL_N_HANDLER 9
235 
 
 235 
 
236 
/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
 236 
/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
237 
.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
 237 
.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
238 
.global interrupt_level_10_handler_tl0
 238 
.global interrupt_level_10_handler_tl0
239 
interrupt_level_10_handler_tl0:
 239 
interrupt_level_10_handler_tl0:
240 
	INTERRUPT_LEVEL_N_HANDLER 10
 240 
	INTERRUPT_LEVEL_N_HANDLER 10
241 
 
 241 
 
242 
/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
 242 
/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
243 
.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
 243 
.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
244 
.global interrupt_level_11_handler_tl0
 244 
.global interrupt_level_11_handler_tl0
245 
interrupt_level_11_handler_tl0:
 245 
interrupt_level_11_handler_tl0:
246 
	INTERRUPT_LEVEL_N_HANDLER 11
 246 
	INTERRUPT_LEVEL_N_HANDLER 11
247 
 
 247 
 
248 
/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
 248 
/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
249 
.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
 249 
.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
250 
.global interrupt_level_12_handler_tl0
 250 
.global interrupt_level_12_handler_tl0
251 
interrupt_level_12_handler_tl0:
 251 
interrupt_level_12_handler_tl0:
252 
	INTERRUPT_LEVEL_N_HANDLER 12
 252 
	INTERRUPT_LEVEL_N_HANDLER 12
253 
 
 253 
 
254 
/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
 254 
/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
255 
.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
 255 
.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
256 
.global interrupt_level_13_handler_tl0
 256 
.global interrupt_level_13_handler_tl0
257 
interrupt_level_13_handler_tl0:
 257 
interrupt_level_13_handler_tl0:
258 
	INTERRUPT_LEVEL_N_HANDLER 13
 258 
	INTERRUPT_LEVEL_N_HANDLER 13
259 
 
 259 
 
260 
/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
 260 
/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
261 
.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
 261 
.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
262 
.global interrupt_level_14_handler_tl0
 262 
.global interrupt_level_14_handler_tl0
263 
interrupt_level_14_handler_tl0:
 263 
interrupt_level_14_handler_tl0:
264 
	INTERRUPT_LEVEL_N_HANDLER 14
 264 
	INTERRUPT_LEVEL_N_HANDLER 14
265 
 
 265 
 
266 
/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
 266 
/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
267 
.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
 267 
.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
268 
.global interrupt_level_15_handler_tl0
 268 
.global interrupt_level_15_handler_tl0
269 
interrupt_level_15_handler_tl0:
 269 
interrupt_level_15_handler_tl0:
270 
	INTERRUPT_LEVEL_N_HANDLER 15
 270 
	INTERRUPT_LEVEL_N_HANDLER 15
271 
 
 271 
 
272 
/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
 272 
/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
273 
.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
 273 
.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
274 
.global interrupt_vector_trap_handler_tl0
 274 
.global interrupt_vector_trap_handler_tl0
275 
interrupt_vector_trap_handler_tl0:
 275 
interrupt_vector_trap_handler_tl0:
276 
	INTERRUPT_VECTOR_TRAP_HANDLER
 276 
	INTERRUPT_VECTOR_TRAP_HANDLER
277 
 
 277 
 
278 
/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
 278 
/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
279 
.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
 279 
.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
280 
.global fast_instruction_access_mmu_miss_handler_tl0
 280 
.global fast_instruction_access_mmu_miss_handler_tl0
281 
fast_instruction_access_mmu_miss_handler_tl0:
 281 
fast_instruction_access_mmu_miss_handler_tl0:
282 
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
 282 
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
283 
 
 283 
 
284 
/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
 284 
/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
285 
.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
 285 
.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
286 
.global fast_data_access_mmu_miss_handler_tl0
 286 
.global fast_data_access_mmu_miss_handler_tl0
287 
fast_data_access_mmu_miss_handler_tl0:
 287 
fast_data_access_mmu_miss_handler_tl0:
288 
	FAST_DATA_ACCESS_MMU_MISS_HANDLER 0
 288 
	FAST_DATA_ACCESS_MMU_MISS_HANDLER 0
289 
 
 289 
 
290 
/* TT = 0x6c, TL = 0, fast_data_access_protection */
 290 
/* TT = 0x6c, TL = 0, fast_data_access_protection */
291 
.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
 291 
.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
292 
.global fast_data_access_protection_handler_tl0
 292 
.global fast_data_access_protection_handler_tl0
293 
fast_data_access_protection_handler_tl0:
 293 
fast_data_access_protection_handler_tl0:
294 
	FAST_DATA_ACCESS_PROTECTION_HANDLER 0
 294 
	FAST_DATA_ACCESS_PROTECTION_HANDLER 0
295 
 
 295 
 
296 
/* TT = 0x80, TL = 0, spill_0_normal handler */
 296 
/* TT = 0x80, TL = 0, spill_0_normal handler */
297 
.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
 297 
.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
298 
.global spill_0_normal_tl0
 298 
.global spill_0_normal_tl0
299 
spill_0_normal_tl0:
 299 
spill_0_normal_tl0:
300 
	SPILL_NORMAL_HANDLER_KERNEL
 300 
	SPILL_NORMAL_HANDLER_KERNEL
301 
 
 301 
 
302 
/* TT = 0x84, TL = 0, spill_1_normal handler */
 302 
/* TT = 0x84, TL = 0, spill_1_normal handler */
303 
.org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE
 303 
.org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE
304 
.global spill_1_normal_tl0
 304 
.global spill_1_normal_tl0
305 
spill_1_normal_tl0:
 305 
spill_1_normal_tl0:
306 
	SPILL_NORMAL_HANDLER_USERSPACE
 306 
	SPILL_NORMAL_HANDLER_USERSPACE
307 
 
 307 
 
308 
/* TT = 0x88, TL = 0, spill_2_normal handler */
 308 
/* TT = 0x88, TL = 0, spill_2_normal handler */
309 
.org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE
 309 
.org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE
310 
.global spill_2_normal_tl0
 310 
.global spill_2_normal_tl0
311 
spill_2_normal_tl0:
 311 
spill_2_normal_tl0:
312 
	SPILL_TO_USPACE_WINDOW_BUFFER
 312 
	SPILL_TO_USPACE_WINDOW_BUFFER
313 
 
 313 
 
314 
/* TT = 0xa0, TL = 0, spill_0_other handler */
 314 
/* TT = 0xa0, TL = 0, spill_0_other handler */
315 
.org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE
 315 
.org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE
316 
.global spill_0_other_tl0
 316 
.global spill_0_other_tl0
317 
spill_0_other_tl0:
 317 
spill_0_other_tl0:
318 
	SPILL_TO_USPACE_WINDOW_BUFFER
 318 
	SPILL_TO_USPACE_WINDOW_BUFFER
319 
 
 319 
 
320 
/* TT = 0xc0, TL = 0, fill_0_normal handler */
 320 
/* TT = 0xc0, TL = 0, fill_0_normal handler */
321 
.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
 321 
.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
322 
.global fill_0_normal_tl0
 322 
.global fill_0_normal_tl0
323 
fill_0_normal_tl0:
 323 
fill_0_normal_tl0:
324 
	FILL_NORMAL_HANDLER_KERNEL
 324 
	FILL_NORMAL_HANDLER_KERNEL
325 
 
 325 
 
326 
/* TT = 0xc4, TL = 0, fill_1_normal handler */
 326 
/* TT = 0xc4, TL = 0, fill_1_normal handler */
327 
.org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE
 327 
.org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE
328 
.global fill_1_normal_tl0
 328 
.global fill_1_normal_tl0
329 
fill_1_normal_tl0:
 329 
fill_1_normal_tl0:
330 
	FILL_NORMAL_HANDLER_USERSPACE
 330 
	FILL_NORMAL_HANDLER_USERSPACE
331 
 
 331 
 
332 
/* TT = 0x100, TL = 0, trap_instruction_0 */
 - 
 
333 
.org trap_table + TT_TRAP_INSTRUCTION(0)*ENTRY_SIZE
 - 
 
334 
.global trap_instruction_0_tl0
 - 
 
335 
trap_instruction_0_tl0:
 - 
 
336 
	TRAP_INSTRUCTION 0
 - 
 
337 
 
 - 
 
338 
/* TT = 0x101, TL = 0, trap_instruction_1 */
 - 
 
339 
.org trap_table + TT_TRAP_INSTRUCTION(1)*ENTRY_SIZE
 - 
 
340 
.global trap_instruction_1_tl0
 - 
 
341 
trap_instruction_1_tl0:
 - 
 
342 
	TRAP_INSTRUCTION 1
 - 
 
343 
 
 - 
 
344 
/* TT = 0x102, TL = 0, trap_instruction_2 */
 - 
 
345 
.org trap_table + TT_TRAP_INSTRUCTION(2)*ENTRY_SIZE
 - 
 
346 
.global trap_instruction_2_tl0
 - 
 
347 
trap_instruction_2_tl0:
 - 
 
348 
	TRAP_INSTRUCTION 2
 - 
 
349 
 
 - 
 
350 
/* TT = 0x103, TL = 0, trap_instruction_3 */
 - 
 
351 
.org trap_table + TT_TRAP_INSTRUCTION(3)*ENTRY_SIZE
 - 
 
352 
.global trap_instruction_3_tl0
 - 
 
353 
trap_instruction_3_tl0:
 - 
 
354 
	TRAP_INSTRUCTION 3
 - 
 
355 
 
 - 
 
356 
/* TT = 0x104, TL = 0, trap_instruction_4 */
 - 
 
357 
.org trap_table + TT_TRAP_INSTRUCTION(4)*ENTRY_SIZE
 - 
 
358 
.global trap_instruction_4_tl0
 - 
 
359 
trap_instruction_4_tl0:
 - 
 
360 
	TRAP_INSTRUCTION 4
 - 
 
361 
 
 - 
 
362 
/* TT = 0x105, TL = 0, trap_instruction_5 */
 - 
 
363 
.org trap_table + TT_TRAP_INSTRUCTION(5)*ENTRY_SIZE
 - 
 
364 
.global trap_instruction_5_tl0
 - 
 
365 
trap_instruction_5_tl0:
 - 
 
366 
	TRAP_INSTRUCTION 5
 - 
 
367 
 
 - 
 
368 
/* TT = 0x106, TL = 0, trap_instruction_6 */
 - 
 
369 
.org trap_table + TT_TRAP_INSTRUCTION(6)*ENTRY_SIZE
 - 
 
370 
.global trap_instruction_6_tl0
 - 
 
371 
trap_instruction_6_tl0:
 - 
 
372 
	TRAP_INSTRUCTION 6
 - 
 
373 
 
 - 
 
374 
/* TT = 0x107, TL = 0, trap_instruction_7 */
 332 
/* TT = 0x100 - 0x17f, TL = 0, trap_instruction_0 - trap_instruction_7f */
375 
.org trap_table + TT_TRAP_INSTRUCTION(7)*ENTRY_SIZE
 - 
 
376 
.global trap_instruction_7_tl0
 - 
 
377 
trap_instruction_7_tl0:
 - 
 
378 
	TRAP_INSTRUCTION 7
 - 
 
379 
 
 - 
 
380 
/* TT = 0x108, TL = 0, trap_instruction_8 */
 - 
 
381 
.org trap_table + TT_TRAP_INSTRUCTION(8)*ENTRY_SIZE
 - 
 
382 
.global trap_instruction_8_tl0
 - 
 
383 
trap_instruction_8_tl0:
 - 
 
384 
	TRAP_INSTRUCTION 8
 - 
 
385 
 
 - 
 
386 
/* TT = 0x109, TL = 0, trap_instruction_9 */
 - 
 
387 
.org trap_table + TT_TRAP_INSTRUCTION(9)*ENTRY_SIZE
 - 
 
388 
.global trap_instruction_9_tl0
 - 
 
389 
trap_instruction_9_tl0:
 - 
 
390 
	TRAP_INSTRUCTION 9
 - 
 
391 
 
 - 
 
392 
/* TT = 0x10a, TL = 0, trap_instruction_10 */
 - 
 
393 
.org trap_table + TT_TRAP_INSTRUCTION(10)*ENTRY_SIZE
 - 
 
394 
.global trap_instruction_10_tl0
 - 
 
395 
trap_instruction_10_tl0:
 - 
 
396 
	TRAP_INSTRUCTION 10
 - 
 
397 
 
 - 
 
398 
/* TT = 0x10b, TL = 0, trap_instruction_11 */
 333 
.irp cur, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,\
399 
.org trap_table + TT_TRAP_INSTRUCTION(11)*ENTRY_SIZE
 - 
 
400 
.global trap_instruction_11_tl0
 - 
 
401 
trap_instruction_11_tl0:
 - 
 
402 
	TRAP_INSTRUCTION 11
 - 
 
403 
 
 - 
 
404 
/* TT = 0x10c, TL = 0, trap_instruction_12 */
 - 
 
405 
.org trap_table + TT_TRAP_INSTRUCTION(12)*ENTRY_SIZE
 - 
 
406 
.global trap_instruction_12_tl0
 - 
 
407 
trap_instruction_12_tl0:
 - 
 
408 
	TRAP_INSTRUCTION 12
 - 
 
409 
 
 - 
 
410 
/* TT = 0x10d, TL = 0, trap_instruction_13 */
 - 
 
411 
.org trap_table + TT_TRAP_INSTRUCTION(13)*ENTRY_SIZE
 - 
 
412 
.global trap_instruction_13_tl0
 - 
 
413 
trap_instruction_13_tl0:
 - 
 
414 
	TRAP_INSTRUCTION 13
 - 
 
415 
 
 - 
 
416 
/* TT = 0x10e, TL = 0, trap_instruction_14 */
 - 
 
417 
.org trap_table + TT_TRAP_INSTRUCTION(14)*ENTRY_SIZE
 - 
 
418 
.global trap_instruction_14_tl0
 - 
 
419 
trap_instruction_14_tl0:
 - 
 
420 
	TRAP_INSTRUCTION 14
 - 
 
421 
 
 - 
 
422 
/* TT = 0x10f, TL = 0, trap_instruction_15 */
 334 
    20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38,\
423 
.org trap_table + TT_TRAP_INSTRUCTION(15)*ENTRY_SIZE
 - 
 
424 
.global trap_instruction_15_tl0
 - 
 
425 
trap_instruction_15_tl0:
 - 
 
426 
	TRAP_INSTRUCTION 15
 - 
 
427 
 
 - 
 
428 
/* TT = 0x110, TL = 0, trap_instruction_16 */
 335 
    39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,\
429 
.org trap_table + TT_TRAP_INSTRUCTION(16)*ENTRY_SIZE
 - 
 
430 
.global trap_instruction_16_tl0
 - 
 
431 
trap_instruction_16_tl0:
 - 
 
432 
	TRAP_INSTRUCTION 16
 - 
 
433 
 
 - 
 
434 
/* TT = 0x111, TL = 0, trap_instruction_17 */
 - 
 
435 
.org trap_table + TT_TRAP_INSTRUCTION(17)*ENTRY_SIZE
 - 
 
436 
.global trap_instruction_17_tl0
 - 
 
437 
trap_instruction_17_tl0:
 - 
 
438 
	TRAP_INSTRUCTION 17
 - 
 
439 
 
 - 
 
440 
/* TT = 0x112, TL = 0, trap_instruction_18 */
 336 
    58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76,\
441 
.org trap_table + TT_TRAP_INSTRUCTION(18)*ENTRY_SIZE
 - 
 
442 
.global trap_instruction_18_tl0
 - 
 
443 
trap_instruction_18_tl0:
 - 
 
444 
	TRAP_INSTRUCTION 18
 - 
 
445 
 
 - 
 
446 
/* TT = 0x113, TL = 0, trap_instruction_19 */
 337 
    77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,\
447 
.org trap_table + TT_TRAP_INSTRUCTION(19)*ENTRY_SIZE
 - 
 
448 
.global trap_instruction_19_tl0
 - 
 
449 
trap_instruction_19_tl0:
 - 
 
450 
	TRAP_INSTRUCTION 19
 - 
 
451 
 
 - 
 
452 
/* TT = 0x114, TL = 0, trap_instruction_20 */
 338 
    96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,\
453 
.org trap_table + TT_TRAP_INSTRUCTION(20)*ENTRY_SIZE
 - 
 
454 
.global trap_instruction_20_tl0
 - 
 
455 
trap_instruction_20_tl0:
 - 
 
456 
	TRAP_INSTRUCTION 20
 - 
 
457 
 
 - 
 
458 
/* TT = 0x115, TL = 0, trap_instruction_21 */
 339 
    112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126,\
459 
.org trap_table + TT_TRAP_INSTRUCTION(21)*ENTRY_SIZE
 - 
 
460 
.global trap_instruction_21_tl0
 - 
 
461 
trap_instruction_21_tl0:
 - 
 
462 
	TRAP_INSTRUCTION 21
 - 
 
463 
 
 - 
 
464 
/* TT = 0x116, TL = 0, trap_instruction_22 */
 - 
 
465 
.org trap_table + TT_TRAP_INSTRUCTION(22)*ENTRY_SIZE
 - 
 
466 
.global trap_instruction_22_tl0
 - 
 
467 
trap_instruction_22_tl0:
 - 
 
468 
	TRAP_INSTRUCTION 22
 - 
 
469 
 
 - 
 
470 
/* TT = 0x117, TL = 0, trap_instruction_23 */
 - 
 
471 
.org trap_table + TT_TRAP_INSTRUCTION(23)*ENTRY_SIZE
 - 
 
472 
.global trap_instruction_23_tl0
 - 
 
473 
trap_instruction_23_tl0:
 - 
 
474 
	TRAP_INSTRUCTION 23
 - 
 
475 
 
 - 
 
476 
/* TT = 0x118, TL = 0, trap_instruction_24 */
 - 
 
477 
.org trap_table + TT_TRAP_INSTRUCTION(24)*ENTRY_SIZE
 - 
 
478 
.global trap_instruction_24_tl0
 - 
 
479 
trap_instruction_24_tl0:
 - 
 
480 
	TRAP_INSTRUCTION 24
 - 
 
481 
 
 - 
 
482 
/* TT = 0x119, TL = 0, trap_instruction_25 */
 - 
 
483 
.org trap_table + TT_TRAP_INSTRUCTION(25)*ENTRY_SIZE
 - 
 
484 
.global trap_instruction_25_tl0
 - 
 
485 
trap_instruction_25_tl0:
 - 
 
486 
	TRAP_INSTRUCTION 25
 - 
 
487 
 
 - 
 
488 
/* TT = 0x11a, TL = 0, trap_instruction_26 */
 - 
 
489 
.org trap_table + TT_TRAP_INSTRUCTION(26)*ENTRY_SIZE
 - 
 
490 
.global trap_instruction_26_tl0
 - 
 
491 
trap_instruction_26_tl0:
 - 
 
492 
	TRAP_INSTRUCTION 26
 - 
 
493 
 
 - 
 
494 
/* TT = 0x11b, TL = 0, trap_instruction_27 */
 - 
 
495 
.org trap_table + TT_TRAP_INSTRUCTION(27)*ENTRY_SIZE
 - 
 
496 
.global trap_instruction_27_tl0
 - 
 
497 
trap_instruction_27_tl0:
 - 
 
498 
	TRAP_INSTRUCTION 27
 340 
    127
499 
 
 - 
 
500 
/* TT = 0x11c, TL = 0, trap_instruction_28 */
 - 
 
501 
.org trap_table + TT_TRAP_INSTRUCTION(28)*ENTRY_SIZE
 341 
.org trap_table + (TT_TRAP_INSTRUCTION_0+\cur)*ENTRY_SIZE
502 
.global trap_instruction_28_tl0
 342 
.global trap_instruction_\cur\()_tl0
503 
trap_instruction_28_tl0:
 343 
trap_instruction_\cur\()_tl0:
504 
	TRAP_INSTRUCTION 28
 - 
 
505 
 
 - 
 
506 
/* TT = 0x11d, TL = 0, trap_instruction_29 */
 - 
 
507 
.org trap_table + TT_TRAP_INSTRUCTION(29)*ENTRY_SIZE
 - 
 
508 
.global trap_instruction_29_tl0
 344 
	ba trap_instruction_handler
509 
trap_instruction_29_tl0:
 - 
 
510 
	TRAP_INSTRUCTION 29
 345 
	mov \cur, %g2
511 
 
 - 
 
512 
/* TT = 0x11e, TL = 0, trap_instruction_30 */
 - 
 
513 
.org trap_table + TT_TRAP_INSTRUCTION(30)*ENTRY_SIZE
 - 
 
514 
.global trap_instruction_30_tl0
 - 
 
515 
trap_instruction_30_tl0:
 - 
 
516 
	TRAP_INSTRUCTION 30
 - 
 
517 
 
 346 
.endr
518 
/* TT = 0x11f, TL = 0, trap_instruction_31 */
 - 
 
519 
.org trap_table + TT_TRAP_INSTRUCTION(31)*ENTRY_SIZE
 - 
 
520 
.global trap_instruction_31_tl0
 - 
 
521 
trap_instruction_31_tl0:
 - 
 
522 
	TRAP_INSTRUCTION 31
 - 
 
523 
 
 347 
 
524 
/*
 348 
/*
525 
 * Handlers for TL>0.
 349 
 * Handlers for TL>0.
526 
 */
 350 
 */
527 
 
 351 
 
528 
/* TT = 0x08, TL > 0, instruction_access_exception */
 352 
/* TT = 0x08, TL > 0, instruction_access_exception */
529 
.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
 353 
.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
530 
.global instruction_access_exception_tl1
 354 
.global instruction_access_exception_tl1
531 
instruction_access_exception_tl1:
 355 
instruction_access_exception_tl1:
532 
	wrpr %g0, 1, %tl
 356 
	wrpr %g0, 1, %tl
533 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
 357 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
534 
	PREEMPTIBLE_HANDLER instruction_access_exception
 358 
	PREEMPTIBLE_HANDLER instruction_access_exception
535 
 
 359 
 
536 
/* TT = 0x0a, TL > 0, instruction_access_error */
 360 
/* TT = 0x0a, TL > 0, instruction_access_error */
537 
.org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE
 361 
.org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE
538 
.global instruction_access_error_tl1
 362 
.global instruction_access_error_tl1
539 
instruction_access_error_tl1:
 363 
instruction_access_error_tl1:
540 
	wrpr %g0, 1, %tl
 364 
	wrpr %g0, 1, %tl
541 
	PREEMPTIBLE_HANDLER instruction_access_error
 365 
	PREEMPTIBLE_HANDLER instruction_access_error
542 
 
 366 
 
543 
/* TT = 0x10, TL > 0, illegal_instruction */
 367 
/* TT = 0x10, TL > 0, illegal_instruction */
544 
.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
 368 
.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
545 
.global illegal_instruction_tl1
 369 
.global illegal_instruction_tl1
546 
illegal_instruction_tl1:
 370 
illegal_instruction_tl1:
547 
	wrpr %g0, 1, %tl
 371 
	wrpr %g0, 1, %tl
548 
	PREEMPTIBLE_HANDLER illegal_instruction
 372 
	PREEMPTIBLE_HANDLER illegal_instruction
549 
 
 373 
 
550 
/* TT = 0x24, TL > 0, clean_window handler */
 374 
/* TT = 0x24, TL > 0, clean_window handler */
551 
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
 375 
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
552 
.global clean_window_tl1
 376 
.global clean_window_tl1
553 
clean_window_tl1:
 377 
clean_window_tl1:
554 
	CLEAN_WINDOW_HANDLER
 378 
	CLEAN_WINDOW_HANDLER
555 
 
 379 
 
556 
/* TT = 0x28, TL > 0, division_by_zero */
 380 
/* TT = 0x28, TL > 0, division_by_zero */
557 
.org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE
 381 
.org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE
558 
.global division_by_zero_tl1
 382 
.global division_by_zero_tl1
559 
division_by_zero_tl1:
 383 
division_by_zero_tl1:
560 
	wrpr %g0, 1, %tl
 384 
	wrpr %g0, 1, %tl
561 
	PREEMPTIBLE_HANDLER division_by_zero
 385 
	PREEMPTIBLE_HANDLER division_by_zero
562 
 
 386 
 
563 
/* TT = 0x30, TL > 0, data_access_exception */
 387 
/* TT = 0x30, TL > 0, data_access_exception */
564 
.org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE
 388 
.org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE
565 
.global data_access_exception_tl1
 389 
.global data_access_exception_tl1
566 
data_access_exception_tl1:
 390 
data_access_exception_tl1:
567 
	wrpr %g0, 1, %tl
 391 
	wrpr %g0, 1, %tl
568 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
 392 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
569 
	PREEMPTIBLE_HANDLER data_access_exception
 393 
	PREEMPTIBLE_HANDLER data_access_exception
570 
 
 394 
 
571 
/* TT = 0x32, TL > 0, data_access_error */
 395 
/* TT = 0x32, TL > 0, data_access_error */
572 
.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
 396 
.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
573 
.global data_access_error_tl1
 397 
.global data_access_error_tl1
574 
data_access_error_tl1:
 398 
data_access_error_tl1:
575 
	wrpr %g0, 1, %tl
 399 
	wrpr %g0, 1, %tl
576 
	PREEMPTIBLE_HANDLER data_access_error
 400 
	PREEMPTIBLE_HANDLER data_access_error
577 
 
 401 
 
578 
/* TT = 0x34, TL > 0, mem_address_not_aligned */
 402 
/* TT = 0x34, TL > 0, mem_address_not_aligned */
579 
.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
 403 
.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
580 
.global mem_address_not_aligned_tl1
 404 
.global mem_address_not_aligned_tl1
581 
mem_address_not_aligned_tl1:
 405 
mem_address_not_aligned_tl1:
582 
	wrpr %g0, 1, %tl
 406 
	wrpr %g0, 1, %tl
583 
	PREEMPTIBLE_HANDLER mem_address_not_aligned
 407 
	PREEMPTIBLE_HANDLER mem_address_not_aligned
584 
 
 408 
 
585 
/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
 409 
/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
586 
.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
 410 
.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
587 
.global fast_data_access_mmu_miss_handler_tl1
 411 
.global fast_data_access_mmu_miss_handler_tl1
588 
fast_data_access_mmu_miss_handler_tl1:
 412 
fast_data_access_mmu_miss_handler_tl1:
589 
	FAST_DATA_ACCESS_MMU_MISS_HANDLER 1
 413 
	FAST_DATA_ACCESS_MMU_MISS_HANDLER 1
590 
 
 414 
 
591 
/* TT = 0x6c, TL > 0, fast_data_access_protection */
 415 
/* TT = 0x6c, TL > 0, fast_data_access_protection */
592 
.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
 416 
.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
593 
.global fast_data_access_protection_handler_tl1
 417 
.global fast_data_access_protection_handler_tl1
594 
fast_data_access_protection_handler_tl1:
 418 
fast_data_access_protection_handler_tl1:
595 
	FAST_DATA_ACCESS_PROTECTION_HANDLER 1
 419 
	FAST_DATA_ACCESS_PROTECTION_HANDLER 1
596 
 
 420 
 
597 
/* TT = 0x80, TL > 0, spill_0_normal handler */
 421 
/* TT = 0x80, TL > 0, spill_0_normal handler */
598 
.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
 422 
.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
599 
.global spill_0_normal_tl1
 423 
.global spill_0_normal_tl1
600 
spill_0_normal_tl1:
 424 
spill_0_normal_tl1:
601 
	SPILL_NORMAL_HANDLER_KERNEL
 425 
	SPILL_NORMAL_HANDLER_KERNEL
602 
 
 426 
 
603 
/* TT = 0x88, TL > 0, spill_2_normal handler */
 427 
/* TT = 0x88, TL > 0, spill_2_normal handler */
604 
.org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE
 428 
.org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE
605 
.global spill_2_normal_tl1
 429 
.global spill_2_normal_tl1
606 
spill_2_normal_tl1:
 430 
spill_2_normal_tl1:
607 
	SPILL_TO_USPACE_WINDOW_BUFFER
 431 
	SPILL_TO_USPACE_WINDOW_BUFFER
608 
 
 432 
 
609 
/* TT = 0xa0, TL > 0, spill_0_other handler */
 433 
/* TT = 0xa0, TL > 0, spill_0_other handler */
610 
.org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE
 434 
.org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE
611 
.global spill_0_other_tl1
 435 
.global spill_0_other_tl1
612 
spill_0_other_tl1:
 436 
spill_0_other_tl1:
613 
	SPILL_TO_USPACE_WINDOW_BUFFER
 437 
	SPILL_TO_USPACE_WINDOW_BUFFER
614 
 
 438 
 
615 
/* TT = 0xc0, TL > 0, fill_0_normal handler */
 439 
/* TT = 0xc0, TL > 0, fill_0_normal handler */
616 
.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
 440 
.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
617 
.global fill_0_normal_tl1
 441 
.global fill_0_normal_tl1
618 
fill_0_normal_tl1:
 442 
fill_0_normal_tl1:
619 
	FILL_NORMAL_HANDLER_KERNEL
 443 
	FILL_NORMAL_HANDLER_KERNEL
620 
 
 444 
 
621 
.align TABLE_SIZE
 445 
.align TABLE_SIZE
622 
 
 446 
 
623 
 
 447 
 
624 
#define NOT(x)	((x) == 0)
 448 
#define NOT(x)	((x) == 0)
625 
 
 449 
 
626 
/* Preemptible trap handler for TL=1.
 450 
/* Preemptible trap handler for TL=1.
627 
 *
 451 
 *
628 
 * This trap handler makes arrangements to make calling of scheduler() from
 452 
 * This trap handler makes arrangements to make calling of scheduler() from
629 
 * within a trap context possible. It is called from several other trap
 453 
 * within a trap context possible. It is called from several other trap
630 
 * handlers.
 454 
 * handlers.
631 
 *
 455 
 *
632 
 * This function can be entered either with interrupt globals or alternate
 456 
 * This function can be entered either with interrupt globals or alternate
633 
 * globals. Memory management trap handlers are obliged to switch to one of
 457 
 * globals. Memory management trap handlers are obliged to switch to one of
634 
 * those global sets prior to calling this function. Register window management
 458 
 * those global sets prior to calling this function. Register window management
635 
 * functions are not allowed to modify the alternate global registers.
 459 
 * functions are not allowed to modify the alternate global registers.
636 
 *
 460 
 *
637 
 * The kernel is designed to work on trap levels 0 - 4. For instance, the
 461 
 * The kernel is designed to work on trap levels 0 - 4. For instance, the
638 
 * following can happen:
 462 
 * following can happen:
639 
 * TL0: kernel thread runs (CANSAVE=0, kernel stack not in DTLB)
 463 
 * TL0: kernel thread runs (CANSAVE=0, kernel stack not in DTLB)
640 
 * TL1: preemptible trap handler started after a tick interrupt
 464 
 * TL1: preemptible trap handler started after a tick interrupt
641 
 * TL2: preemptible trap handler did SAVE
 465 
 * TL2: preemptible trap handler did SAVE
642 
 * TL3: spill handler touched the kernel stack
466 
 * TL3: spill handler touched the kernel stack
643 
 * TL4: hardware or software failure
 467 
 * TL4: hardware or software failure
644 
 *
 468 
 *
645 
 * Input registers:
 469 
 * Input registers:
646 
 *	%g1		Address of function to call if this is not a syscall.
 470 
 *	%g1		Address of function to call if this is not a syscall.
647 
 * 	%g2	 	First argument for the function.
 471 
 * 	%g2	 	First argument for the function.
648 
 *	%g6		Pre-set as kernel stack base if trap from userspace.
 472 
 *	%g6		Pre-set as kernel stack base if trap from userspace.
649 
 *	%g7		Pre-set as address of the userspace window buffer.
 473 
 *	%g7		Pre-set as address of the userspace window buffer.
650 
 */
 474 
 */
651 
.macro PREEMPTIBLE_HANDLER_TEMPLATE is_syscall
 475 
.macro PREEMPTIBLE_HANDLER_TEMPLATE is_syscall
652 
	/*
 476 
	/*
653 
	 * ASSERT(%tl == 1)
 477 
	 * ASSERT(%tl == 1)
654 
	 */
 478 
	 */
655 
	rdpr %tl, %g3
 479 
	rdpr %tl, %g3
656 
	cmp %g3, 1
 480 
	cmp %g3, 1
657 
	be 1f
 481 
	be 1f
658 
	nop
 482 
	nop
659 
0:	ba 0b					! this is for debugging, if we ever get here
 483 
0:	ba 0b					! this is for debugging, if we ever get here
660 
	nop					! it will be easy to find
 484 
	nop					! it will be easy to find
661 
 
 485 
 
662 
1:
 486 
1:
663 
.if NOT(\is_syscall)
 487 
.if NOT(\is_syscall)
664 
	rdpr %tstate, %g3
 488 
	rdpr %tstate, %g3
665
489
666 
	/*
 490 
	/*
667 
	 * One of the ways this handler can be invoked is after a nested MMU trap from
 491 
	 * One of the ways this handler can be invoked is after a nested MMU trap from
668 
	 * either spill_1_normal or fill_1_normal traps. Both of these traps manipulate
 492 
	 * either spill_1_normal or fill_1_normal traps. Both of these traps manipulate
669 
	 * the CWP register. We deal with the situation by simulating the MMU trap
 493 
	 * the CWP register. We deal with the situation by simulating the MMU trap
670 
	 * on TL=1 and restart the respective SAVE or RESTORE instruction once the MMU
 494 
	 * on TL=1 and restart the respective SAVE or RESTORE instruction once the MMU
671 
	 * trap is resolved. However, because we are in the wrong window from the
 495 
	 * trap is resolved. However, because we are in the wrong window from the
672 
	 * perspective of the MMU trap, we need to synchronize CWP with CWP from TL=0.
 496 
	 * perspective of the MMU trap, we need to synchronize CWP with CWP from TL=0.
673 
	 */
497 
	 */
674 
	and %g3, TSTATE_CWP_MASK, %g4
 498 
	and %g3, TSTATE_CWP_MASK, %g4
675 
	wrpr %g4, 0, %cwp			! resynchronize CWP
 499 
	wrpr %g4, 0, %cwp			! resynchronize CWP
676 
 
 500 
 
677 
	andcc %g3, TSTATE_PRIV_BIT, %g0		! if this trap came from the privileged mode...
 501 
	andcc %g3, TSTATE_PRIV_BIT, %g0		! if this trap came from the privileged mode...
678 
	bnz 0f					! ...skip setting of kernel stack and primary context
 502 
	bnz 0f					! ...skip setting of kernel stack and primary context
679 
	nop
 503 
	nop
680
504
681 
.endif
 505 
.endif
682 
	/*
 506 
	/*
683 
	 * Normal window spills will go to the userspace window buffer.
 507 
	 * Normal window spills will go to the userspace window buffer.
684 
	 */
 508 
	 */
685 
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate
 509 
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate
686 
 
 510 
 
687 
	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent unnecessary clean_window exceptions
 511 
	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent unnecessary clean_window exceptions
688 
 
 512 
 
689 
	/*
 513 
	/*
690 
	 * Switch to kernel stack. The old stack is
 514 
	 * Switch to kernel stack. The old stack is
691 
	 * automatically saved in the old window's %sp
 515 
	 * automatically saved in the old window's %sp
692 
	 * and the new window's %fp.
 516 
	 * and the new window's %fp.
693 
	 */
 517 
	 */
694 
	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
 518 
	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
695 
 
 519 
 
696 
.if \is_syscall
 520 
.if \is_syscall
697 
	/*
 521 
	/*
698 
	 * Copy arguments for the syscall to the new window.
 522 
	 * Copy arguments for the syscall to the new window.
699 
	 */
 523 
	 */
700 
	mov %i0, %o0
 524 
	mov %i0, %o0
701 
	mov %i1, %o1
 525 
	mov %i1, %o1
702 
	mov %i2, %o2
 526 
	mov %i2, %o2
703 
	mov %i3, %o3
 527 
	mov %i3, %o3
704 
	mov %i4, %o4
 528 
	mov %i4, %o4
705 
	mov %i5, %o5
 529 
	mov %i5, %o5
706 
.endif
 530 
.endif
707 
 
 531 
 
708 
	/*
 532 
	/*
709 
	 * Mark the CANRESTORE windows as OTHER windows.
 533 
	 * Mark the CANRESTORE windows as OTHER windows.
710 
	 */
 534 
	 */
711 
	rdpr %canrestore, %l0
 535 
	rdpr %canrestore, %l0
712 
	wrpr %l0, %otherwin
 536 
	wrpr %l0, %otherwin
713 
	wrpr %g0, %canrestore
 537 
	wrpr %g0, %canrestore
714 
 
 538 
 
715 
	/*
 539 
	/*
716 
	 * Switch to primary context 0.
 540 
	 * Switch to primary context 0.
717 
	 */
 541 
	 */
718 
	mov VA_PRIMARY_CONTEXT_REG, %l0
 542 
	mov VA_PRIMARY_CONTEXT_REG, %l0
719 
	stxa %g0, [%l0] ASI_DMMU
 543 
	stxa %g0, [%l0] ASI_DMMU
720 
	rd %pc, %l0
 544 
	rd %pc, %l0
721 
	flush %l0
 545 
	flush %l0
722 
 
 546 
 
723 
.if NOT(\is_syscall)
 547 
.if NOT(\is_syscall)
724 
	ba 1f
 548 
	ba 1f
725 
	nop
 549 
	nop
726 
0:
 550 
0:
727 
	save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
 551 
	save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
728 
 
 552 
 
729 
	/*
 553 
	/*
730 
	 * At this moment, we are using the kernel stack
554 
	 * At this moment, we are using the kernel stack
731 
	 * and have successfully allocated a register window.
 555 
	 * and have successfully allocated a register window.
732 
	 */
 556 
	 */
733 
1:
 557 
1:
734 
.endif
 558 
.endif
735 
	/*
 559 
	/*
736 
	 * Other window spills will go to the userspace window buffer
 560 
	 * Other window spills will go to the userspace window buffer
737 
	 * and normal spills will go to the kernel stack.
 561 
	 * and normal spills will go to the kernel stack.
738 
	 */
 562 
	 */
739 
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(0), %wstate
 563 
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(0), %wstate
740
564
741 
	/*
 565 
	/*
742 
	 * Copy arguments.
 566 
	 * Copy arguments.
743 
	 */
 567 
	 */
744 
	mov %g1, %l0
 568 
	mov %g1, %l0
745 
.if NOT(\is_syscall)
 569 
.if NOT(\is_syscall)
746 
	mov %g2, %o0
 570 
	mov %g2, %o0
747 
.else
 571 
.else
748 
	! store the syscall number on the stack as 7th argument
 572 
	! store the syscall number on the stack as 7th argument
749 
	stx %g2, [%sp + STACK_WINDOW_SAVE_AREA_SIZE + STACK_BIAS + STACK_ARG6]
573 
	stx %g2, [%sp + STACK_WINDOW_SAVE_AREA_SIZE + STACK_BIAS + STACK_ARG6]
750 
.endif
 574 
.endif
751 
 
 575 
 
752 
	/*
 576 
	/*
753 
	 * Save TSTATE, TPC and TNPC aside.
 577 
	 * Save TSTATE, TPC and TNPC aside.
754 
	 */
 578 
	 */
755 
	rdpr %tstate, %g1
 579 
	rdpr %tstate, %g1
756 
	rdpr %tpc, %g2
 580 
	rdpr %tpc, %g2
757 
	rdpr %tnpc, %g3
 581 
	rdpr %tnpc, %g3
758 
	rd %y, %g4
 582 
	rd %y, %g4
759 
 
 583 
 
760 
	stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE]
 584 
	stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE]
761 
	stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC]
 585 
	stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC]
762 
	stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC]
 586 
	stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC]
763 
 
 587 
 
764 
	/*
 588 
	/*
765 
	 * Save the Y register.
 589 
	 * Save the Y register.
766 
	 * This register is deprecated according to SPARC V9 specification
 590 
	 * This register is deprecated according to SPARC V9 specification
767 
	 * and is only present for backward compatibility with previous
 591 
	 * and is only present for backward compatibility with previous
768 
	 * versions of the SPARC architecture.
 592 
	 * versions of the SPARC architecture.
769 
	 * Surprisingly, gcc makes use of this register without a notice.
 593 
	 * Surprisingly, gcc makes use of this register without a notice.
770 
	 */
 594 
	 */
771 
	stx %g4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y]
 595 
	stx %g4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y]
772
596
773 
	wrpr %g0, 0, %tl
 597 
	wrpr %g0, 0, %tl
774 
	wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate
 598 
	wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate
775 
	SAVE_GLOBALS
 599 
	SAVE_GLOBALS
776
600
777 
.if NOT(\is_syscall)
 601 
.if NOT(\is_syscall)
778 
	/*
 602 
	/*
779 
	 * Call the higher-level handler and pass istate as second parameter.
 603 
	 * Call the higher-level handler and pass istate as second parameter.
780 
	 */
 604 
	 */
781 
	call %l0
 605 
	call %l0
782 
	add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1
 606 
	add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1
783 
.else
 607 
.else
784 
	/*
 608 
	/*
785 
	 * Call the higher-level syscall handler.
 609 
	 * Call the higher-level syscall handler.
786 
	 */
 610 
	 */
787 
	call syscall_handler
 611 
	call syscall_handler
788 
	nop
 612 
	nop
789 
	mov %o0, %i0				! copy the value returned by the syscall
 613 
	mov %o0, %i0				! copy the value returned by the syscall
790 
.endif
 614 
.endif
791 
 
 615 
 
792 
	RESTORE_GLOBALS
 616 
	RESTORE_GLOBALS
793 
	rdpr %pstate, %l1			! we must preserve the PEF bit
 617 
	rdpr %pstate, %l1			! we must preserve the PEF bit
794 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
 618 
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
795 
	wrpr %g0, 1, %tl
 619 
	wrpr %g0, 1, %tl
796
620
797 
	/*
 621 
	/*
798 
	 * Read TSTATE, TPC and TNPC from saved copy.
 622 
	 * Read TSTATE, TPC and TNPC from saved copy.
799 
	 */
 623 
	 */
800 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
 624 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
801 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
 625 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
802 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
 626 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
803 
 
 627 
 
804 
	/*
 628 
	/*
805 
	 * Copy PSTATE.PEF to the in-register copy of TSTATE.
 629 
	 * Copy PSTATE.PEF to the in-register copy of TSTATE.
806 
	 */
 630 
	 */
807 
	and %l1, PSTATE_PEF_BIT, %l1
 631 
	and %l1, PSTATE_PEF_BIT, %l1
808 
	sllx %l1, TSTATE_PSTATE_SHIFT, %l1
 632 
	sllx %l1, TSTATE_PSTATE_SHIFT, %l1
809 
	sethi %hi(TSTATE_PEF_BIT), %g4
 633 
	sethi %hi(TSTATE_PEF_BIT), %g4
810 
	andn %g1, %g4, %g1
 634 
	andn %g1, %g4, %g1
811 
	or %g1, %l1, %g1
 635 
	or %g1, %l1, %g1
812 
 
 636 
 
813 
	/*
 637 
	/*
814 
	 * Restore TSTATE, TPC and TNPC from saved copies.
 638 
	 * Restore TSTATE, TPC and TNPC from saved copies.
815 
	 */
 639 
	 */
816 
	wrpr %g1, 0, %tstate
 640 
	wrpr %g1, 0, %tstate
817 
	wrpr %g2, 0, %tpc
 641 
	wrpr %g2, 0, %tpc
818 
	wrpr %g3, 0, %tnpc
 642 
	wrpr %g3, 0, %tnpc
819 
 
 643 
 
820 
	/*
 644 
	/*
821 
	 * Restore Y.
 645 
	 * Restore Y.
822 
	 */
 646 
	 */
823 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y], %g4
 647 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y], %g4
824 
	wr %g4, %y
 648 
	wr %g4, %y
825 
 
 649 
 
826 
	/*
 650 
	/*
827 
	 * If OTHERWIN is zero, then all the userspace windows have been
 651 
	 * If OTHERWIN is zero, then all the userspace windows have been
828 
	 * spilled to kernel memory (i.e. register window buffer). Moreover,
 652 
	 * spilled to kernel memory (i.e. register window buffer). Moreover,
829 
	 * if the scheduler was called in the meantime, all valid windows
 653 
	 * if the scheduler was called in the meantime, all valid windows
830 
	 * belonging to other threads were spilled by context_restore().
 654 
	 * belonging to other threads were spilled by context_restore().
831 
	 * If OTHERWIN is non-zero, then some userspace windows are still
 655 
	 * If OTHERWIN is non-zero, then some userspace windows are still
832 
	 * valid. Others might have been spilled. However, the CWP pointer
 656 
	 * valid. Others might have been spilled. However, the CWP pointer
833 
	 * needs no fixing because the scheduler had not been called.
 657 
	 * needs no fixing because the scheduler had not been called.
834 
	 */
 658 
	 */
835 
	rdpr %otherwin, %l0
 659 
	rdpr %otherwin, %l0
836 
	brnz %l0, 0f
 660 
	brnz %l0, 0f
837 
	nop
 661 
	nop
838 
 
 662 
 
839 
	/*
 663 
	/*
840 
	 * OTHERWIN == 0
 664 
	 * OTHERWIN == 0
841 
	 */
 665 
	 */
842 
 
 666 
 
843 
	/*
 667 
	/*
844 
	 * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP.
 668 
	 * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP.
845 
	 */
 669 
	 */
846 
	and %g1, TSTATE_CWP_MASK, %l0
 670 
	and %g1, TSTATE_CWP_MASK, %l0
847 
	inc %l0
 671 
	inc %l0
848 
	and %l0, NWINDOWS - 1, %l0	! %l0 mod NWINDOWS
 672 
	and %l0, NWINDOWS - 1, %l0	! %l0 mod NWINDOWS
849 
	rdpr %cwp, %l1
 673 
	rdpr %cwp, %l1
850 
	cmp %l0, %l1
 674 
	cmp %l0, %l1
851 
	bz 0f				! CWP is ok
 675 
	bz 0f				! CWP is ok
852 
	nop
 676 
	nop
853 
 
 677 
 
854 
	/*
 678 
	/*
855 
	 * Fix CWP.
 679 
	 * Fix CWP.
856 
	 * In order to recapitulate, the input registers in the current
 680 
	 * In order to recapitulate, the input registers in the current
857 
	 * window are the output registers of the window to which we want
 681 
	 * window are the output registers of the window to which we want
858 
	 * to restore. Because the fill trap fills only input and local
 682 
	 * to restore. Because the fill trap fills only input and local
859 
	 * registers of a window, we need to preserve those output
 683 
	 * registers of a window, we need to preserve those output
860 
	 * registers manually.
 684 
	 * registers manually.
861 
	 */
 685 
	 */
862 
	mov %sp, %g2
 686 
	mov %sp, %g2
863 
	stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0]
 687 
	stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0]
864 
	stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1]
 688 
	stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1]
865 
	stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2]
 689 
	stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2]
866 
	stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3]
 690 
	stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3]
867 
	stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4]
 691 
	stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4]
868 
	stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5]
 692 
	stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5]
869 
	stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6]
 693 
	stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6]
870 
	stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7]
 694 
	stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7]
871 
	wrpr %l0, 0, %cwp
 695 
	wrpr %l0, 0, %cwp
872 
	mov %g2, %sp
 696 
	mov %g2, %sp
873 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0
 697 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0
874 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1
 698 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1
875 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2
 699 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2
876 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3
 700 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3
877 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4
 701 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4
878 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5
 702 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5
879 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6
 703 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6
880 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7
 704 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7
881 
 
 705 
 
882 
	/*
 706 
	/*
883 
	 * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.
 707 
	 * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.
884 
	 * The CWP has already been restored to the value it had after the SAVE
 708 
	 * The CWP has already been restored to the value it had after the SAVE
885 
	 * at the beginning of this function.
 709 
	 * at the beginning of this function.
886 
	 */
 710 
	 */
887 
0:
 711 
0:
888 
.if NOT(\is_syscall)
 712 
.if NOT(\is_syscall)
889 
	rdpr %tstate, %g1
 713 
	rdpr %tstate, %g1
890 
	andcc %g1, TSTATE_PRIV_BIT, %g0		! if we are not returning to userspace...,
 714 
	andcc %g1, TSTATE_PRIV_BIT, %g0		! if we are not returning to userspace...,
891 
	bnz 1f					! ...skip restoring userspace windows
 715 
	bnz 1f					! ...skip restoring userspace windows
892 
	nop
 716 
	nop
893 
.endif
 717 
.endif
894 
 
 718 
 
895 
	/*
 719 
	/*
896 
	 * Spills and fills will be processed by the {spill,fill}_1_normal
 720 
	 * Spills and fills will be processed by the {spill,fill}_1_normal
897 
	 * handlers.
 721 
	 * handlers.
898 
	 */
 722 
	 */
899 
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate
 723 
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate
900 
 
 724 
 
901 
	/*
 725 
	/*
902 
	 * Set primary context according to secondary context.
 726 
	 * Set primary context according to secondary context.
903 
	 */
 727 
	 */
904 
	wr %g0, ASI_DMMU, %asi
 728 
	wr %g0, ASI_DMMU, %asi
905 
	ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1
 729 
	ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1
906 
	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi
 730 
	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi
907 
	rd %pc, %g1
 731 
	rd %pc, %g1
908 
	flush %g1
 732 
	flush %g1
909
733
910 
	rdpr %cwp, %g1
 734 
	rdpr %cwp, %g1
911 
	rdpr %otherwin, %g2
 735 
	rdpr %otherwin, %g2
912 
 
 736 
 
913 
	/*
 737 
	/*
914 
	 * Skip all OTHERWIN windows and descend to the first window
 738 
	 * Skip all OTHERWIN windows and descend to the first window
915 
	 * in the userspace window buffer.
 739 
	 * in the userspace window buffer.
916 
	 */
 740 
	 */
917 
	sub %g1, %g2, %g3
 741 
	sub %g1, %g2, %g3
918 
	dec %g3
 742 
	dec %g3
919 
	and %g3, NWINDOWS - 1, %g3
 743 
	and %g3, NWINDOWS - 1, %g3
920 
	wrpr %g3, 0, %cwp
 744 
	wrpr %g3, 0, %cwp
921 
 
 745 
 
922 
	/*
 746 
	/*
923 
	 * CWP is now in the window last saved in the userspace window buffer.
 747 
	 * CWP is now in the window last saved in the userspace window buffer.
924 
	 * Fill all windows stored in the buffer.
 748 
	 * Fill all windows stored in the buffer.
925 
	 */
 749 
	 */
926 
	clr %g4
 750 
	clr %g4
927 
	set PAGE_SIZE - 1, %g5
 751 
	set PAGE_SIZE - 1, %g5
928 
0:	andcc %g7, %g5, %g0			! PAGE_SIZE alignment check
 752 
0:	andcc %g7, %g5, %g0			! PAGE_SIZE alignment check
929 
	bz 0f					! %g7 is page-aligned, no more windows to refill
 753 
	bz 0f					! %g7 is page-aligned, no more windows to refill
930 
	nop
 754 
	nop
931 
 
 755 
 
932 
	add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7
 756 
	add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7
933 
	ldx [%g7 + L0_OFFSET], %l0
 757 
	ldx [%g7 + L0_OFFSET], %l0
934 
	ldx [%g7 + L1_OFFSET], %l1
 758 
	ldx [%g7 + L1_OFFSET], %l1
935 
	ldx [%g7 + L2_OFFSET], %l2
 759 
	ldx [%g7 + L2_OFFSET], %l2
936 
	ldx [%g7 + L3_OFFSET], %l3
 760 
	ldx [%g7 + L3_OFFSET], %l3
937 
	ldx [%g7 + L4_OFFSET], %l4
 761 
	ldx [%g7 + L4_OFFSET], %l4
938 
	ldx [%g7 + L5_OFFSET], %l5
 762 
	ldx [%g7 + L5_OFFSET], %l5
939 
	ldx [%g7 + L6_OFFSET], %l6
 763 
	ldx [%g7 + L6_OFFSET], %l6
940 
	ldx [%g7 + L7_OFFSET], %l7
 764 
	ldx [%g7 + L7_OFFSET], %l7
941 
	ldx [%g7 + I0_OFFSET], %i0
 765 
	ldx [%g7 + I0_OFFSET], %i0
942 
	ldx [%g7 + I1_OFFSET], %i1
 766 
	ldx [%g7 + I1_OFFSET], %i1
943 
	ldx [%g7 + I2_OFFSET], %i2
 767 
	ldx [%g7 + I2_OFFSET], %i2
944 
	ldx [%g7 + I3_OFFSET], %i3
 768 
	ldx [%g7 + I3_OFFSET], %i3
945 
	ldx [%g7 + I4_OFFSET], %i4
 769 
	ldx [%g7 + I4_OFFSET], %i4
946 
	ldx [%g7 + I5_OFFSET], %i5
 770 
	ldx [%g7 + I5_OFFSET], %i5
947 
	ldx [%g7 + I6_OFFSET], %i6
 771 
	ldx [%g7 + I6_OFFSET], %i6
948 
	ldx [%g7 + I7_OFFSET], %i7
 772 
	ldx [%g7 + I7_OFFSET], %i7
949 
 
 773 
 
950 
	dec %g3
 774 
	dec %g3
951 
	and %g3, NWINDOWS - 1, %g3
 775 
	and %g3, NWINDOWS - 1, %g3
952 
	wrpr %g3, 0, %cwp			! switch to the preceeding window
 776 
	wrpr %g3, 0, %cwp			! switch to the preceeding window
953 
 
 777 
 
954 
	ba 0b
 778 
	ba 0b
955 
	inc %g4
 779 
	inc %g4
956 
 
 780 
 
957 
0:
 781 
0:
958 
	/*
 782 
	/*
959 
	 * Switch back to the proper current window and adjust
 783 
	 * Switch back to the proper current window and adjust
960 
	 * OTHERWIN, CANRESTORE, CANSAVE and CLEANWIN.
 784 
	 * OTHERWIN, CANRESTORE, CANSAVE and CLEANWIN.
961 
	 */
 785 
	 */
962 
	wrpr %g1, 0, %cwp
 786 
	wrpr %g1, 0, %cwp
963 
	add %g4, %g2, %g2
 787 
	add %g4, %g2, %g2
964 
	cmp %g2, NWINDOWS - 2
 788 
	cmp %g2, NWINDOWS - 2
965 
	bg 2f					! fix the CANRESTORE=NWINDOWS-1 anomaly
 789 
	bg 2f					! fix the CANRESTORE=NWINDOWS-1 anomaly
966 
	mov NWINDOWS - 2, %g1			! use dealy slot for both cases
 790 
	mov NWINDOWS - 2, %g1			! use dealy slot for both cases
967 
	sub %g1, %g2, %g1
 791 
	sub %g1, %g2, %g1
968
792
969 
	wrpr %g0, 0, %otherwin
 793 
	wrpr %g0, 0, %otherwin
970 
	wrpr %g1, 0, %cansave			! NWINDOWS - 2 - CANRESTORE
 794 
	wrpr %g1, 0, %cansave			! NWINDOWS - 2 - CANRESTORE
971 
	wrpr %g2, 0, %canrestore		! OTHERWIN + windows in the buffer
 795 
	wrpr %g2, 0, %canrestore		! OTHERWIN + windows in the buffer
972 
	wrpr %g2, 0, %cleanwin			! avoid information leak
 796 
	wrpr %g2, 0, %cleanwin			! avoid information leak
973 
 
 797 
 
974 
1:
 798 
1:
975 
	restore
 799 
	restore
976 
 
 800 
 
977 
.if \is_syscall
 801 
.if \is_syscall
978 
	done
 802 
	done
979 
.else
 803 
.else
980 
	retry
 804 
	retry
981 
.endif
 805 
.endif
982 
 
 806 
 
983 
	/*
 807 
	/*
984 
	 * We got here in order to avoid inconsistency of the window state registers.
 808 
	 * We got here in order to avoid inconsistency of the window state registers.
985 
	 * If the:
 809 
	 * If the:
986 
	 *
 810 
	 *
987 
	 * 	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
 811 
	 * 	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
988 
	 *
 812 
	 *
989 
	 * instruction trapped and spilled a register window into the userspace
 813 
	 * instruction trapped and spilled a register window into the userspace
990 
	 * window buffer, we have just restored NWINDOWS - 1 register windows.
 814 
	 * window buffer, we have just restored NWINDOWS - 1 register windows.
991 
	 * However, CANRESTORE can be only NWINDOW - 2 at most.
 815 
	 * However, CANRESTORE can be only NWINDOW - 2 at most.
992 
	 *
 816 
	 *
993 
	 * The solution is to manually switch to (CWP - 1) mod NWINDOWS
 817 
	 * The solution is to manually switch to (CWP - 1) mod NWINDOWS
994 
	 * and set the window state registers so that:
 818 
	 * and set the window state registers so that:
995 
	 *
 819 
	 *
996 
	 * 	CANRESTORE 	= NWINDOWS - 2
 820 
	 * 	CANRESTORE 	= NWINDOWS - 2
997 
	 *	CLEANWIN	= NWINDOWS - 2
 821 
	 *	CLEANWIN	= NWINDOWS - 2
998 
	 *	CANSAVE 	= 0
 822 
	 *	CANSAVE 	= 0
999 
	 *	OTHERWIN	= 0
 823 
	 *	OTHERWIN	= 0
1000 
	 *
 824 
	 *
1001 
	 * The RESTORE instruction is therfore to be skipped.
 825 
	 * The RESTORE instruction is therfore to be skipped.
1002 
	 */
 826 
	 */
1003 
2:
 827 
2:
1004 
	wrpr %g0, 0, %otherwin
 828 
	wrpr %g0, 0, %otherwin
1005 
	wrpr %g0, 0, %cansave
 829 
	wrpr %g0, 0, %cansave
1006 
	wrpr %g1, 0, %canrestore
 830 
	wrpr %g1, 0, %canrestore
1007 
	wrpr %g1, 0, %cleanwin
 831 
	wrpr %g1, 0, %cleanwin
1008 
 
 832 
 
1009 
	rdpr %cwp, %g1
 833 
	rdpr %cwp, %g1
1010 
	dec %g1
 834 
	dec %g1
1011 
	and %g1, NWINDOWS - 1, %g1
 835 
	and %g1, NWINDOWS - 1, %g1
1012 
	wrpr %g1, 0, %cwp			! CWP--
 836 
	wrpr %g1, 0, %cwp			! CWP--
1013
837
1014 
.if \is_syscall
 838 
.if \is_syscall
1015 
	done
 839 
	done
1016 
.else
 840 
.else
1017 
	retry
 841 
	retry
1018 
.endif
 842 
.endif
1019 
 
 843 
 
1020 
.endm
 844 
.endm
1021 
 
 845 
 
1022 
.global preemptible_handler
 846 
.global preemptible_handler
1023 
preemptible_handler:
 847 
preemptible_handler:
1024 
	PREEMPTIBLE_HANDLER_TEMPLATE 0
 848 
	PREEMPTIBLE_HANDLER_TEMPLATE 0
1025 
 
 849 
 
1026 
.global trap_instruction_handler
 850 
.global trap_instruction_handler
1027 
trap_instruction_handler:
 851 
trap_instruction_handler:
1028 
	PREEMPTIBLE_HANDLER_TEMPLATE 1
 852 
	PREEMPTIBLE_HANDLER_TEMPLATE 1
1029 
 
 853