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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Martin Decky |
2 | * Copyright (c) 2005 Martin Decky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ppc32mm |
29 | /** @addtogroup ppc32mm |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #ifndef KERN_ppc32_PAGE_H_ |
35 | #ifndef KERN_ppc32_PAGE_H_ |
36 | #define KERN_ppc32_PAGE_H_ |
36 | #define KERN_ppc32_PAGE_H_ |
37 | 37 | ||
38 | #include <arch/mm/frame.h> |
38 | #include <arch/mm/frame.h> |
39 | 39 | ||
40 | #define PAGE_WIDTH FRAME_WIDTH |
40 | #define PAGE_WIDTH FRAME_WIDTH |
41 | #define PAGE_SIZE FRAME_SIZE |
41 | #define PAGE_SIZE FRAME_SIZE |
42 | 42 | ||
43 | #define PAGE_COLOR_BITS 0 /* dummy */ |
43 | #define PAGE_COLOR_BITS 0 /* dummy */ |
44 | 44 | ||
45 | #ifdef KERNEL |
45 | #ifdef KERNEL |
46 | 46 | ||
47 | #ifndef __ASM__ |
47 | #ifndef __ASM__ |
48 | # define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) |
48 | # define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) |
49 | # define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) |
49 | # define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) |
50 | #else |
50 | #else |
51 | # define KA2PA(x) ((x) - 0x80000000) |
51 | # define KA2PA(x) ((x) - 0x80000000) |
52 | # define PA2KA(x) ((x) + 0x80000000) |
52 | # define PA2KA(x) ((x) + 0x80000000) |
53 | #endif |
53 | #endif |
54 | 54 | ||
55 | /* |
55 | /* |
56 | * Implementation of generic 4-level page table interface, |
56 | * Implementation of generic 4-level page table interface, |
57 | * the hardware Page Hash Table is used as cache. |
57 | * the hardware Page Hash Table is used as cache. |
58 | * |
58 | * |
59 | * Page table layout: |
59 | * Page table layout: |
60 | * - 32-bit virtual addressess |
60 | * - 32-bit virtual addressess |
61 | * - Offset is 12 bits => pages are 4K long |
61 | * - Offset is 12 bits => pages are 4K long |
62 | * - PTL0 has 1024 entries (10 bits) |
62 | * - PTL0 has 1024 entries (10 bits) |
63 | * - PTL1 is not used |
63 | * - PTL1 is not used |
64 | * - PTL2 is not used |
64 | * - PTL2 is not used |
65 | * - PLT3 has 1024 entries (10 bits) |
65 | * - PLT3 has 1024 entries (10 bits) |
66 | */ |
66 | */ |
67 | 67 | ||
68 | /* Number of entries in each level. */ |
68 | /* Number of entries in each level. */ |
69 | #define PTL0_ENTRIES_ARCH 1024 |
69 | #define PTL0_ENTRIES_ARCH 1024 |
70 | #define PTL1_ENTRIES_ARCH 0 |
70 | #define PTL1_ENTRIES_ARCH 0 |
71 | #define PTL2_ENTRIES_ARCH 0 |
71 | #define PTL2_ENTRIES_ARCH 0 |
72 | #define PTL3_ENTRIES_ARCH 1024 |
72 | #define PTL3_ENTRIES_ARCH 1024 |
73 | 73 | ||
74 | /* Page table sizes for each level. */ |
74 | /* Page table sizes for each level. */ |
75 | #define PTL0_SIZE_ARCH ONE_FRAME |
75 | #define PTL0_SIZE_ARCH ONE_FRAME |
76 | #define PTL1_SIZE_ARCH 0 |
76 | #define PTL1_SIZE_ARCH 0 |
77 | #define PTL2_SIZE_ARCH 0 |
77 | #define PTL2_SIZE_ARCH 0 |
78 | #define PTL3_SIZE_ARCH ONE_FRAME |
78 | #define PTL3_SIZE_ARCH ONE_FRAME |
79 | 79 | ||
80 | /* Macros calculating indices into page tables on each level. */ |
80 | /* Macros calculating indices into page tables on each level. */ |
81 | #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff) |
81 | #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff) |
82 | #define PTL1_INDEX_ARCH(vaddr) 0 |
82 | #define PTL1_INDEX_ARCH(vaddr) 0 |
83 | #define PTL2_INDEX_ARCH(vaddr) 0 |
83 | #define PTL2_INDEX_ARCH(vaddr) 0 |
84 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff) |
84 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff) |
85 | 85 | ||
86 | /* Get PTE address accessors for each level. */ |
86 | /* Get PTE address accessors for each level. */ |
87 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ |
87 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ |
88 | (((pte_t *) (ptl0))[(i)].pfn << 12) |
88 | (((pte_t *) (ptl0))[(i)].pfn << 12) |
89 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ |
89 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ |
90 | (ptl1) |
90 | (ptl1) |
91 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ |
91 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ |
92 | (ptl2) |
92 | (ptl2) |
93 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ |
93 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ |
94 | (((pte_t *) (ptl3))[(i)].pfn << 12) |
94 | (((pte_t *) (ptl3))[(i)].pfn << 12) |
95 | 95 | ||
96 | /* Set PTE address accessors for each level. */ |
96 | /* Set PTE address accessors for each level. */ |
97 | #define SET_PTL0_ADDRESS_ARCH(ptl0) |
97 | #define SET_PTL0_ADDRESS_ARCH(ptl0) |
98 | #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ |
98 | #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ |
99 | (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12) |
99 | (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12) |
100 | #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
100 | #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
101 | #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
101 | #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
102 | #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ |
102 | #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ |
103 | (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12) |
103 | (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12) |
104 | 104 | ||
105 | /* Get PTE flags accessors for each level. */ |
105 | /* Get PTE flags accessors for each level. */ |
106 | #define GET_PTL1_FLAGS_ARCH(ptl0, i) \ |
106 | #define GET_PTL1_FLAGS_ARCH(ptl0, i) \ |
107 | get_pt_flags((pte_t *) (ptl0), (index_t) (i)) |
107 | get_pt_flags((pte_t *) (ptl0), (index_t) (i)) |
108 | #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ |
108 | #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ |
109 | PAGE_PRESENT |
109 | PAGE_PRESENT |
110 | #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ |
110 | #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ |
111 | PAGE_PRESENT |
111 | PAGE_PRESENT |
112 | #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ |
112 | #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ |
113 | get_pt_flags((pte_t *) (ptl3), (index_t) (i)) |
113 | get_pt_flags((pte_t *) (ptl3), (index_t) (i)) |
114 | 114 | ||
115 | /* Set PTE flags accessors for each level. */ |
115 | /* Set PTE flags accessors for each level. */ |
116 | #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ |
116 | #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ |
117 | set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x)) |
117 | set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x)) |
118 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
118 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
119 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
119 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
120 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ |
120 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ |
121 | set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x)) |
121 | set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x)) |
122 | 122 | ||
123 | /* Macros for querying the last-level PTEs. */ |
123 | /* Macros for querying the last-level PTEs. */ |
124 | #define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) |
124 | #define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) |
125 | #define PTE_PRESENT_ARCH(pte) ((pte)->p != 0) |
125 | #define PTE_PRESENT_ARCH(pte) ((pte)->p != 0) |
126 | #define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) |
126 | #define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) |
127 | #define PTE_WRITABLE_ARCH(pte) 1 |
127 | #define PTE_WRITABLE_ARCH(pte) 1 |
128 | #define PTE_EXECUTABLE_ARCH(pte) 1 |
128 | #define PTE_EXECUTABLE_ARCH(pte) 1 |
129 | 129 | ||
130 | #ifndef __ASM__ |
130 | #ifndef __ASM__ |
131 | 131 | ||
132 | #include <mm/mm.h> |
132 | #include <mm/mm.h> |
133 | #include <arch/interrupt.h> |
133 | #include <arch/interrupt.h> |
134 | 134 | ||
135 | static inline int get_pt_flags(pte_t *pt, index_t i) |
135 | static inline int get_pt_flags(pte_t *pt, index_t i) |
136 | { |
136 | { |
137 | pte_t *p = &pt[i]; |
137 | pte_t *p = &pt[i]; |
138 | 138 | ||
139 | return ((1 << PAGE_CACHEABLE_SHIFT) | |
139 | return ((1 << PAGE_CACHEABLE_SHIFT) | |
140 | ((!p->p) << PAGE_PRESENT_SHIFT) | |
140 | ((!p->p) << PAGE_PRESENT_SHIFT) | |
141 | (1 << PAGE_USER_SHIFT) | |
141 | (1 << PAGE_USER_SHIFT) | |
142 | (1 << PAGE_READ_SHIFT) | |
142 | (1 << PAGE_READ_SHIFT) | |
143 | (1 << PAGE_WRITE_SHIFT) | |
143 | (1 << PAGE_WRITE_SHIFT) | |
144 | (1 << PAGE_EXEC_SHIFT) | |
144 | (1 << PAGE_EXEC_SHIFT) | |
145 | (p->g << PAGE_GLOBAL_SHIFT)); |
145 | (p->g << PAGE_GLOBAL_SHIFT)); |
146 | } |
146 | } |
147 | 147 | ||
148 | static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
148 | static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
149 | { |
149 | { |
150 | pte_t *p = &pt[i]; |
150 | pte_t *p = &pt[i]; |
151 | 151 | ||
152 | p->p = !(flags & PAGE_NOT_PRESENT); |
152 | p->p = !(flags & PAGE_NOT_PRESENT); |
153 | p->g = (flags & PAGE_GLOBAL) != 0; |
153 | p->g = (flags & PAGE_GLOBAL) != 0; |
154 | p->valid = 1; |
154 | p->valid = 1; |
155 | } |
155 | } |
156 | 156 | ||
157 | extern void page_arch_init(void); |
157 | extern void page_arch_init(void); |
158 | 158 | ||
159 | #endif /* __ASM__ */ |
159 | #endif /* __ASM__ */ |
160 | 160 | ||
161 | #endif /* KERNEL */ |
161 | #endif /* KERNEL */ |
162 | 162 | ||
163 | #endif |
163 | #endif |
164 | 164 | ||
165 | /** @} |
165 | /** @} |
166 | */ |
166 | */ |
167 | 167 |