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1 | /* |
1 | /* |
2 | * Copyright (c) 2003-2004 Jakub Jermar |
2 | * Copyright (c) 2003-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup mips32 |
29 | /** @addtogroup mips32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch.h> |
35 | #include <arch.h> |
36 | #include <arch/boot.h> |
- | |
37 | #include <arch/cp0.h> |
36 | #include <arch/cp0.h> |
38 | #include <arch/exception.h> |
37 | #include <arch/exception.h> |
39 | #include <mm/as.h> |
38 | #include <mm/as.h> |
40 | - | ||
41 | #include <userspace.h> |
39 | #include <userspace.h> |
42 | #include <arch/console.h> |
- | |
43 | #include <memstr.h> |
40 | #include <memstr.h> |
44 | #include <proc/thread.h> |
41 | #include <proc/thread.h> |
45 | #include <proc/uarg.h> |
42 | #include <proc/uarg.h> |
46 | #include <print.h> |
43 | #include <print.h> |
- | 44 | #include <console/console.h> |
|
47 | #include <syscall/syscall.h> |
45 | #include <syscall/syscall.h> |
48 | #include <sysinfo/sysinfo.h> |
46 | #include <sysinfo/sysinfo.h> |
49 | - | ||
50 | #include <arch/interrupt.h> |
47 | #include <arch/interrupt.h> |
51 | #include <console/chardev.h> |
48 | #include <console/chardev.h> |
52 | #include <arch/barrier.h> |
49 | #include <arch/barrier.h> |
53 | #include <arch/debugger.h> |
50 | #include <arch/debugger.h> |
54 | #include <genarch/fb/fb.h> |
51 | #include <genarch/fb/fb.h> |
55 | #include <genarch/fb/visuals.h> |
52 | #include <genarch/fb/visuals.h> |
- | 53 | #include <genarch/drivers/dsrln/dsrlnin.h> |
|
- | 54 | #include <genarch/drivers/dsrln/dsrlnout.h> |
|
- | 55 | #include <genarch/srln/srln.h> |
|
56 | #include <macros.h> |
56 | #include <macros.h> |
57 | #include <ddi/device.h> |
57 | #include <config.h> |
58 | - | ||
- | 58 | #include <string.h> |
|
- | 59 | #include <arch/drivers/msim.h> |
|
59 | #include <arch/asm/regname.h> |
60 | #include <arch/asm/regname.h> |
60 | 61 | ||
61 | /* Size of the code jumping to the exception handler code |
62 | /* Size of the code jumping to the exception handler code |
62 | * - J+NOP |
63 | * - J+NOP |
63 | */ |
64 | */ |
64 | #define EXCEPTION_JUMP_SIZE 8 |
65 | #define EXCEPTION_JUMP_SIZE 8 |
65 | 66 | ||
66 | #define TLB_EXC ((char *) 0x80000000) |
67 | #define TLB_EXC ((char *) 0x80000000) |
67 | #define NORM_EXC ((char *) 0x80000180) |
68 | #define NORM_EXC ((char *) 0x80000180) |
68 | #define CACHE_EXC ((char *) 0x80000100) |
69 | #define CACHE_EXC ((char *) 0x80000100) |
69 | 70 | ||
70 | 71 | ||
71 | /* Why the linker moves the variable 64K away in assembler |
72 | /* Why the linker moves the variable 64K away in assembler |
72 | * when not in .text section ???????? |
73 | * when not in .text section? |
73 | */ |
74 | */ |
74 | uintptr_t supervisor_sp __attribute__ ((section (".text"))); |
- | |
- | 75 | ||
75 | /* Stack pointer saved when entering user mode */ |
76 | /* Stack pointer saved when entering user mode */ |
76 | /* TODO: How do we do it on SMP system???? */ |
- | |
77 | bootinfo_t bootinfo __attribute__ ((section (".text"))); |
77 | uintptr_t supervisor_sp __attribute__ ((section (".text"))); |
78 | 78 | ||
79 | void arch_pre_main(void) |
79 | count_t cpu_count = 0; |
- | 80 | ||
- | 81 | /** Performs mips32-specific initialization before main_bsp() is called. */ |
|
- | 82 | void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo) |
|
80 | { |
83 | { |
81 | /* Setup usermode */ |
84 | /* Setup usermode */ |
82 | init.cnt = bootinfo.cnt; |
85 | init.cnt = bootinfo->cnt; |
83 | 86 | ||
84 | uint32_t i; |
87 | count_t i; |
- | 88 | for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) { |
|
- | 89 | init.tasks[i].addr = bootinfo->tasks[i].addr; |
|
- | 90 | init.tasks[i].size = bootinfo->tasks[i].size; |
|
- | 91 | str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN, |
|
- | 92 | bootinfo->tasks[i].name); |
|
- | 93 | } |
|
85 | 94 | ||
86 | for (i = 0; i < bootinfo.cnt; i++) { |
95 | for (i = 0; i < CPUMAP_MAX_RECORDS; i++) { |
87 | init.tasks[i].addr = bootinfo.tasks[i].addr; |
96 | if ((bootinfo->cpumap & (1 << i)) != 0) |
88 | init.tasks[i].size = bootinfo.tasks[i].size; |
97 | cpu_count++; |
89 | } |
98 | } |
90 | } |
99 | } |
91 | 100 | ||
92 | void arch_pre_mm_init(void) |
101 | void arch_pre_mm_init(void) |
93 | { |
102 | { |
94 | /* It is not assumed by default */ |
103 | /* It is not assumed by default */ |
95 | interrupts_disable(); |
104 | interrupts_disable(); |
96 | 105 | ||
97 | /* Initialize dispatch table */ |
106 | /* Initialize dispatch table */ |
98 | exception_init(); |
107 | exception_init(); |
99 | 108 | ||
100 | /* Copy the exception vectors to the right places */ |
109 | /* Copy the exception vectors to the right places */ |
101 | memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
110 | memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
102 | smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE); |
111 | smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE); |
103 | memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE); |
112 | memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE); |
104 | smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE); |
113 | smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE); |
105 | memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE); |
114 | memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE); |
106 | smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE); |
115 | smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE); |
107 | 116 | ||
108 | /* |
117 | /* |
109 | * Switch to BEV normal level so that exception vectors point to the |
118 | * Switch to BEV normal level so that exception vectors point to the |
110 | * kernel. Clear the error level. |
119 | * kernel. Clear the error level. |
111 | */ |
120 | */ |
112 | cp0_status_write(cp0_status_read() & |
121 | cp0_status_write(cp0_status_read() & |
113 | ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit)); |
122 | ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit)); |
114 | 123 | ||
115 | /* |
124 | /* |
116 | * Mask all interrupts |
125 | * Mask all interrupts |
117 | */ |
126 | */ |
118 | cp0_mask_all_int(); |
127 | cp0_mask_all_int(); |
119 | 128 | ||
120 | debugger_init(); |
129 | debugger_init(); |
121 | } |
130 | } |
122 | 131 | ||
123 | void arch_post_mm_init(void) |
132 | void arch_post_mm_init(void) |
124 | { |
133 | { |
125 | interrupt_init(); |
134 | interrupt_init(); |
126 | console_init(device_assign_devno()); |
- | |
- | 135 | ||
127 | #ifdef CONFIG_FB |
136 | #ifdef CONFIG_FB |
128 | /* GXemul framebuffer */ |
137 | /* GXemul framebuffer */ |
129 | fb_properties_t gxemul_prop = { |
138 | fb_properties_t gxemul_prop = { |
130 | .addr = 0x12000000, |
139 | .addr = 0x12000000, |
131 | .offset = 0, |
140 | .offset = 0, |
132 | .x = 640, |
141 | .x = 640, |
133 | .y = 480, |
142 | .y = 480, |
134 | .scan = 1920, |
143 | .scan = 1920, |
135 | .visual = VISUAL_RGB_8_8_8, |
144 | .visual = VISUAL_BGR_8_8_8, |
136 | }; |
145 | }; |
137 | fb_init(&gxemul_prop); |
146 | fb_init(&gxemul_prop); |
138 | #endif |
147 | #else |
- | 148 | #ifdef CONFIG_MIPS_PRN |
|
139 | sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1); |
149 | dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS); |
- | 150 | #endif /* CONFIG_MIPS_PRN */ |
|
- | 151 | #endif /* CONFIG_FB */ |
|
140 | } |
152 | } |
141 | 153 | ||
142 | void arch_post_cpu_init(void) |
154 | void arch_post_cpu_init(void) |
143 | { |
155 | { |
144 | } |
156 | } |
145 | 157 | ||
146 | void arch_pre_smp_init(void) |
158 | void arch_pre_smp_init(void) |
147 | { |
159 | { |
148 | } |
160 | } |
149 | 161 | ||
150 | void arch_post_smp_init(void) |
162 | void arch_post_smp_init(void) |
151 | { |
163 | { |
- | 164 | #ifdef CONFIG_MIPS_KBD |
|
- | 165 | /* |
|
- | 166 | * Initialize the msim/GXemul keyboard port. Then initialize the serial line |
|
- | 167 | * module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts. |
|
- | 168 | */ |
|
- | 169 | dsrlnin_instance_t *dsrlnin_instance |
|
- | 170 | = dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ); |
|
- | 171 | if (dsrlnin_instance) { |
|
- | 172 | srln_instance_t *srln_instance = srln_init(); |
|
- | 173 | if (srln_instance) { |
|
- | 174 | indev_t *sink = stdin_wire(); |
|
- | 175 | indev_t *srln = srln_wire(srln_instance, sink); |
|
- | 176 | dsrlnin_wire(dsrlnin_instance, srln); |
|
- | 177 | cp0_unmask_int(MSIM_KBD_IRQ); |
|
- | 178 | } |
|
- | 179 | } |
|
- | 180 | ||
- | 181 | /* |
|
- | 182 | * This is the necessary evil until the userspace driver is entirely |
|
- | 183 | * self-sufficient. |
|
- | 184 | */ |
|
- | 185 | sysinfo_set_item_val("kbd", NULL, true); |
|
- | 186 | sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); |
|
- | 187 | sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS); |
|
- | 188 | #endif |
|
- | 189 | } |
|
- | 190 | ||
- | 191 | void calibrate_delay_loop(void) |
|
- | 192 | { |
|
152 | } |
193 | } |
153 | 194 | ||
154 | void userspace(uspace_arg_t *kernel_uarg) |
195 | void userspace(uspace_arg_t *kernel_uarg) |
155 | { |
196 | { |
156 | /* EXL = 1, UM = 1, IE = 1 */ |
197 | /* EXL = 1, UM = 1, IE = 1 */ |
157 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
198 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
158 | cp0_status_um_bit | cp0_status_ie_enabled_bit)); |
199 | cp0_status_um_bit | cp0_status_ie_enabled_bit)); |
159 | cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry); |
200 | cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry); |
160 | userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE), |
201 | userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE), |
161 | (uintptr_t) kernel_uarg->uspace_uarg, |
202 | (uintptr_t) kernel_uarg->uspace_uarg, |
162 | (uintptr_t) kernel_uarg->uspace_entry); |
203 | (uintptr_t) kernel_uarg->uspace_entry); |
163 | 204 | ||
164 | while (1) |
205 | while (1); |
165 | ; |
- | |
166 | } |
206 | } |
167 | 207 | ||
168 | /** Perform mips32 specific tasks needed before the new task is run. */ |
208 | /** Perform mips32 specific tasks needed before the new task is run. */ |
169 | void before_task_runs_arch(void) |
209 | void before_task_runs_arch(void) |
170 | { |
210 | { |
171 | } |
211 | } |
172 | 212 | ||
173 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
213 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
174 | void before_thread_runs_arch(void) |
214 | void before_thread_runs_arch(void) |
175 | { |
215 | { |
176 | supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE - |
216 | supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE - |
177 | SP_DELTA]; |
217 | SP_DELTA]; |
178 | } |
218 | } |
179 | 219 | ||
180 | void after_thread_ran_arch(void) |
220 | void after_thread_ran_arch(void) |
181 | { |
221 | { |
182 | } |
222 | } |
183 | 223 | ||
184 | /** Set thread-local-storage pointer |
224 | /** Set thread-local-storage pointer |
185 | * |
225 | * |
186 | * We have it currently in K1, it is |
226 | * We have it currently in K1, it is |
187 | * possible to have it separately in the future. |
227 | * possible to have it separately in the future. |
188 | */ |
228 | */ |
189 | unative_t sys_tls_set(unative_t addr) |
229 | unative_t sys_tls_set(unative_t addr) |
190 | { |
230 | { |
191 | return 0; |
231 | return 0; |
192 | } |
232 | } |
193 | 233 | ||
194 | void arch_reboot(void) |
234 | void arch_reboot(void) |
195 | { |
235 | { |
196 | ___halt(); |
236 | ___halt(); |
- | 237 | while (1); |
|
197 | 238 | } |
|
- | 239 | ||
- | 240 | /** Construct function pointer |
|
- | 241 | * |
|
- | 242 | * @param fptr function pointer structure |
|
- | 243 | * @param addr function address |
|
- | 244 | * @param caller calling function address |
|
- | 245 | * |
|
- | 246 | * @return address of the function pointer |
|
- | 247 | * |
|
- | 248 | */ |
|
- | 249 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
|
- | 250 | { |
|
- | 251 | return addr; |
|
- | 252 | } |
|
- | 253 | ||
- | 254 | void arch_grab_console(void) |
|
- | 255 | { |
|
- | 256 | #ifdef CONFIG_FB |
|
198 | while (1) |
257 | fb_redraw(); |
- | 258 | #endif |
|
- | 259 | } |
|
- | 260 | ||
- | 261 | /** Return console to userspace |
|
- | 262 | * |
|
199 | ; |
263 | */ |
- | 264 | void arch_release_console(void) |
|
- | 265 | { |
|
200 | } |
266 | } |
201 | 267 | ||
202 | /** @} |
268 | /** @} |
203 | */ |
269 | */ |
204 | 270 |