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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Ondrej Palkovsky |
2 | * Copyright (c) 2005 Ondrej Palkovsky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup mips32 |
29 | /** @addtogroup mips32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <interrupt.h> |
35 | #include <interrupt.h> |
36 | #include <arch/cp0.h> |
36 | #include <arch/cp0.h> |
37 | #include <ipc/irq.h> |
37 | #include <ipc/irq.h> |
38 | #include <arch/drivers/serial.h> |
38 | #include <arch/drivers/serial.h> |
39 | #include <console/chardev.h> |
39 | #include <console/chardev.h> |
40 | #include <console/console.h> |
40 | #include <console/console.h> |
41 | 41 | ||
42 | #define SERIAL_IRQ 2 |
42 | #define SERIAL_IRQ 2 |
43 | 43 | ||
44 | static irq_t serial_irq; |
44 | static irq_t serial_irq; |
45 | static chardev_t console; |
45 | static chardev_t console; |
46 | static serial_t sconf[SERIAL_MAX]; |
46 | static serial_t sconf[SERIAL_MAX]; |
47 | static bool kb_enabled; |
47 | static bool kb_enabled; |
48 | 48 | ||
49 | static void serial_write(chardev_t *d, const char ch) |
49 | static void serial_write(chardev_t *d, const char ch) |
50 | { |
50 | { |
51 | serial_t *sd = (serial_t *)d->data; |
51 | serial_t *sd = (serial_t *)d->data; |
52 | 52 | ||
53 | if (ch == '\n') |
53 | if (ch == '\n') |
54 | serial_write(d, '\r'); |
54 | serial_write(d, '\r'); |
55 | /* Wait until transmit buffer empty */ |
55 | /* Wait until transmit buffer empty */ |
56 | while (! (SERIAL_READ_LSR(sd->port) & (1<<TRANSMIT_EMPTY_BIT))) |
56 | while (! (SERIAL_READ_LSR(sd->port) & (1<<TRANSMIT_EMPTY_BIT))) |
57 | ; |
57 | ; |
58 | SERIAL_WRITE(sd->port, ch); |
58 | SERIAL_WRITE(sd->port, ch); |
59 | } |
59 | } |
60 | 60 | ||
61 | static void serial_enable(chardev_t *d) |
61 | static void serial_enable(chardev_t *d) |
62 | { |
62 | { |
63 | kb_enabled = true; |
63 | kb_enabled = true; |
64 | } |
64 | } |
65 | 65 | ||
66 | static void serial_disable(chardev_t *d) |
66 | static void serial_disable(chardev_t *d) |
67 | { |
67 | { |
68 | kb_enabled = false; |
68 | kb_enabled = false; |
69 | } |
69 | } |
70 | 70 | ||
71 | int serial_init(void) |
71 | int serial_init(void) |
72 | { |
72 | { |
73 | int i = 0; |
73 | int i = 0; |
74 | if (SERIAL_READ_LSR(SERIAL_COM1) == 0x60) { |
74 | if (SERIAL_READ_LSR(SERIAL_COM1) == 0x60) { |
75 | sconf[i].port = SERIAL_COM1; |
75 | sconf[i].port = SERIAL_COM1; |
76 | sconf[i].irq = SERIAL_COM1_IRQ; |
76 | sconf[i].irq = SERIAL_COM1_IRQ; |
77 | /* Enable interrupt on available data */ |
77 | /* Enable interrupt on available data */ |
78 | i++; |
78 | i++; |
79 | } |
79 | } |
80 | return i; |
80 | return i; |
81 | } |
81 | } |
82 | 82 | ||
83 | /** Read character from serial port, wait until available */ |
83 | /** Read character from serial port, wait until available */ |
84 | static char serial_do_read(chardev_t *dev) |
84 | static char serial_do_read(chardev_t *dev) |
85 | { |
85 | { |
86 | serial_t *sd = (serial_t *)dev->data; |
86 | serial_t *sd = (serial_t *)dev->data; |
87 | char ch; |
87 | char ch; |
88 | 88 | ||
89 | while (!(SERIAL_READ_LSR(sd->port) & 1)) |
89 | while (!(SERIAL_READ_LSR(sd->port) & 1)) |
90 | ; |
90 | ; |
91 | ch = SERIAL_READ(sd->port); |
91 | ch = SERIAL_READ(sd->port); |
92 | 92 | ||
93 | if (ch =='\r') |
93 | if (ch =='\r') |
94 | ch = '\n'; |
94 | ch = '\n'; |
95 | return ch; |
95 | return ch; |
96 | } |
96 | } |
97 | 97 | ||
98 | static void serial_handler(void) |
98 | static void serial_handler(void) |
99 | { |
99 | { |
100 | serial_t *sd = (serial_t *) console.data; |
100 | serial_t *sd = (serial_t *) console.data; |
101 | char ch; |
101 | char ch; |
102 | 102 | ||
103 | if (!(SERIAL_READ_LSR(sd->port) & 1)) |
103 | if (!(SERIAL_READ_LSR(sd->port) & 1)) |
104 | return; |
104 | return; |
105 | ch = SERIAL_READ(sd->port); |
105 | ch = SERIAL_READ(sd->port); |
106 | 106 | ||
107 | if (ch =='\r') |
107 | if (ch =='\r') |
108 | ch = '\n'; |
108 | ch = '\n'; |
109 | chardev_push_character(&console, ch); |
109 | chardev_push_character(&console, ch); |
110 | } |
110 | } |
111 | 111 | ||
112 | /** Process keyboard interrupt. Does not work in simics? */ |
112 | /** Process keyboard interrupt. Does not work in simics? */ |
113 | static void serial_irq_handler(irq_t *irq, void *arg, ...) |
113 | static void serial_irq_handler(irq_t *irq, void *arg, ...) |
114 | { |
114 | { |
115 | if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) |
115 | if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) |
116 | ipc_irq_send_notif(irq); |
116 | ipc_irq_send_notif(irq); |
117 | else |
117 | else |
118 | serial_handler(); |
118 | serial_handler(); |
119 | } |
119 | } |
120 | 120 | ||
121 | static irq_ownership_t serial_claim(void) |
121 | static irq_ownership_t serial_claim(void) |
122 | { |
122 | { |
123 | return IRQ_ACCEPT; |
123 | return IRQ_ACCEPT; |
124 | } |
124 | } |
125 | 125 | ||
126 | static chardev_operations_t serial_ops = { |
126 | static chardev_operations_t serial_ops = { |
127 | .resume = serial_enable, |
127 | .resume = serial_enable, |
128 | .suspend = serial_disable, |
128 | .suspend = serial_disable, |
129 | .write = serial_write, |
129 | .write = serial_write, |
130 | .read = serial_do_read |
130 | .read = serial_do_read |
131 | }; |
131 | }; |
132 | 132 | ||
133 | void serial_console(devno_t devno) |
133 | void serial_console(devno_t devno) |
134 | { |
134 | { |
135 | serial_t *sd = &sconf[0]; |
135 | serial_t *sd = &sconf[0]; |
136 | 136 | ||
137 | 137 | ||
138 | chardev_initialize("serial_console", &console, &serial_ops); |
138 | chardev_initialize("serial_console", &console, &serial_ops); |
139 | console.data = sd; |
139 | console.data = sd; |
140 | kb_enabled = true; |
140 | kb_enabled = true; |
141 | 141 | ||
142 | irq_initialize(&serial_irq); |
142 | irq_initialize(&serial_irq); |
143 | serial_irq.devno = devno; |
143 | serial_irq.devno = devno; |
144 | serial_irq.inr = SERIAL_IRQ; |
144 | serial_irq.inr = SERIAL_IRQ; |
145 | serial_irq.claim = serial_claim; |
145 | serial_irq.claim = serial_claim; |
146 | serial_irq.handler = serial_irq_handler; |
146 | serial_irq.handler = serial_irq_handler; |
147 | irq_register(&serial_irq); |
147 | irq_register(&serial_irq); |
148 | 148 | ||
149 | /* I don't know why, but the serial interrupts simply |
149 | /* I don't know why, but the serial interrupts simply |
150 | * don't work on simics |
150 | * don't work on simics |
151 | */ |
151 | */ |
152 | virtual_timer_fnc = &serial_handler; |
152 | virtual_timer_fnc = &serial_handler; |
153 | 153 | ||
154 | stdin = &console; |
154 | stdin = &console; |
155 | stdout = &console; |
155 | stdout = &console; |
156 | } |
156 | } |
157 | 157 | ||
158 | /** @} |
158 | /** @} |
159 | */ |
159 | */ |
160 | 160 |