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1 | # |
1 | # |
2 | # Copyright (C) 2005 Jakub Vana |
2 | # Copyright (C) 2005 Jakub Vana |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | 29 | ||
- | 30 | /* |
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- | 31 | * This macro roughly follows steps from 1 to 19 described in |
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- | 32 | * Intel Itanium Architecture Software Developer's Manual, Chapter 3.4.2. |
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- | 33 | * |
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- | 34 | * Some steps are skipped (enabling and disabling interrupts). |
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- | 35 | * Some steps are not fully supported yet (e.g. interruptions |
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- | 36 | * from user space and floating-point context). |
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- | 37 | */ |
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- | 38 | .macro HEAVYWEIGHT_HANDLER offs handler |
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- | 39 | .org IVT + \offs |
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- | 40 | SAVE_INTERRUPTED_CONTEXT /* steps 1 - 9 */ |
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- | 41 | br.call.sptk.many rp = \handler /* steps 10 - 11 */ |
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- | 42 | br restore_interrupted_context /* steps 12 - 19 */ |
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- | 43 | .endm |
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- | 44 | ||
- | 45 | .macro SAVE_INTERRUPTED_CONTEXT |
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- | 46 | /* 1. copy interrupt registers into bank 0 */ |
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- | 47 | mov r24 = cr.iip |
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- | 48 | mov r25 = cr.ipsr |
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- | 49 | mov r26 = cr.iipa |
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- | 50 | mov r27 = cr.isr |
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- | 51 | mov r28 = cr.ifa |
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- | 52 | ||
- | 53 | /* 2. preserve predicate register into bank 0 */ |
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- | 54 | mov r29 = pr ;; |
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- | 55 | ||
- | 56 | /* 3. switch to kernel memory stack */ |
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- | 57 | /* TODO: support interruptions from userspace */ |
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- | 58 | /* assume kernel stack */ |
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- | 59 | ||
- | 60 | /* 4. allocate memory stack for registers saved in bank 0 */ |
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- | 61 | st8 [r12] = r29, -8 ;; /* save predicate registers */ |
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- | 62 | st8 [r12] = r28, -8 ;; /* save cr.ifa */ |
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- | 63 | st8 [r12] = r27, -8 ;; /* save cr.isr */ |
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- | 64 | st8 [r12] = r26, -8 ;; /* save cr.iipa */ |
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- | 65 | st8 [r12] = r25, -8 ;; /* save cr.ipsr */ |
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- | 66 | st8 [r12] = r24, -8 ;; /* save cr.iip */ |
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- | 67 | ||
- | 68 | /* 5. RSE switch */ |
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- | 69 | .auto |
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- | 70 | mov r24 = ar.rsc |
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- | 71 | mov r25 = ar.pfs |
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- | 72 | cover |
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- | 73 | mov r26 = cr.ifs |
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- | 74 | ||
- | 75 | st8 [r12] = r24, -8 /* save ar.rsc */ |
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- | 76 | st8 [r12] = r25, -8 /* save ar.pfs */ |
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- | 77 | st8 [r12] = r26, -8 /* save ar.ifs */ |
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- | 78 | ||
- | 79 | and r30 = ~3, r24 |
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- | 80 | mov ar.rsc = r30 /* place RSE in enforced lazy mode */ |
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- | 81 | ||
- | 82 | mov r27 = ar.rnat |
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- | 83 | mov r28 = ar.bspstore |
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- | 84 | ||
- | 85 | /* assume kernel backing store */ |
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- | 86 | mov ar.bspstore = r28 |
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- | 87 | ||
- | 88 | mov r29 = ar.bsp |
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- | 89 | ||
- | 90 | st8 [r12] = r27, -8 /* save ar.rnat */ |
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- | 91 | st8 [r12] = r28, -8 /* save ar.bspstore */ |
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- | 92 | st8 [r12] = r29, -8 /* save ar.bsp */ |
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- | 93 | ||
- | 94 | mov ar.rsc = r24 /* restore RSE's setting */ |
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- | 95 | .explicit |
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- | 96 | ||
- | 97 | /* 6. switch to bank 1 and reenable PSR.ic */ |
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- | 98 | ssm 0x2000 |
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- | 99 | bsw.1 ;; |
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- | 100 | srlz.d |
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- | 101 | ||
- | 102 | /* 7. preserve branch and application registers */ |
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- | 103 | ||
- | 104 | /* 8. preserve general and floating-point registers */ |
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- | 105 | /* TODO: save floating-point context */ |
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- | 106 | ||
- | 107 | /* 9. skipped (will not enable interrupts) */ |
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- | 108 | .endm |
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- | 109 | ||
- | 110 | .macro RESTORE_INTERRUPTED_CONTEXT |
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- | 111 | /* 12. skipped (will not disable interrupts) */ |
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- | 112 | ||
- | 113 | /* 13. restore general and floating-point registers */ |
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- | 114 | /* TODO: restore floating-point context */ |
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- | 115 | ||
- | 116 | /* 14. restore branch and application registers */ |
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- | 117 | ||
- | 118 | /* 15. disable PSR.ic and switch to bank 0 */ |
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- | 119 | rsm 0x2000 |
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- | 120 | bsw.0 ;; |
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- | 121 | srlz.d |
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- | 122 | ||
- | 123 | /* 16. RSE switch */ |
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- | 124 | ||
- | 125 | /* 17. restore interruption state from memory stack */ |
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- | 126 | ||
- | 127 | /* 18. restore predicate registers from memory stack */ |
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- | 128 | ||
- | 129 | /* 19. return from interruption */ |
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- | 130 | rfi |
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- | 131 | .endm |
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30 | 132 | ||
- | 133 | .global restore_interrupted_context |
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- | 134 | restore_interrupted_context: |
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- | 135 | RESTORE_INTERRUPTED_CONTEXT |
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- | 136 | /* not reached */ |
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31 | 137 | ||
32 | dump_gregs: |
138 | dump_gregs: |
33 | mov r16 = REG_DUMP;; |
139 | mov r16 = REG_DUMP;; |
34 | st8 [r16] = r0;; |
140 | st8 [r16] = r0;; |
35 | add r16 = 8,r16 ;; |
141 | add r16 = 8,r16 ;; |
36 | st8 [r16] = r1;; |
142 | st8 [r16] = r1;; |
37 | add r16 = 8,r16 ;; |
143 | add r16 = 8,r16 ;; |
38 | st8 [r16] = r2;; |
144 | st8 [r16] = r2;; |
39 | add r16 = 8,r16 ;; |
145 | add r16 = 8,r16 ;; |
40 | st8 [r16] = r3;; |
146 | st8 [r16] = r3;; |
41 | add r16 = 8,r16 ;; |
147 | add r16 = 8,r16 ;; |
42 | st8 [r16] = r4;; |
148 | st8 [r16] = r4;; |
43 | add r16 = 8,r16 ;; |
149 | add r16 = 8,r16 ;; |
44 | st8 [r16] = r5;; |
150 | st8 [r16] = r5;; |
45 | add r16 = 8,r16 ;; |
151 | add r16 = 8,r16 ;; |
46 | st8 [r16] = r6;; |
152 | st8 [r16] = r6;; |
47 | add r16 = 8,r16 ;; |
153 | add r16 = 8,r16 ;; |
48 | st8 [r16] = r7;; |
154 | st8 [r16] = r7;; |
49 | add r16 = 8,r16 ;; |
155 | add r16 = 8,r16 ;; |
50 | st8 [r16] = r8;; |
156 | st8 [r16] = r8;; |
51 | add r16 = 8,r16 ;; |
157 | add r16 = 8,r16 ;; |
52 | st8 [r16] = r9;; |
158 | st8 [r16] = r9;; |
53 | add r16 = 8,r16 ;; |
159 | add r16 = 8,r16 ;; |
54 | st8 [r16] = r10;; |
160 | st8 [r16] = r10;; |
55 | add r16 = 8,r16 ;; |
161 | add r16 = 8,r16 ;; |
56 | st8 [r16] = r11;; |
162 | st8 [r16] = r11;; |
57 | add r16 = 8,r16 ;; |
163 | add r16 = 8,r16 ;; |
58 | st8 [r16] = r12;; |
164 | st8 [r16] = r12;; |
59 | add r16 = 8,r16 ;; |
165 | add r16 = 8,r16 ;; |
60 | st8 [r16] = r13;; |
166 | st8 [r16] = r13;; |
61 | add r16 = 8,r16 ;; |
167 | add r16 = 8,r16 ;; |
62 | st8 [r16] = r14;; |
168 | st8 [r16] = r14;; |
63 | add r16 = 8,r16 ;; |
169 | add r16 = 8,r16 ;; |
64 | st8 [r16] = r15;; |
170 | st8 [r16] = r15;; |
65 | add r16 = 8,r16 ;; |
171 | add r16 = 8,r16 ;; |
66 | 172 | ||
67 | bsw.1;; |
173 | bsw.1;; |
68 | mov r15 = r16;; |
174 | mov r15 = r16;; |
69 | bsw.0;; |
175 | bsw.0;; |
70 | st8 [r16] = r15;; |
176 | st8 [r16] = r15;; |
71 | add r16 = 8,r16 ;; |
177 | add r16 = 8,r16 ;; |
72 | bsw.1;; |
178 | bsw.1;; |
73 | mov r15 = r17;; |
179 | mov r15 = r17;; |
74 | bsw.0;; |
180 | bsw.0;; |
75 | st8 [r16] = r15;; |
181 | st8 [r16] = r15;; |
76 | add r16 = 8,r16 ;; |
182 | add r16 = 8,r16 ;; |
77 | bsw.1;; |
183 | bsw.1;; |
78 | mov r15 = r18;; |
184 | mov r15 = r18;; |
79 | bsw.0;; |
185 | bsw.0;; |
80 | st8 [r16] = r15;; |
186 | st8 [r16] = r15;; |
81 | add r16 = 8,r16 ;; |
187 | add r16 = 8,r16 ;; |
82 | bsw.1;; |
188 | bsw.1;; |
83 | mov r15 = r19;; |
189 | mov r15 = r19;; |
84 | bsw.0;; |
190 | bsw.0;; |
85 | st8 [r16] = r15;; |
191 | st8 [r16] = r15;; |
86 | add r16 = 8,r16 ;; |
192 | add r16 = 8,r16 ;; |
87 | bsw.1;; |
193 | bsw.1;; |
88 | mov r15 = r20;; |
194 | mov r15 = r20;; |
89 | bsw.0;; |
195 | bsw.0;; |
90 | st8 [r16] = r15;; |
196 | st8 [r16] = r15;; |
91 | add r16 = 8,r16 ;; |
197 | add r16 = 8,r16 ;; |
92 | bsw.1;; |
198 | bsw.1;; |
93 | mov r15 = r21;; |
199 | mov r15 = r21;; |
94 | bsw.0;; |
200 | bsw.0;; |
95 | st8 [r16] = r15;; |
201 | st8 [r16] = r15;; |
96 | add r16 = 8,r16 ;; |
202 | add r16 = 8,r16 ;; |
97 | bsw.1;; |
203 | bsw.1;; |
98 | mov r15 = r22;; |
204 | mov r15 = r22;; |
99 | bsw.0;; |
205 | bsw.0;; |
100 | st8 [r16] = r15;; |
206 | st8 [r16] = r15;; |
101 | add r16 = 8,r16 ;; |
207 | add r16 = 8,r16 ;; |
102 | bsw.1;; |
208 | bsw.1;; |
103 | mov r15 = r23;; |
209 | mov r15 = r23;; |
104 | bsw.0;; |
210 | bsw.0;; |
105 | st8 [r16] = r15;; |
211 | st8 [r16] = r15;; |
106 | add r16 = 8,r16 ;; |
212 | add r16 = 8,r16 ;; |
107 | bsw.1;; |
213 | bsw.1;; |
108 | mov r15 = r24;; |
214 | mov r15 = r24;; |
109 | bsw.0;; |
215 | bsw.0;; |
110 | st8 [r16] = r15;; |
216 | st8 [r16] = r15;; |
111 | add r16 = 8,r16 ;; |
217 | add r16 = 8,r16 ;; |
112 | bsw.1;; |
218 | bsw.1;; |
113 | mov r15 = r25;; |
219 | mov r15 = r25;; |
114 | bsw.0;; |
220 | bsw.0;; |
115 | st8 [r16] = r15;; |
221 | st8 [r16] = r15;; |
116 | add r16 = 8,r16 ;; |
222 | add r16 = 8,r16 ;; |
117 | bsw.1;; |
223 | bsw.1;; |
118 | mov r15 = r26;; |
224 | mov r15 = r26;; |
119 | bsw.0;; |
225 | bsw.0;; |
120 | st8 [r16] = r15;; |
226 | st8 [r16] = r15;; |
121 | add r16 = 8,r16 ;; |
227 | add r16 = 8,r16 ;; |
122 | bsw.1;; |
228 | bsw.1;; |
123 | mov r15 = r27;; |
229 | mov r15 = r27;; |
124 | bsw.0;; |
230 | bsw.0;; |
125 | st8 [r16] = r15;; |
231 | st8 [r16] = r15;; |
126 | add r16 = 8,r16 ;; |
232 | add r16 = 8,r16 ;; |
127 | bsw.1;; |
233 | bsw.1;; |
128 | mov r15 = r28;; |
234 | mov r15 = r28;; |
129 | bsw.0;; |
235 | bsw.0;; |
130 | st8 [r16] = r15;; |
236 | st8 [r16] = r15;; |
131 | add r16 = 8,r16 ;; |
237 | add r16 = 8,r16 ;; |
132 | bsw.1;; |
238 | bsw.1;; |
133 | mov r15 = r29;; |
239 | mov r15 = r29;; |
134 | bsw.0;; |
240 | bsw.0;; |
135 | st8 [r16] = r15;; |
241 | st8 [r16] = r15;; |
136 | add r16 = 8,r16 ;; |
242 | add r16 = 8,r16 ;; |
137 | bsw.1;; |
243 | bsw.1;; |
138 | mov r15 = r30;; |
244 | mov r15 = r30;; |
139 | bsw.0;; |
245 | bsw.0;; |
140 | st8 [r16] = r15;; |
246 | st8 [r16] = r15;; |
141 | add r16 = 8,r16 ;; |
247 | add r16 = 8,r16 ;; |
142 | bsw.1;; |
248 | bsw.1;; |
143 | mov r15 = r31;; |
249 | mov r15 = r31;; |
144 | bsw.0;; |
250 | bsw.0;; |
145 | st8 [r16] = r15;; |
251 | st8 [r16] = r15;; |
146 | add r16 = 8,r16 ;; |
252 | add r16 = 8,r16 ;; |
147 | 253 | ||
148 | 254 | ||
149 | st8 [r16] = r32;; |
255 | st8 [r16] = r32;; |
150 | add r16 = 8,r16 ;; |
256 | add r16 = 8,r16 ;; |
151 | st8 [r16] = r33;; |
257 | st8 [r16] = r33;; |
152 | add r16 = 8,r16 ;; |
258 | add r16 = 8,r16 ;; |
153 | st8 [r16] = r34;; |
259 | st8 [r16] = r34;; |
154 | add r16 = 8,r16 ;; |
260 | add r16 = 8,r16 ;; |
155 | st8 [r16] = r35;; |
261 | st8 [r16] = r35;; |
156 | add r16 = 8,r16 ;; |
262 | add r16 = 8,r16 ;; |
157 | st8 [r16] = r36;; |
263 | st8 [r16] = r36;; |
158 | add r16 = 8,r16 ;; |
264 | add r16 = 8,r16 ;; |
159 | st8 [r16] = r37;; |
265 | st8 [r16] = r37;; |
160 | add r16 = 8,r16 ;; |
266 | add r16 = 8,r16 ;; |
161 | st8 [r16] = r38;; |
267 | st8 [r16] = r38;; |
162 | add r16 = 8,r16 ;; |
268 | add r16 = 8,r16 ;; |
163 | st8 [r16] = r39;; |
269 | st8 [r16] = r39;; |
164 | add r16 = 8,r16 ;; |
270 | add r16 = 8,r16 ;; |
165 | st8 [r16] = r40;; |
271 | st8 [r16] = r40;; |
166 | add r16 = 8,r16 ;; |
272 | add r16 = 8,r16 ;; |
167 | st8 [r16] = r41;; |
273 | st8 [r16] = r41;; |
168 | add r16 = 8,r16 ;; |
274 | add r16 = 8,r16 ;; |
169 | st8 [r16] = r42;; |
275 | st8 [r16] = r42;; |
170 | add r16 = 8,r16 ;; |
276 | add r16 = 8,r16 ;; |
171 | st8 [r16] = r43;; |
277 | st8 [r16] = r43;; |
172 | add r16 = 8,r16 ;; |
278 | add r16 = 8,r16 ;; |
173 | st8 [r16] = r44;; |
279 | st8 [r16] = r44;; |
174 | add r16 = 8,r16 ;; |
280 | add r16 = 8,r16 ;; |
175 | st8 [r16] = r45;; |
281 | st8 [r16] = r45;; |
176 | add r16 = 8,r16 ;; |
282 | add r16 = 8,r16 ;; |
177 | st8 [r16] = r46;; |
283 | st8 [r16] = r46;; |
178 | add r16 = 8,r16 ;; |
284 | add r16 = 8,r16 ;; |
179 | st8 [r16] = r47;; |
285 | st8 [r16] = r47;; |
180 | add r16 = 8,r16 ;; |
286 | add r16 = 8,r16 ;; |
181 | st8 [r16] = r48;; |
287 | st8 [r16] = r48;; |
182 | add r16 = 8,r16 ;; |
288 | add r16 = 8,r16 ;; |
183 | st8 [r16] = r49;; |
289 | st8 [r16] = r49;; |
184 | add r16 = 8,r16 ;; |
290 | add r16 = 8,r16 ;; |
185 | st8 [r16] = r50;; |
291 | st8 [r16] = r50;; |
186 | add r16 = 8,r16 ;; |
292 | add r16 = 8,r16 ;; |
187 | st8 [r16] = r51;; |
293 | st8 [r16] = r51;; |
188 | add r16 = 8,r16 ;; |
294 | add r16 = 8,r16 ;; |
189 | st8 [r16] = r52;; |
295 | st8 [r16] = r52;; |
190 | add r16 = 8,r16 ;; |
296 | add r16 = 8,r16 ;; |
191 | st8 [r16] = r53;; |
297 | st8 [r16] = r53;; |
192 | add r16 = 8,r16 ;; |
298 | add r16 = 8,r16 ;; |
193 | st8 [r16] = r54;; |
299 | st8 [r16] = r54;; |
194 | add r16 = 8,r16 ;; |
300 | add r16 = 8,r16 ;; |
195 | st8 [r16] = r55;; |
301 | st8 [r16] = r55;; |
196 | add r16 = 8,r16 ;; |
302 | add r16 = 8,r16 ;; |
197 | st8 [r16] = r56;; |
303 | st8 [r16] = r56;; |
198 | add r16 = 8,r16 ;; |
304 | add r16 = 8,r16 ;; |
199 | st8 [r16] = r57;; |
305 | st8 [r16] = r57;; |
200 | add r16 = 8,r16 ;; |
306 | add r16 = 8,r16 ;; |
201 | st8 [r16] = r58;; |
307 | st8 [r16] = r58;; |
202 | add r16 = 8,r16 ;; |
308 | add r16 = 8,r16 ;; |
203 | st8 [r16] = r59;; |
309 | st8 [r16] = r59;; |
204 | add r16 = 8,r16 ;; |
310 | add r16 = 8,r16 ;; |
205 | st8 [r16] = r60;; |
311 | st8 [r16] = r60;; |
206 | add r16 = 8,r16 ;; |
312 | add r16 = 8,r16 ;; |
207 | st8 [r16] = r61;; |
313 | st8 [r16] = r61;; |
208 | add r16 = 8,r16 ;; |
314 | add r16 = 8,r16 ;; |
209 | st8 [r16] = r62;; |
315 | st8 [r16] = r62;; |
210 | add r16 = 8,r16 ;; |
316 | add r16 = 8,r16 ;; |
211 | st8 [r16] = r63;; |
317 | st8 [r16] = r63;; |
212 | add r16 = 8,r16 ;; |
318 | add r16 = 8,r16 ;; |
213 | 319 | ||
214 | 320 | ||
215 | 321 | ||
216 | st8 [r16] = r64;; |
322 | st8 [r16] = r64;; |
217 | add r16 = 8,r16 ;; |
323 | add r16 = 8,r16 ;; |
218 | st8 [r16] = r65;; |
324 | st8 [r16] = r65;; |
219 | add r16 = 8,r16 ;; |
325 | add r16 = 8,r16 ;; |
220 | st8 [r16] = r66;; |
326 | st8 [r16] = r66;; |
221 | add r16 = 8,r16 ;; |
327 | add r16 = 8,r16 ;; |
222 | st8 [r16] = r67;; |
328 | st8 [r16] = r67;; |
223 | add r16 = 8,r16 ;; |
329 | add r16 = 8,r16 ;; |
224 | st8 [r16] = r68;; |
330 | st8 [r16] = r68;; |
225 | add r16 = 8,r16 ;; |
331 | add r16 = 8,r16 ;; |
226 | st8 [r16] = r69;; |
332 | st8 [r16] = r69;; |
227 | add r16 = 8,r16 ;; |
333 | add r16 = 8,r16 ;; |
228 | st8 [r16] = r70;; |
334 | st8 [r16] = r70;; |
229 | add r16 = 8,r16 ;; |
335 | add r16 = 8,r16 ;; |
230 | st8 [r16] = r71;; |
336 | st8 [r16] = r71;; |
231 | add r16 = 8,r16 ;; |
337 | add r16 = 8,r16 ;; |
232 | st8 [r16] = r72;; |
338 | st8 [r16] = r72;; |
233 | add r16 = 8,r16 ;; |
339 | add r16 = 8,r16 ;; |
234 | st8 [r16] = r73;; |
340 | st8 [r16] = r73;; |
235 | add r16 = 8,r16 ;; |
341 | add r16 = 8,r16 ;; |
236 | st8 [r16] = r74;; |
342 | st8 [r16] = r74;; |
237 | add r16 = 8,r16 ;; |
343 | add r16 = 8,r16 ;; |
238 | st8 [r16] = r75;; |
344 | st8 [r16] = r75;; |
239 | add r16 = 8,r16 ;; |
345 | add r16 = 8,r16 ;; |
240 | st8 [r16] = r76;; |
346 | st8 [r16] = r76;; |
241 | add r16 = 8,r16 ;; |
347 | add r16 = 8,r16 ;; |
242 | st8 [r16] = r77;; |
348 | st8 [r16] = r77;; |
243 | add r16 = 8,r16 ;; |
349 | add r16 = 8,r16 ;; |
244 | st8 [r16] = r78;; |
350 | st8 [r16] = r78;; |
245 | add r16 = 8,r16 ;; |
351 | add r16 = 8,r16 ;; |
246 | st8 [r16] = r79;; |
352 | st8 [r16] = r79;; |
247 | add r16 = 8,r16 ;; |
353 | add r16 = 8,r16 ;; |
248 | st8 [r16] = r80;; |
354 | st8 [r16] = r80;; |
249 | add r16 = 8,r16 ;; |
355 | add r16 = 8,r16 ;; |
250 | st8 [r16] = r81;; |
356 | st8 [r16] = r81;; |
251 | add r16 = 8,r16 ;; |
357 | add r16 = 8,r16 ;; |
252 | st8 [r16] = r82;; |
358 | st8 [r16] = r82;; |
253 | add r16 = 8,r16 ;; |
359 | add r16 = 8,r16 ;; |
254 | st8 [r16] = r83;; |
360 | st8 [r16] = r83;; |
255 | add r16 = 8,r16 ;; |
361 | add r16 = 8,r16 ;; |
256 | st8 [r16] = r84;; |
362 | st8 [r16] = r84;; |
257 | add r16 = 8,r16 ;; |
363 | add r16 = 8,r16 ;; |
258 | st8 [r16] = r85;; |
364 | st8 [r16] = r85;; |
259 | add r16 = 8,r16 ;; |
365 | add r16 = 8,r16 ;; |
260 | st8 [r16] = r86;; |
366 | st8 [r16] = r86;; |
261 | add r16 = 8,r16 ;; |
367 | add r16 = 8,r16 ;; |
262 | st8 [r16] = r87;; |
368 | st8 [r16] = r87;; |
263 | add r16 = 8,r16 ;; |
369 | add r16 = 8,r16 ;; |
264 | st8 [r16] = r88;; |
370 | st8 [r16] = r88;; |
265 | add r16 = 8,r16 ;; |
371 | add r16 = 8,r16 ;; |
266 | st8 [r16] = r89;; |
372 | st8 [r16] = r89;; |
267 | add r16 = 8,r16 ;; |
373 | add r16 = 8,r16 ;; |
268 | st8 [r16] = r90;; |
374 | st8 [r16] = r90;; |
269 | add r16 = 8,r16 ;; |
375 | add r16 = 8,r16 ;; |
270 | st8 [r16] = r91;; |
376 | st8 [r16] = r91;; |
271 | add r16 = 8,r16 ;; |
377 | add r16 = 8,r16 ;; |
272 | st8 [r16] = r92;; |
378 | st8 [r16] = r92;; |
273 | add r16 = 8,r16 ;; |
379 | add r16 = 8,r16 ;; |
274 | st8 [r16] = r93;; |
380 | st8 [r16] = r93;; |
275 | add r16 = 8,r16 ;; |
381 | add r16 = 8,r16 ;; |
276 | st8 [r16] = r94;; |
382 | st8 [r16] = r94;; |
277 | add r16 = 8,r16 ;; |
383 | add r16 = 8,r16 ;; |
278 | st8 [r16] = r95;; |
384 | st8 [r16] = r95;; |
279 | add r16 = 8,r16 ;; |
385 | add r16 = 8,r16 ;; |
280 | 386 | ||
281 | 387 | ||
282 | 388 | ||
283 | st8 [r16] = r96;; |
389 | st8 [r16] = r96;; |
284 | add r16 = 8,r16 ;; |
390 | add r16 = 8,r16 ;; |
285 | st8 [r16] = r97;; |
391 | st8 [r16] = r97;; |
286 | add r16 = 8,r16 ;; |
392 | add r16 = 8,r16 ;; |
287 | st8 [r16] = r98;; |
393 | st8 [r16] = r98;; |
288 | add r16 = 8,r16 ;; |
394 | add r16 = 8,r16 ;; |
289 | st8 [r16] = r99;; |
395 | st8 [r16] = r99;; |
290 | add r16 = 8,r16 ;; |
396 | add r16 = 8,r16 ;; |
291 | st8 [r16] = r100;; |
397 | st8 [r16] = r100;; |
292 | add r16 = 8,r16 ;; |
398 | add r16 = 8,r16 ;; |
293 | st8 [r16] = r101;; |
399 | st8 [r16] = r101;; |
294 | add r16 = 8,r16 ;; |
400 | add r16 = 8,r16 ;; |
295 | st8 [r16] = r102;; |
401 | st8 [r16] = r102;; |
296 | add r16 = 8,r16 ;; |
402 | add r16 = 8,r16 ;; |
297 | st8 [r16] = r103;; |
403 | st8 [r16] = r103;; |
298 | add r16 = 8,r16 ;; |
404 | add r16 = 8,r16 ;; |
299 | st8 [r16] = r104;; |
405 | st8 [r16] = r104;; |
300 | add r16 = 8,r16 ;; |
406 | add r16 = 8,r16 ;; |
301 | st8 [r16] = r105;; |
407 | st8 [r16] = r105;; |
302 | add r16 = 8,r16 ;; |
408 | add r16 = 8,r16 ;; |
303 | st8 [r16] = r106;; |
409 | st8 [r16] = r106;; |
304 | add r16 = 8,r16 ;; |
410 | add r16 = 8,r16 ;; |
305 | st8 [r16] = r107;; |
411 | st8 [r16] = r107;; |
306 | add r16 = 8,r16 ;; |
412 | add r16 = 8,r16 ;; |
307 | st8 [r16] = r108;; |
413 | st8 [r16] = r108;; |
308 | add r16 = 8,r16 ;; |
414 | add r16 = 8,r16 ;; |
309 | st8 [r16] = r109;; |
415 | st8 [r16] = r109;; |
310 | add r16 = 8,r16 ;; |
416 | add r16 = 8,r16 ;; |
311 | st8 [r16] = r110;; |
417 | st8 [r16] = r110;; |
312 | add r16 = 8,r16 ;; |
418 | add r16 = 8,r16 ;; |
313 | st8 [r16] = r111;; |
419 | st8 [r16] = r111;; |
314 | add r16 = 8,r16 ;; |
420 | add r16 = 8,r16 ;; |
315 | st8 [r16] = r112;; |
421 | st8 [r16] = r112;; |
316 | add r16 = 8,r16 ;; |
422 | add r16 = 8,r16 ;; |
317 | st8 [r16] = r113;; |
423 | st8 [r16] = r113;; |
318 | add r16 = 8,r16 ;; |
424 | add r16 = 8,r16 ;; |
319 | st8 [r16] = r114;; |
425 | st8 [r16] = r114;; |
320 | add r16 = 8,r16 ;; |
426 | add r16 = 8,r16 ;; |
321 | st8 [r16] = r115;; |
427 | st8 [r16] = r115;; |
322 | add r16 = 8,r16 ;; |
428 | add r16 = 8,r16 ;; |
323 | st8 [r16] = r116;; |
429 | st8 [r16] = r116;; |
324 | add r16 = 8,r16 ;; |
430 | add r16 = 8,r16 ;; |
325 | st8 [r16] = r117;; |
431 | st8 [r16] = r117;; |
326 | add r16 = 8,r16 ;; |
432 | add r16 = 8,r16 ;; |
327 | st8 [r16] = r118;; |
433 | st8 [r16] = r118;; |
328 | add r16 = 8,r16 ;; |
434 | add r16 = 8,r16 ;; |
329 | st8 [r16] = r119;; |
435 | st8 [r16] = r119;; |
330 | add r16 = 8,r16 ;; |
436 | add r16 = 8,r16 ;; |
331 | st8 [r16] = r120;; |
437 | st8 [r16] = r120;; |
332 | add r16 = 8,r16 ;; |
438 | add r16 = 8,r16 ;; |
333 | st8 [r16] = r121;; |
439 | st8 [r16] = r121;; |
334 | add r16 = 8,r16 ;; |
440 | add r16 = 8,r16 ;; |
335 | st8 [r16] = r122;; |
441 | st8 [r16] = r122;; |
336 | add r16 = 8,r16 ;; |
442 | add r16 = 8,r16 ;; |
337 | st8 [r16] = r123;; |
443 | st8 [r16] = r123;; |
338 | add r16 = 8,r16 ;; |
444 | add r16 = 8,r16 ;; |
339 | st8 [r16] = r124;; |
445 | st8 [r16] = r124;; |
340 | add r16 = 8,r16 ;; |
446 | add r16 = 8,r16 ;; |
341 | st8 [r16] = r125;; |
447 | st8 [r16] = r125;; |
342 | add r16 = 8,r16 ;; |
448 | add r16 = 8,r16 ;; |
343 | st8 [r16] = r126;; |
449 | st8 [r16] = r126;; |
344 | add r16 = 8,r16 ;; |
450 | add r16 = 8,r16 ;; |
345 | st8 [r16] = r127;; |
451 | st8 [r16] = r127;; |
346 | add r16 = 8,r16 ;; |
452 | add r16 = 8,r16 ;; |
347 | 453 | ||
348 | 454 | ||
349 | 455 | ||
350 | br.ret.sptk.many b0;; |
456 | br.ret.sptk.many b0;; |
351 | 457 | ||
352 | 458 | ||
353 | 459 | ||
354 | 460 | ||
355 | 461 | ||
356 | .macro Handler o h |
462 | .macro Handler o h |
357 | .org IVT + \o |
463 | .org IVT + \o |
358 | br \h;; |
464 | br \h;; |
359 | .endm |
465 | .endm |
360 | 466 | ||
361 | .macro Handler2 o |
467 | .macro Handler2 o |
362 | .org IVT + \o |
468 | .org IVT + \o |
363 | br.call.sptk.many b0 = dump_gregs;; |
469 | br.call.sptk.many b0 = dump_gregs;; |
364 | mov r16 = \o ;; |
470 | mov r16 = \o ;; |
365 | bsw.1;; |
471 | bsw.1;; |
366 | br universal_handler;; |
472 | br universal_handler;; |
367 | .endm |
473 | .endm |
368 | 474 | ||
369 | 475 | ||
370 | 476 | ||
371 | .global IVT |
477 | .global IVT |
372 | .align 32768 |
478 | .align 32768 |
373 | IVT: |
479 | IVT: |
374 | 480 | ||
375 | 481 | ||
376 | Handler2 0x0000 |
482 | Handler2 0x0000 |
377 | Handler2 0x0400 |
483 | Handler2 0x0400 |
378 | Handler2 0x0800 |
484 | Handler2 0x0800 |
379 | Handler2 0x0c00 |
485 | Handler2 0x0c00 |
380 | Handler2 0x1000 |
486 | Handler2 0x1000 |
381 | Handler2 0x1400 |
487 | Handler2 0x1400 |
382 | Handler2 0x1800 |
488 | Handler2 0x1800 |
383 | Handler2 0x1c00 |
489 | Handler2 0x1c00 |
384 | Handler2 0x2000 |
490 | Handler2 0x2000 |
385 | Handler2 0x2400 |
491 | Handler2 0x2400 |
386 | Handler2 0x2800 |
492 | Handler2 0x2800 |
387 | Handler 0x2c00 break_instruction |
493 | Handler 0x2c00 break_instruction |
388 | Handler 0x3000 external_interrupt |
494 | HEAVYWEIGHT_HANDLER 0x3000 external_interrupt /* For external interrupt, heavyweight handler is used. */ |
389 | Handler2 0x3400 |
495 | Handler2 0x3400 |
390 | Handler2 0x3800 |
496 | Handler2 0x3800 |
391 | Handler2 0x3c00 |
497 | Handler2 0x3c00 |
392 | Handler2 0x4000 |
498 | Handler2 0x4000 |
393 | Handler2 0x4400 |
499 | Handler2 0x4400 |
394 | Handler2 0x4800 |
500 | Handler2 0x4800 |
395 | Handler2 0x4c00 |
501 | Handler2 0x4c00 |
396 | 502 | ||
397 | Handler2 0x5000 |
503 | Handler2 0x5000 |
398 | Handler2 0x5100 |
504 | Handler2 0x5100 |
399 | Handler2 0x5200 |
505 | Handler2 0x5200 |
400 | Handler2 0x5300 |
506 | Handler2 0x5300 |
401 | #Handler 0x5400 general_exception |
507 | #Handler 0x5400 general_exception |
402 | Handler2 0x5400 |
508 | Handler2 0x5400 |
403 | Handler2 0x5500 |
509 | Handler2 0x5500 |
404 | Handler2 0x5600 |
510 | Handler2 0x5600 |
405 | Handler2 0x5700 |
511 | Handler2 0x5700 |
406 | Handler2 0x5800 |
512 | Handler2 0x5800 |
407 | Handler2 0x5900 |
513 | Handler2 0x5900 |
408 | Handler2 0x5a00 |
514 | Handler2 0x5a00 |
409 | Handler2 0x5b00 |
515 | Handler2 0x5b00 |
410 | Handler2 0x5c00 |
516 | Handler2 0x5c00 |
411 | Handler2 0x5d00 |
517 | Handler2 0x5d00 |
412 | Handler2 0x5e00 |
518 | Handler2 0x5e00 |
413 | Handler2 0x5f00 |
519 | Handler2 0x5f00 |
414 | 520 | ||
415 | Handler2 0x6000 |
521 | Handler2 0x6000 |
416 | Handler2 0x6100 |
522 | Handler2 0x6100 |
417 | Handler2 0x6200 |
523 | Handler2 0x6200 |
418 | Handler2 0x6300 |
524 | Handler2 0x6300 |
419 | Handler2 0x6400 |
525 | Handler2 0x6400 |
420 | Handler2 0x6500 |
526 | Handler2 0x6500 |
421 | Handler2 0x6600 |
527 | Handler2 0x6600 |
422 | Handler2 0x6700 |
528 | Handler2 0x6700 |
423 | Handler2 0x6800 |
529 | Handler2 0x6800 |
424 | Handler2 0x6900 |
530 | Handler2 0x6900 |
425 | Handler2 0x6a00 |
531 | Handler2 0x6a00 |
426 | Handler2 0x6b00 |
532 | Handler2 0x6b00 |
427 | Handler2 0x6c00 |
533 | Handler2 0x6c00 |
428 | Handler2 0x6d00 |
534 | Handler2 0x6d00 |
429 | Handler2 0x6e00 |
535 | Handler2 0x6e00 |
430 | Handler2 0x6f00 |
536 | Handler2 0x6f00 |
431 | 537 | ||
432 | Handler2 0x7000 |
538 | Handler2 0x7000 |
433 | Handler2 0x7100 |
539 | Handler2 0x7100 |
434 | Handler2 0x7200 |
540 | Handler2 0x7200 |
435 | Handler2 0x7300 |
541 | Handler2 0x7300 |
436 | Handler2 0x7400 |
542 | Handler2 0x7400 |
437 | Handler2 0x7500 |
543 | Handler2 0x7500 |
438 | Handler2 0x7600 |
544 | Handler2 0x7600 |
439 | Handler2 0x7700 |
545 | Handler2 0x7700 |
440 | Handler2 0x7800 |
546 | Handler2 0x7800 |
441 | Handler2 0x7900 |
547 | Handler2 0x7900 |
442 | Handler2 0x7a00 |
548 | Handler2 0x7a00 |
443 | Handler2 0x7b00 |
549 | Handler2 0x7b00 |
444 | Handler2 0x7c00 |
550 | Handler2 0x7c00 |
445 | Handler2 0x7d00 |
551 | Handler2 0x7d00 |
446 | Handler2 0x7e00 |
552 | Handler2 0x7e00 |
447 | Handler2 0x7f00 |
553 | Handler2 0x7f00 |
448 | 554 | ||
449 | 555 | ||
450 | 556 | ||
451 | 557 | ||
452 | 558 | ||
453 | 559 | ||
454 | 560 | ||
455 | 561 | ||
456 | .align 32768 |
562 | .align 32768 |
457 | .global REG_DUMP |
563 | .global REG_DUMP |
458 | 564 | ||
459 | REG_DUMP: |
565 | REG_DUMP: |
460 | .space 128*8 |
566 | .space 128*8 |
461 | 567 | ||
462 | 568 |