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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia64 |
29 | /** @addtogroup ia64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #ifndef KERN_ia64_ATOMIC_H_ |
35 | #ifndef KERN_ia64_ATOMIC_H_ |
36 | #define KERN_ia64_ATOMIC_H_ |
36 | #define KERN_ia64_ATOMIC_H_ |
37 | 37 | ||
38 | /** Atomic addition. |
38 | /** Atomic addition. |
39 | * |
39 | * |
40 | * @param val Atomic value. |
40 | * @param val Atomic value. |
41 | * @param imm Value to add. |
41 | * @param imm Value to add. |
42 | * |
42 | * |
43 | * @return Value before addition. |
43 | * @return Value before addition. |
44 | */ |
44 | */ |
45 | static inline long atomic_add(atomic_t *val, int imm) |
45 | static inline long atomic_add(atomic_t *val, int imm) |
46 | { |
46 | { |
47 | long v; |
47 | long v; |
48 | 48 | ||
49 | asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm)); |
49 | asm volatile ("fetchadd8.rel %0 = %1, %2\n" : "=r" (v), "+m" (val->count) : "i" (imm)); |
50 | 50 | ||
51 | return v; |
51 | return v; |
52 | } |
52 | } |
53 | 53 | ||
- | 54 | ||
- | 55 | static inline uint64_t test_and_set(atomic_t *val) { |
|
- | 56 | uint64_t v; |
|
- | 57 | ||
- | 58 | asm volatile ( |
|
- | 59 | "movl %0=0x01;;\n" |
|
- | 60 | "xchg8 %0=%1,%0;;\n" |
|
- | 61 | : "=r" (v),"+m" (val->count) |
|
- | 62 | ); |
|
- | 63 | ||
- | 64 | return v; |
|
- | 65 | } |
|
- | 66 | ||
- | 67 | ||
54 | static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); } |
68 | static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); } |
55 | static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); } |
69 | static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); } |
56 | 70 | ||
57 | static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; } |
71 | static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; } |
58 | static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; } |
72 | static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; } |
59 | 73 | ||
60 | static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); } |
74 | static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); } |
61 | static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); } |
75 | static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); } |
62 | 76 | ||
63 | #endif |
77 | #endif |
64 | 78 | ||
65 | /** @} |
79 | /** @} |
66 | */ |
80 | */ |
67 | 81 |