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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia32interrupt ia32 |
29 | /** @addtogroup ia32interrupt |
30 | * @ingroup interrupt |
- | |
31 | * @{ |
30 | * @{ |
32 | */ |
31 | */ |
33 | /** @file |
32 | /** @file |
34 | */ |
33 | */ |
35 | 34 | ||
36 | #include <arch/interrupt.h> |
35 | #include <arch/interrupt.h> |
37 | #include <syscall/syscall.h> |
36 | #include <syscall/syscall.h> |
38 | #include <print.h> |
37 | #include <print.h> |
39 | #include <debug.h> |
38 | #include <debug.h> |
40 | #include <panic.h> |
39 | #include <panic.h> |
41 | #include <arch/drivers/i8259.h> |
40 | #include <arch/drivers/i8259.h> |
42 | #include <func.h> |
41 | #include <func.h> |
43 | #include <cpu.h> |
42 | #include <cpu.h> |
44 | #include <arch/asm.h> |
43 | #include <arch/asm.h> |
45 | #include <mm/tlb.h> |
44 | #include <mm/tlb.h> |
46 | #include <mm/as.h> |
45 | #include <mm/as.h> |
47 | #include <arch.h> |
46 | #include <arch.h> |
48 | #include <symtab.h> |
47 | #include <symtab.h> |
49 | #include <proc/thread.h> |
48 | #include <proc/thread.h> |
50 | #include <proc/task.h> |
49 | #include <proc/task.h> |
51 | #include <synch/spinlock.h> |
50 | #include <synch/spinlock.h> |
52 | #include <arch/ddi/ddi.h> |
51 | #include <arch/ddi/ddi.h> |
53 | #include <ipc/sysipc.h> |
52 | #include <ipc/sysipc.h> |
54 | #include <interrupt.h> |
53 | #include <interrupt.h> |
55 | 54 | ||
56 | /* |
55 | /* |
57 | * Interrupt and exception dispatching. |
56 | * Interrupt and exception dispatching. |
58 | */ |
57 | */ |
59 | 58 | ||
60 | void (* disable_irqs_function)(__u16 irqmask) = NULL; |
59 | void (* disable_irqs_function)(__u16 irqmask) = NULL; |
61 | void (* enable_irqs_function)(__u16 irqmask) = NULL; |
60 | void (* enable_irqs_function)(__u16 irqmask) = NULL; |
62 | void (* eoi_function)(void) = NULL; |
61 | void (* eoi_function)(void) = NULL; |
63 | 62 | ||
64 | void PRINT_INFO_ERRCODE(istate_t *istate) |
63 | void PRINT_INFO_ERRCODE(istate_t *istate) |
65 | { |
64 | { |
66 | char *symbol = get_symtab_entry(istate->eip); |
65 | char *symbol = get_symtab_entry(istate->eip); |
67 | 66 | ||
68 | if (!symbol) |
67 | if (!symbol) |
69 | symbol = ""; |
68 | symbol = ""; |
70 | 69 | ||
71 | if (CPU) |
70 | if (CPU) |
72 | printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id); |
71 | printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id); |
73 | else |
72 | else |
74 | printf("----------------EXCEPTION OCCURED----------------\n"); |
73 | printf("----------------EXCEPTION OCCURED----------------\n"); |
75 | 74 | ||
76 | printf("%%eip: %#x (%s)\n",istate->eip,symbol); |
75 | printf("%%eip: %#x (%s)\n",istate->eip,symbol); |
77 | printf("ERROR_WORD=%#x\n", istate->error_word); |
76 | printf("ERROR_WORD=%#x\n", istate->error_word); |
78 | printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags); |
77 | printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags); |
79 | printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]); |
78 | printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]); |
80 | #ifdef CONFIG_DEBUG_ALLREGS |
79 | #ifdef CONFIG_DEBUG_ALLREGS |
81 | printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx); |
80 | printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx); |
82 | #endif |
81 | #endif |
83 | printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]); |
82 | printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]); |
84 | printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]); |
83 | printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]); |
85 | } |
84 | } |
86 | 85 | ||
87 | void null_interrupt(int n, istate_t *istate) |
86 | void null_interrupt(int n, istate_t *istate) |
88 | { |
87 | { |
89 | fault_if_from_uspace(istate, "unserviced interrupt: %d", n); |
88 | fault_if_from_uspace(istate, "unserviced interrupt: %d", n); |
90 | 89 | ||
91 | PRINT_INFO_ERRCODE(istate); |
90 | PRINT_INFO_ERRCODE(istate); |
92 | panic("unserviced interrupt: %d\n", n); |
91 | panic("unserviced interrupt: %d\n", n); |
93 | } |
92 | } |
94 | 93 | ||
95 | /** General Protection Fault. */ |
94 | /** General Protection Fault. */ |
96 | void gp_fault(int n, istate_t *istate) |
95 | void gp_fault(int n, istate_t *istate) |
97 | { |
96 | { |
98 | if (TASK) { |
97 | if (TASK) { |
99 | count_t ver; |
98 | count_t ver; |
100 | 99 | ||
101 | spinlock_lock(&TASK->lock); |
100 | spinlock_lock(&TASK->lock); |
102 | ver = TASK->arch.iomapver; |
101 | ver = TASK->arch.iomapver; |
103 | spinlock_unlock(&TASK->lock); |
102 | spinlock_unlock(&TASK->lock); |
104 | 103 | ||
105 | if (CPU->arch.iomapver_copy != ver) { |
104 | if (CPU->arch.iomapver_copy != ver) { |
106 | /* |
105 | /* |
107 | * This fault can be caused by an early access |
106 | * This fault can be caused by an early access |
108 | * to I/O port because of an out-dated |
107 | * to I/O port because of an out-dated |
109 | * I/O Permission bitmap installed on CPU. |
108 | * I/O Permission bitmap installed on CPU. |
110 | * Install the fresh copy and restart |
109 | * Install the fresh copy and restart |
111 | * the instruction. |
110 | * the instruction. |
112 | */ |
111 | */ |
113 | io_perm_bitmap_install(); |
112 | io_perm_bitmap_install(); |
114 | return; |
113 | return; |
115 | } |
114 | } |
116 | fault_if_from_uspace(istate, "general protection fault"); |
115 | fault_if_from_uspace(istate, "general protection fault"); |
117 | } |
116 | } |
118 | 117 | ||
119 | PRINT_INFO_ERRCODE(istate); |
118 | PRINT_INFO_ERRCODE(istate); |
120 | panic("general protection fault\n"); |
119 | panic("general protection fault\n"); |
121 | } |
120 | } |
122 | 121 | ||
123 | void ss_fault(int n, istate_t *istate) |
122 | void ss_fault(int n, istate_t *istate) |
124 | { |
123 | { |
125 | fault_if_from_uspace(istate, "stack fault"); |
124 | fault_if_from_uspace(istate, "stack fault"); |
126 | 125 | ||
127 | PRINT_INFO_ERRCODE(istate); |
126 | PRINT_INFO_ERRCODE(istate); |
128 | panic("stack fault\n"); |
127 | panic("stack fault\n"); |
129 | } |
128 | } |
130 | 129 | ||
131 | void simd_fp_exception(int n, istate_t *istate) |
130 | void simd_fp_exception(int n, istate_t *istate) |
132 | { |
131 | { |
133 | __u32 mxcsr; |
132 | __u32 mxcsr; |
134 | asm |
133 | asm |
135 | ( |
134 | ( |
136 | "stmxcsr %0;\n" |
135 | "stmxcsr %0;\n" |
137 | :"=m"(mxcsr) |
136 | :"=m"(mxcsr) |
138 | ); |
137 | ); |
139 | fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zX", |
138 | fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zX", |
140 | (__native)mxcsr); |
139 | (__native)mxcsr); |
141 | 140 | ||
142 | PRINT_INFO_ERRCODE(istate); |
141 | PRINT_INFO_ERRCODE(istate); |
143 | printf("MXCSR: %#zX\n",(__native)(mxcsr)); |
142 | printf("MXCSR: %#zX\n",(__native)(mxcsr)); |
144 | panic("SIMD FP exception(19)\n"); |
143 | panic("SIMD FP exception(19)\n"); |
145 | } |
144 | } |
146 | 145 | ||
147 | void nm_fault(int n, istate_t *istate) |
146 | void nm_fault(int n, istate_t *istate) |
148 | { |
147 | { |
149 | #ifdef CONFIG_FPU_LAZY |
148 | #ifdef CONFIG_FPU_LAZY |
150 | scheduler_fpu_lazy_request(); |
149 | scheduler_fpu_lazy_request(); |
151 | #else |
150 | #else |
152 | fault_if_from_uspace(istate, "fpu fault"); |
151 | fault_if_from_uspace(istate, "fpu fault"); |
153 | panic("fpu fault"); |
152 | panic("fpu fault"); |
154 | #endif |
153 | #endif |
155 | } |
154 | } |
156 | 155 | ||
157 | void syscall(int n, istate_t *istate) |
156 | void syscall(int n, istate_t *istate) |
158 | { |
157 | { |
159 | panic("Obsolete syscall handler."); |
158 | panic("Obsolete syscall handler."); |
160 | } |
159 | } |
161 | 160 | ||
162 | void tlb_shootdown_ipi(int n, istate_t *istate) |
161 | void tlb_shootdown_ipi(int n, istate_t *istate) |
163 | { |
162 | { |
164 | trap_virtual_eoi(); |
163 | trap_virtual_eoi(); |
165 | tlb_shootdown_ipi_recv(); |
164 | tlb_shootdown_ipi_recv(); |
166 | } |
165 | } |
167 | 166 | ||
168 | void trap_virtual_enable_irqs(__u16 irqmask) |
167 | void trap_virtual_enable_irqs(__u16 irqmask) |
169 | { |
168 | { |
170 | if (enable_irqs_function) |
169 | if (enable_irqs_function) |
171 | enable_irqs_function(irqmask); |
170 | enable_irqs_function(irqmask); |
172 | else |
171 | else |
173 | panic("no enable_irqs_function\n"); |
172 | panic("no enable_irqs_function\n"); |
174 | } |
173 | } |
175 | 174 | ||
176 | void trap_virtual_disable_irqs(__u16 irqmask) |
175 | void trap_virtual_disable_irqs(__u16 irqmask) |
177 | { |
176 | { |
178 | if (disable_irqs_function) |
177 | if (disable_irqs_function) |
179 | disable_irqs_function(irqmask); |
178 | disable_irqs_function(irqmask); |
180 | else |
179 | else |
181 | panic("no disable_irqs_function\n"); |
180 | panic("no disable_irqs_function\n"); |
182 | } |
181 | } |
183 | 182 | ||
184 | void trap_virtual_eoi(void) |
183 | void trap_virtual_eoi(void) |
185 | { |
184 | { |
186 | if (eoi_function) |
185 | if (eoi_function) |
187 | eoi_function(); |
186 | eoi_function(); |
188 | else |
187 | else |
189 | panic("no eoi_function\n"); |
188 | panic("no eoi_function\n"); |
190 | 189 | ||
191 | } |
190 | } |
192 | 191 | ||
193 | static void ipc_int(int n, istate_t *istate) |
192 | static void ipc_int(int n, istate_t *istate) |
194 | { |
193 | { |
195 | ipc_irq_send_notif(n-IVT_IRQBASE); |
194 | ipc_irq_send_notif(n-IVT_IRQBASE); |
196 | trap_virtual_eoi(); |
195 | trap_virtual_eoi(); |
197 | } |
196 | } |
198 | 197 | ||
199 | 198 | ||
200 | /* Reregister irq to be IPC-ready */ |
199 | /* Reregister irq to be IPC-ready */ |
201 | void irq_ipc_bind_arch(__native irq) |
200 | void irq_ipc_bind_arch(__native irq) |
202 | { |
201 | { |
203 | if (irq == IRQ_CLK) |
202 | if (irq == IRQ_CLK) |
204 | return; |
203 | return; |
205 | trap_virtual_enable_irqs(1 << irq); |
204 | trap_virtual_enable_irqs(1 << irq); |
206 | exc_register(IVT_IRQBASE+irq, "ipc_int", ipc_int); |
205 | exc_register(IVT_IRQBASE+irq, "ipc_int", ipc_int); |
207 | } |
206 | } |
208 | 207 | ||
209 | /** @} |
208 | /** @} |
210 | */ |
209 | */ |
211 | 210 | ||
212 | 211 |