WebSVN – HelenOS – Diff – /branches/tracing/kernel/arch/arm32/src/drivers/gxemul.c


/*
 * Copyright (c) 2007 Michal Kebrt, Petr Stepan
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32
 * @{
 */
/** @file
 */
 
#include <interrupt.h>
#include <ipc/irq.h>
#include <console/chardev.h>
#include <arch/drivers/gxemul.h>
#include <console/console.h>
#include <sysinfo/sysinfo.h>
#include <print.h>
#include <ddi/device.h>
#include <mm/page.h>
#include <arch/machine.h>
#include <arch/debug/print.h>
 
/** Address of devices. */
#define GXEMUL_VIDEORAM            0x10000000
#define GXEMUL_KBD                 0x10000000
#define GXEMUL_HALT_OFFSET         0x10
#define GXEMUL_RTC                 0x15000000
#define GXEMUL_RTC_FREQ_OFFSET     0x100
#define GXEMUL_RTC_ACK_OFFSET      0x110
#define GXEMUL_IRQC                0x16000000
#define GXEMUL_IRQC_MASK_OFFSET    0x4
#define GXEMUL_IRQC_UNMASK_OFFSET  0x8
#define GXEMUL_MP                  0x11000000
#define GXEMUL_MP_MEMSIZE_OFFSET   0x0090
 
 
/** IRQs */
#define GXEMUL_KBD_IRQ      2
#define GXEMUL_TIMER_IRQ    4
 
static gxemul_hw_map_t gxemul_hw_map;
static chardev_t console;
static irq_t gxemul_irq;
static irq_t gxemul_timer_irq;
 
static bool hw_map_init_called = false;
 
static void gxemul_write(chardev_t *dev, const char ch);
static void gxemul_enable(chardev_t *dev);
static void gxemul_disable(chardev_t *dev);
static char gxemul_do_read(chardev_t *dev);
 
static chardev_operations_t gxemul_ops = {
    .resume = gxemul_enable,
    .suspend = gxemul_disable,
    .write = gxemul_write,
    .read = gxemul_do_read,
};
 
 
/** Initializes #gxemul_hw_map. */
void machine_hw_map_init(void)
{
    gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);
    gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);
    gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);
    gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);
 
    gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;
    gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;
    gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;
    gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET;
 
    hw_map_init_called = true;
}
 
/** Putchar that works with gxemul */
void gxemul_write(chardev_t *dev, const char ch)
{
    *((char *) gxemul_hw_map.videoram) = ch;
}
 
/* Called from getc(). */
void gxemul_enable(chardev_t *dev)
{
//  cp0_unmask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
}
 
/* Called from getc(). */
void gxemul_disable(chardev_t *dev)
{
//  cp0_mask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_mask(GXEMUL_KBD_IRQ);
}
 
/** Read character using polling, assume interrupts disabled */
static char gxemul_do_read(chardev_t *dev)
{
    char ch;
 
    while (1) {
        ch = *((volatile char *) gxemul_hw_map.kbd);
        if (ch) {
            if (ch == '\r')
                return '\n';
            if (ch == 0x7f)
                return '\b';
            return ch;
        }
    }
}
 
/** Process keyboard interrupt. */
static void gxemul_irq_handler(irq_t *irq, void *arg, ...)
{
    if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
        ipc_irq_send_notif(irq);
    else {
        char ch = 0;
       
            ch = *((char *) gxemul_hw_map.kbd);
            if (ch =='\r')
                ch = '\n';
            if (ch == 0x7f)
                ch = '\b';
            chardev_push_character(&console, ch);
    }
}
 
static irq_ownership_t gxemul_claim(void)
{
    return IRQ_ACCEPT;
}
 
void machine_grab_console(void)
{
    ipl_t ipl = interrupts_disable();
    spinlock_lock(&gxemul_irq.lock);
    gxemul_irq.notif_cfg.notify = false;
    spinlock_unlock(&gxemul_irq.lock);
    interrupts_restore(ipl);
}
 
void machine_release_console(void)
{
    ipl_t ipl = interrupts_disable();
    spinlock_lock(&gxemul_irq.lock);
    if (gxemul_irq.notif_cfg.answerbox)
        gxemul_irq.notif_cfg.notify = true;
    spinlock_unlock(&gxemul_irq.lock);
    interrupts_restore(ipl);
}
 
 
/** Return console object representing gxemul console */
void machine_console_init(devno_t devno)
{
    chardev_initialize("gxemul_console", &console, &gxemul_ops);
    stdin = &console;
    stdout = &console;
   
    irq_initialize(&gxemul_irq);
    gxemul_irq.devno = devno;
    gxemul_irq.inr = GXEMUL_KBD_IRQ;
    gxemul_irq.claim = gxemul_claim;
    gxemul_irq.handler = gxemul_irq_handler;
    irq_register(&gxemul_irq);
   
//  cp0_unmask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
   
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.devno", NULL, devno);
    sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);
    sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);
}
 
/** Return the mask of active interrupts. */
inline uint32_t gxemul_irqc_get_sources(void)
{
    return *(uint32_t*) gxemul_hw_map.irqc;
}
 
/** Masks interrupt.
 *
 * @param irq interrupt number
 */
inline void gxemul_irqc_mask(uint32_t irq)
{
    *(uint32_t*) gxemul_hw_map.irqc_mask = irq;
}
 
/** Unmasks interrupt.
 *
 * @param irq interrupt number
 */
inline void gxemul_irqc_unmask(uint32_t irq)
{
    *(uint32_t*) gxemul_hw_map.irqc_unmask = irq;
}
 
 
/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
 *
 * @param frequency interrupts frequency (0 disables RTC)
 */
void gxemul_timer_start(uint32_t frequency)
{
    *(uint32_t*) gxemul_hw_map.rtc_freq = frequency;
}
 
static irq_ownership_t gxemul_timer_claim(void)
{
    return IRQ_ACCEPT;
}
 
static void gxemul_timer_irq_handler(irq_t *irq, void *arg, ...)
{
    /* TODO time drifts ??
    unsigned long drift;
 
    drift = cp0_count_read() - nextcount;
    while (drift > cp0_compare_value) {
        drift -= cp0_compare_value;
        CPU->missed_clock_ticks++;
    }
    nextcount = cp0_count_read() + cp0_compare_value - drift;
    cp0_compare_write(nextcount);
    */
 
    /*
    * We are holding a lock which prevents preemption.
    * Release the lock, call clock() and reacquire the lock again.
    */
    spinlock_unlock(&irq->lock);
    clock();
    spinlock_lock(&irq->lock);
 
    /* acknowledge tick */
    *(uint32_t*) gxemul_hw_map.rtc_ack = 0;
   
    /* TODO what's that? *
    if (virtual_timer_fnc != NULL)
        virtual_timer_fnc();
    */
}
 
/**
 * Initializes and registers timer interrupt handler.
 */
void gxemul_timer_irq_init()
{
    irq_initialize(&gxemul_timer_irq);
    gxemul_timer_irq.devno = device_assign_devno();
    gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;
    gxemul_timer_irq.claim = gxemul_timer_claim;
    gxemul_timer_irq.handler = gxemul_timer_irq_handler;
 
    irq_register(&gxemul_timer_irq);
}
 
void machine_timer_irq_start()
{
    gxemul_timer_irq_init();
    gxemul_timer_start(GXEMUL_TIMER_FREQ);
}
 
size_t machine_get_memory_size(void)
{
    return  *((int*)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));
}
 
void machine_debug_putc(char ch)
{
    char * addr = 0;
    if (!hw_map_init_called) {
        addr = (char *) GXEMUL_KBD;
    } else {
        addr = (char *) gxemul_hw_map.videoram;
    }
 
    *(addr) = ch;
}
 
void machine_cpu_halt(void)
{
    char * addr = 0;
    if (!hw_map_init_called) {
        addr = (char *) GXEMUL_KBD;
    } else {
        addr = (char *) gxemul_hw_map.videoram;
    }
   
    *(addr + GXEMUL_HALT_OFFSET) = '\0';
}
 
void machine_irq_exception(int exc_no, istate_t *istate)
{
    uint32_t sources = gxemul_irqc_get_sources();
    int i = 0;
    for (; i < GXEMUL_IRQC_MAX_IRQ; i++) {
        if (sources & (1 << i)) {
            irq_t *irq = irq_dispatch_and_lock(i);
            if (irq) {
                /* The IRQ handler was found. */
                irq->handler(irq, irq->arg);
                spinlock_unlock(&irq->lock);
            } else {
                /* Spurious interrupt.*/
                dprintf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, i);
            }
        }
    }
    /* TODO remove after testing the above code
            noirq = 0;
            if (i == CONSOLE_IRQ) {
                char readchar = *(char*)0x10000000;
                if (readchar == 0) {
                    aux_puts("?");
                }
                else {
                    dprintf("%c", readchar);
                }
               
            }
            else if (i == TIMER_IRQ) {
                dprintf("\n.\n");
                //acknowledge
                *(uint32_t*)0x15000110 = 0;
            }
        }
    }
 
    if (noirq)
    aux_puts("IRQ exception without source\n");*/
}
 
/** @}
 */
 

Rev 2306	Rev 2326
1	/*	1	/*
2	* Copyright (c) 2007 Michal Kebrt, Petr Stepan	2	* Copyright (c) 2007 Michal Kebrt, Petr Stepan
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32	29	/** @addtogroup arm32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <interrupt.h>	35	#include <interrupt.h>
36	#include <ipc/irq.h>	36	#include <ipc/irq.h>
37	#include <console/chardev.h>	37	#include <console/chardev.h>
38	#include <arch/drivers/gxemul.h>	38	#include <arch/drivers/gxemul.h>
39	#include <console/console.h>	39	#include <console/console.h>
40	#include <sysinfo/sysinfo.h>	40	#include <sysinfo/sysinfo.h>
41	#include <print.h>	41	#include <print.h>
42	#include <ddi/device.h>	42	#include <ddi/device.h>
43	#include <mm/page.h>	43	#include <mm/page.h>
44	#include <arch/machine.h>	44	#include <arch/machine.h>
45	#include <arch/debug_print/print.h>	45	#include <arch/debug/print.h>
46		46
47	/** Address of devices. */	47	/** Address of devices. */
48	#define GXEMUL_VIDEORAM 0x10000000	48	#define GXEMUL_VIDEORAM 0x10000000
49	#define GXEMUL_KBD 0x10000000	49	#define GXEMUL_KBD 0x10000000
50	#define GXEMUL_HALT_OFFSET 0x10	50	#define GXEMUL_HALT_OFFSET 0x10
51	#define GXEMUL_RTC 0x15000000	51	#define GXEMUL_RTC 0x15000000
52	#define GXEMUL_RTC_FREQ_OFFSET 0x100	52	#define GXEMUL_RTC_FREQ_OFFSET 0x100
53	#define GXEMUL_RTC_ACK_OFFSET 0x110	53	#define GXEMUL_RTC_ACK_OFFSET 0x110
54	#define GXEMUL_IRQC 0x16000000	54	#define GXEMUL_IRQC 0x16000000
55	#define GXEMUL_IRQC_MASK_OFFSET 0x4	55	#define GXEMUL_IRQC_MASK_OFFSET 0x4
56	#define GXEMUL_IRQC_UNMASK_OFFSET 0x8	56	#define GXEMUL_IRQC_UNMASK_OFFSET 0x8
57	#define GXEMUL_MP 0x11000000	57	#define GXEMUL_MP 0x11000000
58	#define GXEMUL_MP_MEMSIZE_OFFSET 0x0090	58	#define GXEMUL_MP_MEMSIZE_OFFSET 0x0090
59		59
60		60
61	/** IRQs */	61	/** IRQs */
62	#define GXEMUL_KBD_IRQ 2	62	#define GXEMUL_KBD_IRQ 2
63	#define GXEMUL_TIMER_IRQ 4	63	#define GXEMUL_TIMER_IRQ 4
64		64
65	static gxemul_hw_map_t gxemul_hw_map;	65	static gxemul_hw_map_t gxemul_hw_map;
66	static chardev_t console;	66	static chardev_t console;
67	static irq_t gxemul_irq;	67	static irq_t gxemul_irq;
68	static irq_t gxemul_timer_irq;	68	static irq_t gxemul_timer_irq;
69		69
70	static bool hw_map_init_called = false;	70	static bool hw_map_init_called = false;
71		71
72	static void gxemul_write(chardev_t *dev, const char ch);	72	static void gxemul_write(chardev_t *dev, const char ch);
73	static void gxemul_enable(chardev_t *dev);	73	static void gxemul_enable(chardev_t *dev);
74	static void gxemul_disable(chardev_t *dev);	74	static void gxemul_disable(chardev_t *dev);
75	static char gxemul_do_read(chardev_t *dev);	75	static char gxemul_do_read(chardev_t *dev);
76		76
77	static chardev_operations_t gxemul_ops = {	77	static chardev_operations_t gxemul_ops = {
78	.resume = gxemul_enable,	78	.resume = gxemul_enable,
79	.suspend = gxemul_disable,	79	.suspend = gxemul_disable,
80	.write = gxemul_write,	80	.write = gxemul_write,
81	.read = gxemul_do_read,	81	.read = gxemul_do_read,
82	};	82	};
83		83
84		84
85	/** Initializes #gxemul_hw_map. */	85	/** Initializes #gxemul_hw_map. */
86	void machine_hw_map_init(void)	86	void machine_hw_map_init(void)
87	{	87	{
88	gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);	88	gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);
89	gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);	89	gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);
90	gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);	90	gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);
91	gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);	91	gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);
92		92
93	gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;	93	gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;
94	gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;	94	gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;
95	gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;	95	gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;
96	gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET;	96	gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET;
97		97
98	hw_map_init_called = true;	98	hw_map_init_called = true;
99	}	99	}
100		100
101	/** Putchar that works with gxemul */	101	/** Putchar that works with gxemul */
102	void gxemul_write(chardev_t *dev, const char ch)	102	void gxemul_write(chardev_t *dev, const char ch)
103	{	103	{
104	((char ) gxemul_hw_map.videoram) = ch;	104	((char ) gxemul_hw_map.videoram) = ch;
105	}	105	}
106		106
107	/* Called from getc(). */	107	/* Called from getc(). */
108	void gxemul_enable(chardev_t *dev)	108	void gxemul_enable(chardev_t *dev)
109	{	109	{
110	// cp0_unmask_int(GXEMUL_KBD_IRQ);	110	// cp0_unmask_int(GXEMUL_KBD_IRQ);
111	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);	111	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
112	}	112	}
113		113
114	/* Called from getc(). */	114	/* Called from getc(). */
115	void gxemul_disable(chardev_t *dev)	115	void gxemul_disable(chardev_t *dev)
116	{	116	{
117	// cp0_mask_int(GXEMUL_KBD_IRQ);	117	// cp0_mask_int(GXEMUL_KBD_IRQ);
118	gxemul_irqc_mask(GXEMUL_KBD_IRQ);	118	gxemul_irqc_mask(GXEMUL_KBD_IRQ);
119	}	119	}
120		120
121	/** Read character using polling, assume interrupts disabled */	121	/** Read character using polling, assume interrupts disabled */
122	static char gxemul_do_read(chardev_t *dev)	122	static char gxemul_do_read(chardev_t *dev)
123	{	123	{
124	char ch;	124	char ch;
125		125
126	while (1) {	126	while (1) {
127	ch = ((volatile char ) gxemul_hw_map.kbd);	127	ch = ((volatile char ) gxemul_hw_map.kbd);
128	if (ch) {	128	if (ch) {
129	if (ch == '\r')	129	if (ch == '\r')
130	return '\n';	130	return '\n';
131	if (ch == 0x7f)	131	if (ch == 0x7f)
132	return '\b';	132	return '\b';
133	return ch;	133	return ch;
134	}	134	}
135	}	135	}
136	}	136	}
137		137
138	/** Process keyboard interrupt. */	138	/** Process keyboard interrupt. */
139	static void gxemul_irq_handler(irq_t irq, void arg, ...)	139	static void gxemul_irq_handler(irq_t irq, void arg, ...)
140	{	140	{
141	if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))	141	if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
142	ipc_irq_send_notif(irq);	142	ipc_irq_send_notif(irq);
143	else {	143	else {
144	char ch = 0;	144	char ch = 0;
145		145
146	ch = ((char ) gxemul_hw_map.kbd);	146	ch = ((char ) gxemul_hw_map.kbd);
147	if (ch =='\r')	147	if (ch =='\r')
148	ch = '\n';	148	ch = '\n';
149	if (ch == 0x7f)	149	if (ch == 0x7f)
150	ch = '\b';	150	ch = '\b';
151	chardev_push_character(&console, ch);	151	chardev_push_character(&console, ch);
152	}	152	}
153	}	153	}
154		154
155	static irq_ownership_t gxemul_claim(void)	155	static irq_ownership_t gxemul_claim(void)
156	{	156	{
157	return IRQ_ACCEPT;	157	return IRQ_ACCEPT;
158	}	158	}
159		159
160	void machine_grab_console(void)	160	void machine_grab_console(void)
161	{	161	{
162	ipl_t ipl = interrupts_disable();	162	ipl_t ipl = interrupts_disable();
163	spinlock_lock(&gxemul_irq.lock);	163	spinlock_lock(&gxemul_irq.lock);
164	gxemul_irq.notif_cfg.notify = false;	164	gxemul_irq.notif_cfg.notify = false;
165	spinlock_unlock(&gxemul_irq.lock);	165	spinlock_unlock(&gxemul_irq.lock);
166	interrupts_restore(ipl);	166	interrupts_restore(ipl);
167	}	167	}
168		168
169	void machine_release_console(void)	169	void machine_release_console(void)
170	{	170	{
171	ipl_t ipl = interrupts_disable();	171	ipl_t ipl = interrupts_disable();
172	spinlock_lock(&gxemul_irq.lock);	172	spinlock_lock(&gxemul_irq.lock);
173	if (gxemul_irq.notif_cfg.answerbox)	173	if (gxemul_irq.notif_cfg.answerbox)
174	gxemul_irq.notif_cfg.notify = true;	174	gxemul_irq.notif_cfg.notify = true;
175	spinlock_unlock(&gxemul_irq.lock);	175	spinlock_unlock(&gxemul_irq.lock);
176	interrupts_restore(ipl);	176	interrupts_restore(ipl);
177	}	177	}
178		178
179		179
180	/** Return console object representing gxemul console */	180	/** Return console object representing gxemul console */
181	void machine_console_init(devno_t devno)	181	void machine_console_init(devno_t devno)
182	{	182	{
183	chardev_initialize("gxemul_console", &console, &gxemul_ops);	183	chardev_initialize("gxemul_console", &console, &gxemul_ops);
184	stdin = &console;	184	stdin = &console;
185	stdout = &console;	185	stdout = &console;
186		186
187	irq_initialize(&gxemul_irq);	187	irq_initialize(&gxemul_irq);
188	gxemul_irq.devno = devno;	188	gxemul_irq.devno = devno;
189	gxemul_irq.inr = GXEMUL_KBD_IRQ;	189	gxemul_irq.inr = GXEMUL_KBD_IRQ;
190	gxemul_irq.claim = gxemul_claim;	190	gxemul_irq.claim = gxemul_claim;
191	gxemul_irq.handler = gxemul_irq_handler;	191	gxemul_irq.handler = gxemul_irq_handler;
192	irq_register(&gxemul_irq);	192	irq_register(&gxemul_irq);
193		193
194	// cp0_unmask_int(GXEMUL_KBD_IRQ);	194	// cp0_unmask_int(GXEMUL_KBD_IRQ);
195	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);	195	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
196		196
197	sysinfo_set_item_val("kbd", NULL, true);	197	sysinfo_set_item_val("kbd", NULL, true);
198	sysinfo_set_item_val("kbd.devno", NULL, devno);	198	sysinfo_set_item_val("kbd.devno", NULL, devno);
199	sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);	199	sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);
200	sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);	200	sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);
201	}	201	}
202		202
203	/** Return the mask of active interrupts. */	203	/** Return the mask of active interrupts. */
204	inline uint32_t gxemul_irqc_get_sources(void)	204	inline uint32_t gxemul_irqc_get_sources(void)
205	{	205	{
206	return (uint32_t) gxemul_hw_map.irqc;	206	return (uint32_t) gxemul_hw_map.irqc;
207	}	207	}
208		208
209	/** Masks interrupt.	209	/** Masks interrupt.
210	*	210	*
211	* @param irq interrupt number	211	* @param irq interrupt number
212	*/	212	*/
213	inline void gxemul_irqc_mask(uint32_t irq)	213	inline void gxemul_irqc_mask(uint32_t irq)
214	{	214	{
215	(uint32_t) gxemul_hw_map.irqc_mask = irq;	215	(uint32_t) gxemul_hw_map.irqc_mask = irq;
216	}	216	}
217		217
218	/** Unmasks interrupt.	218	/** Unmasks interrupt.
219	*	219	*
220	* @param irq interrupt number	220	* @param irq interrupt number
221	*/	221	*/
222	inline void gxemul_irqc_unmask(uint32_t irq)	222	inline void gxemul_irqc_unmask(uint32_t irq)
223	{	223	{
224	(uint32_t) gxemul_hw_map.irqc_unmask = irq;	224	(uint32_t) gxemul_hw_map.irqc_unmask = irq;
225	}	225	}
226		226
227		227
228	/** Starts gxemul Real Time Clock device, which asserts regular interrupts.	228	/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
229	*	229	*
230	* @param frequency interrupts frequency (0 disables RTC)	230	* @param frequency interrupts frequency (0 disables RTC)
231	*/	231	*/
232	void gxemul_timer_start(uint32_t frequency)	232	void gxemul_timer_start(uint32_t frequency)
233	{	233	{
234	(uint32_t) gxemul_hw_map.rtc_freq = frequency;	234	(uint32_t) gxemul_hw_map.rtc_freq = frequency;
235	}	235	}
236		236
237	static irq_ownership_t gxemul_timer_claim(void)	237	static irq_ownership_t gxemul_timer_claim(void)
238	{	238	{
239	return IRQ_ACCEPT;	239	return IRQ_ACCEPT;
240	}	240	}
241		241
242	static void gxemul_timer_irq_handler(irq_t irq, void arg, ...)	242	static void gxemul_timer_irq_handler(irq_t irq, void arg, ...)
243	{	243	{
244	/* TODO time drifts ??	244	/* TODO time drifts ??
245	unsigned long drift;	245	unsigned long drift;
246		246
247	drift = cp0_count_read() - nextcount;	247	drift = cp0_count_read() - nextcount;
248	while (drift > cp0_compare_value) {	248	while (drift > cp0_compare_value) {
249	drift -= cp0_compare_value;	249	drift -= cp0_compare_value;
250	CPU->missed_clock_ticks++;	250	CPU->missed_clock_ticks++;
251	}	251	}
252	nextcount = cp0_count_read() + cp0_compare_value - drift;	252	nextcount = cp0_count_read() + cp0_compare_value - drift;
253	cp0_compare_write(nextcount);	253	cp0_compare_write(nextcount);
254	*/	254	*/
255		255
256	/*	256	/*
257	* We are holding a lock which prevents preemption.	257	* We are holding a lock which prevents preemption.
258	* Release the lock, call clock() and reacquire the lock again.	258	* Release the lock, call clock() and reacquire the lock again.
259	*/	259	*/
260	spinlock_unlock(&irq->lock);	260	spinlock_unlock(&irq->lock);
261	clock();	261	clock();
262	spinlock_lock(&irq->lock);	262	spinlock_lock(&irq->lock);
263		263
264	/* acknowledge tick */	264	/* acknowledge tick */
265	(uint32_t) gxemul_hw_map.rtc_ack = 0;	265	(uint32_t) gxemul_hw_map.rtc_ack = 0;
266		266
267	/* TODO what's that? *	267	/* TODO what's that? *
268	if (virtual_timer_fnc != NULL)	268	if (virtual_timer_fnc != NULL)
269	virtual_timer_fnc();	269	virtual_timer_fnc();
270	*/	270	*/
271	}	271	}
272		272
273	/**	273	/**
274	* Initializes and registers timer interrupt handler.	274	* Initializes and registers timer interrupt handler.
275	*/	275	*/
276	void gxemul_timer_irq_init()	276	void gxemul_timer_irq_init()
277	{	277	{
278	irq_initialize(&gxemul_timer_irq);	278	irq_initialize(&gxemul_timer_irq);
279	gxemul_timer_irq.devno = device_assign_devno();	279	gxemul_timer_irq.devno = device_assign_devno();
280	gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;	280	gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;
281	gxemul_timer_irq.claim = gxemul_timer_claim;	281	gxemul_timer_irq.claim = gxemul_timer_claim;
282	gxemul_timer_irq.handler = gxemul_timer_irq_handler;	282	gxemul_timer_irq.handler = gxemul_timer_irq_handler;
283		283
284	irq_register(&gxemul_timer_irq);	284	irq_register(&gxemul_timer_irq);
285	}	285	}
286		286
287	void machine_timer_irq_start()	287	void machine_timer_irq_start()
288	{	288	{
289	gxemul_timer_irq_init();	289	gxemul_timer_irq_init();
290	gxemul_timer_start(GXEMUL_TIMER_FREQ);	290	gxemul_timer_start(GXEMUL_TIMER_FREQ);
291	}	291	}
292		292
293	size_t machine_get_memory_size(void)	293	size_t machine_get_memory_size(void)
294	{	294	{
295	return ((int)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));	295	return ((int)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));
296	}	296	}
297		297
298	void machine_debug_putc(char ch)	298	void machine_debug_putc(char ch)
299	{	299	{
300	char * addr = 0;	300	char * addr = 0;
301	if (!hw_map_init_called) {	301	if (!hw_map_init_called) {
302	addr = (char *) GXEMUL_KBD;	302	addr = (char *) GXEMUL_KBD;
303	} else {	303	} else {
304	addr = (char *) gxemul_hw_map.videoram;	304	addr = (char *) gxemul_hw_map.videoram;
305	}	305	}
306		306
307	*(addr) = ch;	307	*(addr) = ch;
308	}	308	}
309		309
310	void machine_cpu_halt(void)	310	void machine_cpu_halt(void)
311	{	311	{
312	char * addr = 0;	312	char * addr = 0;
313	if (!hw_map_init_called) {	313	if (!hw_map_init_called) {
314	addr = (char *) GXEMUL_KBD;	314	addr = (char *) GXEMUL_KBD;
315	} else {	315	} else {
316	addr = (char *) gxemul_hw_map.videoram;	316	addr = (char *) gxemul_hw_map.videoram;
317	}	317	}
318		318
319	*(addr + GXEMUL_HALT_OFFSET) = '\0';	319	*(addr + GXEMUL_HALT_OFFSET) = '\0';
320	}	320	}
321		321
322	void machine_irq_exception(int exc_no, istate_t *istate)	322	void machine_irq_exception(int exc_no, istate_t *istate)
323	{	323	{
324	uint32_t sources = gxemul_irqc_get_sources();	324	uint32_t sources = gxemul_irqc_get_sources();
325	int i = 0;	325	int i = 0;
326	for (; i < GXEMUL_IRQC_MAX_IRQ; i++) {	326	for (; i < GXEMUL_IRQC_MAX_IRQ; i++) {
327	if (sources & (1 << i)) {	327	if (sources & (1 << i)) {
328	irq_t *irq = irq_dispatch_and_lock(i);	328	irq_t *irq = irq_dispatch_and_lock(i);
329	if (irq) {	329	if (irq) {
330	/* The IRQ handler was found. */	330	/* The IRQ handler was found. */
331	irq->handler(irq, irq->arg);	331	irq->handler(irq, irq->arg);
332	spinlock_unlock(&irq->lock);	332	spinlock_unlock(&irq->lock);
333	} else {	333	} else {
334	/* Spurious interrupt.*/	334	/* Spurious interrupt.*/
335	dprintf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, i);	335	dprintf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, i);
336	}	336	}
337	}	337	}
338	}	338	}
339	/* TODO remove after testing the above code	339	/* TODO remove after testing the above code
340	noirq = 0;	340	noirq = 0;
341	if (i == CONSOLE_IRQ) {	341	if (i == CONSOLE_IRQ) {
342	char readchar = (char)0x10000000;	342	char readchar = (char)0x10000000;
343	if (readchar == 0) {	343	if (readchar == 0) {
344	aux_puts("?");	344	aux_puts("?");
345	}	345	}
346	else {	346	else {
347	dprintf("%c", readchar);	347	dprintf("%c", readchar);
348	}	348	}
349		349
350	}	350	}
351	else if (i == TIMER_IRQ) {	351	else if (i == TIMER_IRQ) {
352	dprintf("\n.\n");	352	dprintf("\n.\n");
353	//acknowledge	353	//acknowledge
354	(uint32_t)0x15000110 = 0;	354	(uint32_t)0x15000110 = 0;
355	}	355	}
356	}	356	}
357	}	357	}
358		358
359	if (noirq)	359	if (noirq)
360	aux_puts("IRQ exception without source\n");*/	360	aux_puts("IRQ exception without source\n");*/
361	}	361	}
362		362
363	/** @}	363	/** @}
364	*/	364	*/
365		365

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(root)/branches/tracing/kernel/arch/arm32/src/drivers/gxemul.c @ 4390 – Rev 2306 → 2326