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/*
1
/*
2
 * Copyright (c) 2005 Ondrej Palkovsky
2
 * Copyright (c) 2005 Ondrej Palkovsky
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup amd64
29
/** @addtogroup amd64
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch.h>
35
#include <arch.h>
36
 
36
 
37
#include <arch/types.h>
37
#include <arch/types.h>
38
 
38
 
39
#include <config.h>
39
#include <config.h>
40
 
40
 
41
#include <proc/thread.h>
41
#include <proc/thread.h>
-
 
42
#include <genarch/multiboot/multiboot.h>
-
 
43
#include <genarch/drivers/legacy/ia32/io.h>
42
#include <arch/drivers/ega.h>
44
#include <genarch/drivers/ega/ega.h>
43
#include <arch/drivers/vesa.h>
45
#include <arch/drivers/vesa.h>
-
 
46
#include <genarch/drivers/i8042/i8042.h>
44
#include <genarch/kbd/i8042.h>
47
#include <genarch/kbrd/kbrd.h>
45
#include <arch/drivers/i8254.h>
48
#include <arch/drivers/i8254.h>
46
#include <arch/drivers/i8259.h>
49
#include <arch/drivers/i8259.h>
-
 
50
#include <arch/boot/boot.h>
47
 
51
 
48
#ifdef CONFIG_SMP
52
#ifdef CONFIG_SMP
49
#include <arch/smp/apic.h>
53
#include <arch/smp/apic.h>
50
#endif
54
#endif
51
 
55
 
52
#include <arch/bios/bios.h>
56
#include <arch/bios/bios.h>
53
#include <arch/cpu.h>
57
#include <arch/cpu.h>
54
#include <print.h>
58
#include <print.h>
55
#include <arch/cpuid.h>
59
#include <arch/cpuid.h>
56
#include <genarch/acpi/acpi.h>
60
#include <genarch/acpi/acpi.h>
57
#include <panic.h>
61
#include <panic.h>
58
#include <interrupt.h>
62
#include <interrupt.h>
59
#include <arch/syscall.h>
63
#include <arch/syscall.h>
60
#include <arch/debugger.h>
64
#include <arch/debugger.h>
61
#include <syscall/syscall.h>
65
#include <syscall/syscall.h>
62
#include <console/console.h>
66
#include <console/console.h>
63
#include <ddi/irq.h>
67
#include <ddi/irq.h>
64
#include <ddi/device.h>
68
#include <sysinfo/sysinfo.h>
65
 
-
 
66
 
69
 
67
/** Disable I/O on non-privileged levels
70
/** Disable I/O on non-privileged levels
68
 *
71
 *
69
 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
72
 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
70
 */
73
 */
71
static void clean_IOPL_NT_flags(void)
74
static void clean_IOPL_NT_flags(void)
72
{
75
{
73
    asm (
76
    asm volatile (
74
        "pushfq\n"
77
        "pushfq\n"
75
        "pop %%rax\n"
78
        "pop %%rax\n"
76
        "and $~(0x7000), %%rax\n"
79
        "and $~(0x7000), %%rax\n"
77
        "pushq %%rax\n"
80
        "pushq %%rax\n"
78
        "popfq\n"
81
        "popfq\n"
79
        :
-
 
80
        :
-
 
81
        : "%rax"
82
        ::: "%rax"
82
    );
83
    );
83
}
84
}
84
 
85
 
85
/** Disable alignment check
86
/** Disable alignment check
86
 *
87
 *
87
 * Clean AM(18) flag in CR0 register
88
 * Clean AM(18) flag in CR0 register
88
 */
89
 */
89
static void clean_AM_flag(void)
90
static void clean_AM_flag(void)
90
{
91
{
91
    asm (
92
    asm volatile (
92
        "mov %%cr0, %%rax\n"
93
        "mov %%cr0, %%rax\n"
93
        "and $~(0x40000), %%rax\n"
94
        "and $~(0x40000), %%rax\n"
94
        "mov %%rax, %%cr0\n"
95
        "mov %%rax, %%cr0\n"
95
        :
-
 
96
        :
-
 
97
        : "%rax"
96
        ::: "%rax"
98
    );
97
    );
99
}
98
}
100
 
99
 
-
 
100
/** Perform amd64-specific initialization before main_bsp() is called.
-
 
101
 *
-
 
102
 * @param signature Should contain the multiboot signature.
-
 
103
 * @param mi        Pointer to the multiboot information structure.
-
 
104
 */
-
 
105
void arch_pre_main(uint32_t signature, const multiboot_info_t *mi)
-
 
106
{
-
 
107
    /* Parse multiboot information obtained from the bootloader. */
-
 
108
    multiboot_info_parse(signature, mi);
-
 
109
   
-
 
110
#ifdef CONFIG_SMP
-
 
111
    /* Copy AP bootstrap routines below 1 MB. */
-
 
112
    memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET,
-
 
113
        (size_t) &_hardcoded_unmapped_size);
-
 
114
#endif
-
 
115
}
-
 
116
 
101
void arch_pre_mm_init(void)
117
void arch_pre_mm_init(void)
102
{
118
{
103
    /* Enable no-execute pages */
119
    /* Enable no-execute pages */
104
    set_efer_flag(AMD_NXE_FLAG);
120
    set_efer_flag(AMD_NXE_FLAG);
105
    /* Enable FPU */
121
    /* Enable FPU */
106
    cpu_setup_fpu();
122
    cpu_setup_fpu();
107
 
123
 
108
    /* Initialize segmentation */
124
    /* Initialize segmentation */
109
    pm_init();
125
    pm_init();
110
   
126
   
111
    /* Disable I/O on nonprivileged levels
127
    /* Disable I/O on nonprivileged levels
112
     * clear the NT (nested-thread) flag
128
     * clear the NT (nested-thread) flag
113
     */
129
     */
114
    clean_IOPL_NT_flags();
130
    clean_IOPL_NT_flags();
115
    /* Disable alignment check */
131
    /* Disable alignment check */
116
    clean_AM_flag();
132
    clean_AM_flag();
117
 
133
 
118
    if (config.cpu_active == 1) {
134
    if (config.cpu_active == 1) {
119
        interrupt_init();
135
        interrupt_init();
120
        bios_init();
136
        bios_init();
121
       
137
       
122
        /* PIC */
138
        /* PIC */
123
        i8259_init();
139
        i8259_init();
124
    }
140
    }
125
}
141
}
126
 
142
 
127
 
143
 
128
void arch_post_mm_init(void)
144
void arch_post_mm_init(void)
129
{
145
{
130
    if (config.cpu_active == 1) {
146
    if (config.cpu_active == 1) {
131
        /* Initialize IRQ routing */
147
        /* Initialize IRQ routing */
132
        irq_init(IRQ_COUNT, IRQ_COUNT);
148
        irq_init(IRQ_COUNT, IRQ_COUNT);
133
       
149
       
134
        /* hard clock */
150
        /* hard clock */
135
        i8254_init();
151
        i8254_init();
136
               
152
       
137
#ifdef CONFIG_FB
153
#ifdef CONFIG_FB
138
        if (vesa_present())
154
        if (vesa_present())
139
            vesa_init();
155
            vesa_init();
140
        else
156
        else
141
#endif
157
#endif
-
 
158
#ifdef CONFIG_EGA
142
            ega_init(); /* video */
159
            ega_init(EGA_BASE, EGA_VIDEORAM);  /* video */
-
 
160
#else
-
 
161
            {}
-
 
162
#endif
143
       
163
       
144
        /* Enable debugger */
164
        /* Enable debugger */
145
        debugger_init();
165
        debugger_init();
146
        /* Merge all memory zones to 1 big zone */
166
        /* Merge all memory zones to 1 big zone */
147
        zone_merge_all();
167
        zone_merge_all();
148
    }
168
    }
149
   
169
   
150
    /* Setup fast SYSCALL/SYSRET */
170
    /* Setup fast SYSCALL/SYSRET */
151
    syscall_setup_cpu();
171
    syscall_setup_cpu();
152
}
172
}
153
 
173
 
154
void arch_post_cpu_init()
174
void arch_post_cpu_init()
155
{
175
{
156
#ifdef CONFIG_SMP
176
#ifdef CONFIG_SMP
157
    if (config.cpu_active > 1) {
177
    if (config.cpu_active > 1) {
158
        l_apic_init();
178
        l_apic_init();
159
        l_apic_debug();
179
        l_apic_debug();
160
    }
180
    }
161
#endif
181
#endif
162
}
182
}
163
 
183
 
164
void arch_pre_smp_init(void)
184
void arch_pre_smp_init(void)
165
{
185
{
166
    if (config.cpu_active == 1) {
186
    if (config.cpu_active == 1) {
167
#ifdef CONFIG_SMP
187
#ifdef CONFIG_SMP
168
        acpi_init();
188
        acpi_init();
169
#endif /* CONFIG_SMP */
189
#endif /* CONFIG_SMP */
170
    }
190
    }
171
}
191
}
172
 
192
 
173
void arch_post_smp_init(void)
193
void arch_post_smp_init(void)
174
{
194
{
-
 
195
#ifdef CONFIG_PC_KBD
-
 
196
    /*
-
 
197
     * Initialize the i8042 controller. Then initialize the keyboard
-
 
198
     * module and connect it to i8042. Enable keyboard interrupts.
-
 
199
     */
-
 
200
    i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
-
 
201
    if (i8042_instance) {
-
 
202
        kbrd_instance_t *kbrd_instance = kbrd_init();
175
    /* keyboard controller */
203
        if (kbrd_instance) {
-
 
204
            indev_t *sink = stdin_wire();
-
 
205
            indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
-
 
206
            i8042_wire(i8042_instance, kbrd);
-
 
207
            trap_virtual_enable_irqs(1 << IRQ_KBD);
-
 
208
        }
-
 
209
    }
-
 
210
   
-
 
211
    /*
176
    i8042_init(device_assign_devno(), IRQ_KBD, device_assign_devno(), IRQ_MOUSE);
212
     * This is the necessary evil until the userspace driver is entirely
-
 
213
     * self-sufficient.
-
 
214
     */
-
 
215
    sysinfo_set_item_val("kbd", NULL, true);
-
 
216
    sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
-
 
217
    sysinfo_set_item_val("kbd.address.physical", NULL,
-
 
218
        (uintptr_t) I8042_BASE);
-
 
219
    sysinfo_set_item_val("kbd.address.kernel", NULL,
-
 
220
        (uintptr_t) I8042_BASE);
-
 
221
#endif
177
}
222
}
178
 
223
 
179
void calibrate_delay_loop(void)
224
void calibrate_delay_loop(void)
180
{
225
{
181
    i8254_calibrate_delay_loop();
226
    i8254_calibrate_delay_loop();
182
    if (config.cpu_active == 1) {
227
    if (config.cpu_active == 1) {
183
        /*
228
        /*
184
         * This has to be done only on UP.
229
         * This has to be done only on UP.
185
         * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
230
         * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
186
         */
231
         */
187
        i8254_normal_operation();
232
        i8254_normal_operation();
188
    }
233
    }
189
}
234
}
190
 
235
 
191
/** Set thread-local-storage pointer
236
/** Set thread-local-storage pointer
192
 *
237
 *
193
 * TLS pointer is set in FS register. Unfortunately the 64-bit
238
 * TLS pointer is set in FS register. Unfortunately the 64-bit
194
 * part can be set only in CPL0 mode.
239
 * part can be set only in CPL0 mode.
195
 *
240
 *
196
 * The specs say, that on %fs:0 there is stored contents of %fs register,
241
 * The specs say, that on %fs:0 there is stored contents of %fs register,
197
 * we need not to go to CPL0 to read it.
242
 * we need not to go to CPL0 to read it.
198
 */
243
 */
199
unative_t sys_tls_set(unative_t addr)
244
unative_t sys_tls_set(unative_t addr)
200
{
245
{
201
    THREAD->arch.tls = addr;
246
    THREAD->arch.tls = addr;
202
    write_msr(AMD_MSR_FS, addr);
247
    write_msr(AMD_MSR_FS, addr);
203
    return 0;
248
    return 0;
204
}
249
}
205
 
250
 
206
/** Acquire console back for kernel
251
/** Acquire console back for kernel
207
 *
252
 *
208
 */
253
 */
209
void arch_grab_console(void)
254
void arch_grab_console(void)
210
{
255
{
-
 
256
#ifdef CONFIG_FB
-
 
257
    if (vesa_present())
211
    i8042_grab();
258
        vesa_redraw();
-
 
259
    else
-
 
260
#endif
-
 
261
#ifdef CONFIG_EGA
-
 
262
        ega_redraw();
-
 
263
#else
-
 
264
        {}
-
 
265
#endif
212
}
266
}
-
 
267
 
213
/** Return console to userspace
268
/** Return console to userspace
214
 *
269
 *
215
 */
270
 */
216
void arch_release_console(void)
271
void arch_release_console(void)
217
{
272
{
-
 
273
}
-
 
274
 
-
 
275
/** Construct function pointer
-
 
276
 *
-
 
277
 * @param fptr   function pointer structure
-
 
278
 * @param addr   function address
-
 
279
 * @param caller calling function address
-
 
280
 *
-
 
281
 * @return address of the function pointer
-
 
282
 *
-
 
283
 */
-
 
284
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
-
 
285
{
218
    i8042_release();
286
    return addr;
-
 
287
}
-
 
288
 
-
 
289
void arch_reboot(void)
-
 
290
{
-
 
291
#ifdef CONFIG_PC_KBD
-
 
292
    i8042_cpu_reset((i8042_t *) I8042_BASE);
-
 
293
#endif
219
}
294
}
220
 
295
 
221
/** @}
296
/** @}
222
 */
297
 */
223
 
298