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- | 1 | # |
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- | 2 | # Copyright (c) 2006 Ondrej Palkovsky |
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- | 3 | # All rights reserved. |
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- | 4 | # |
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- | 5 | # Redistribution and use in source and binary forms, with or without |
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- | 6 | # modification, are permitted provided that the following conditions |
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- | 7 | # are met: |
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- | 8 | # |
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- | 9 | # - Redistributions of source code must retain the above copyright |
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- | 10 | # notice, this list of conditions and the following disclaimer. |
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- | 11 | # - Redistributions in binary form must reproduce the above copyright |
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- | 12 | # notice, this list of conditions and the following disclaimer in the |
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- | 13 | # documentation and/or other materials provided with the distribution. |
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- | 14 | # - The name of the author may not be used to endorse or promote products |
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- | 15 | # derived from this software without specific prior written permission. |
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- | 16 | # |
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- | 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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- | 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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- | 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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- | 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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- | 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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- | 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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- | 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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- | 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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- | 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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- | 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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- | 27 | # |
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- | 28 | ||
1 | ## General configuration directives |
29 | ## General configuration directives |
2 | 30 | ||
3 | # Architecture |
31 | # Architecture |
4 | @ "amd64" AMD64/Intel EM64T |
32 | @ "amd64" AMD64/Intel EM64T |
5 | @ "arm32" ARM 32-bit |
33 | @ "arm32" ARM 32-bit |
6 | @ "ia32" Intel IA-32 |
34 | @ "ia32" Intel IA-32 |
7 | @ "ia32xen" Intel IA-32 on Xen hypervisor |
35 | @ "ia32xen" Intel IA-32 on Xen hypervisor |
8 | @ "ia64" Intel IA-64 |
36 | @ "ia64" Intel IA-64 |
9 | @ "mips32" MIPS 32-bit |
37 | @ "mips32" MIPS 32-bit |
10 | @ "ppc32" PowerPC 32-bit |
38 | @ "ppc32" PowerPC 32-bit |
11 | @ "ppc64" PowerPC 64-bit |
39 | @ "ppc64" PowerPC 64-bit |
12 | @ "sparc64" Sun UltraSPARC |
40 | @ "sparc64" Sun UltraSPARC |
13 | ! ARCH (choice) |
41 | ! ARCH (choice) |
14 | 42 | ||
15 | # Compiler |
43 | # Compiler |
16 | @ "gcc_cross" GCC Cross-compiler |
44 | @ "gcc_cross" GCC Cross-compiler |
17 | @ "gcc_native" GCC Native |
45 | @ "gcc_native" GCC Native |
18 | @ "icc_native" ICC Native |
46 | @ "icc_native" ICC Native |
19 | @ "suncc_native" Sun Studio C Compiler |
47 | @ "suncc_native" Sun Studio C Compiler |
20 | ! [ARCH=amd64|ARCH=ia32|ARCH=ia32xen] COMPILER (choice) |
48 | ! [ARCH=amd64|ARCH=ia32|ARCH=ia32xen] COMPILER (choice) |
21 | 49 | ||
22 | # Compiler |
50 | # Compiler |
23 | @ "gcc_cross" GCC Cross-compiler |
51 | @ "gcc_cross" GCC Cross-compiler |
24 | @ "gcc_native" GCC Native |
52 | @ "gcc_native" GCC Native |
25 | @ "icc_native" ICC Native |
53 | @ "icc_native" ICC Native |
26 | ! [ARCH=ia64] COMPILER (choice) |
54 | ! [ARCH=ia64] COMPILER (choice) |
27 | 55 | ||
28 | # Compiler |
56 | # Compiler |
29 | @ "gcc_cross" GCC Cross-compiler |
57 | @ "gcc_cross" GCC Cross-compiler |
30 | @ "gcc_native" GCC Native |
58 | @ "gcc_native" GCC Native |
31 | @ "suncc_native" Sun Studio C Compiler |
59 | @ "suncc_native" Sun Studio C Compiler |
32 | ! [ARCH=sparc64] COMPILER (choice) |
60 | ! [ARCH=sparc64] COMPILER (choice) |
33 | 61 | ||
34 | # Compiler |
62 | # Compiler |
35 | @ "gcc_cross" GCC Cross-compiler |
63 | @ "gcc_cross" GCC Cross-compiler |
36 | @ "gcc_native" GCC Native |
64 | @ "gcc_native" GCC Native |
37 | ! [ARCH=arm32|ARCH=mips32|ARCH=ppc32|ARCH=ppc64] COMPILER (choice) |
65 | ! [ARCH=arm32|ARCH=mips32|ARCH=ppc32|ARCH=ppc64] COMPILER (choice) |
38 | 66 | ||
39 | # Start AP processors by the loader |
67 | # Start AP processors by the loader |
40 | ! [ARCH=sparc64] CONFIG_SMP (y/n) |
68 | ! [ARCH=sparc64] CONFIG_SMP (y/n) |
41 | 69 | ||
42 | # Debug bootloader |
70 | # Debug bootloader |
43 | ! [ARCH=ppc32] CONFIG_DEBUG (n/y) |
71 | ! [ARCH=ppc32] CONFIG_DEBUG (n/y) |
44 | 72 | ||
45 | # Use Block Address Translation |
73 | # Use Block Address Translation |
46 | ! [ARCH=ppc32] CONFIG_BAT (y/n) |
74 | ! [ARCH=ppc32] CONFIG_BAT (y/n) |
47 | 75 | ||
48 | # Target image |
76 | # Target image |
49 | @ "binary" Binary image (MSIM) |
77 | @ "binary" Binary image (MSIM) |
50 | @ "ecoff" Ecoff image (GXEmul) |
78 | @ "ecoff" Ecoff image (GXEmul) |
51 | ! [ARCH=mips32] IMAGE (choice) |
79 | ! [ARCH=mips32] IMAGE (choice) |
52 | 80 | ||
53 | 81 |