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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Martin Decky |
2 | * Copyright (c) 2005 Martin Decky |
3 | * Copyright (c) 2006 Jakub Jermar |
3 | * Copyright (c) 2006 Jakub Jermar |
4 | * All rights reserved. |
4 | * All rights reserved. |
5 | * |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
8 | * are met: |
9 | * |
9 | * |
10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
17 | * |
17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | */ |
28 | */ |
29 | 29 | ||
30 | /** |
30 | /** |
31 | * @file |
31 | * @file |
32 | * @brief Architecture dependent parts of OpenFirmware interface. |
32 | * @brief Architecture dependent parts of OpenFirmware interface. |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <ofwarch.h> |
35 | #include <ofwarch.h> |
36 | #include <ofw.h> |
36 | #include <ofw.h> |
37 | #include <printf.h> |
37 | #include <printf.h> |
38 | #include <string.h> |
38 | #include <string.h> |
39 | #include <register.h> |
39 | #include <register.h> |
40 | #include "main.h" |
40 | #include "main.h" |
41 | #include "asm.h" |
41 | #include "asm.h" |
42 | 42 | ||
43 | /* these tho variables will be set by the detect_subarchitecture function */ |
43 | /* these tho variables will be set by the detect_subarchitecture function */ |
44 | extern uint8_t subarchitecture; |
44 | extern uint8_t subarchitecture; |
45 | extern uint16_t mid_mask; |
45 | extern uint16_t mid_mask; |
46 | 46 | ||
47 | void write(const char *str, const int len) |
47 | void write(const char *str, const int len) |
48 | { |
48 | { |
49 | int i; |
49 | int i; |
50 | 50 | ||
51 | for (i = 0; i < len; i++) { |
51 | for (i = 0; i < len; i++) { |
52 | if (str[i] == '\n') |
52 | if (str[i] == '\n') |
53 | ofw_write("\r", 1); |
53 | ofw_write("\r", 1); |
54 | ofw_write(&str[i], 1); |
54 | ofw_write(&str[i], 1); |
55 | } |
55 | } |
56 | } |
56 | } |
57 | 57 | ||
58 | int ofw_translate_failed(ofw_arg_t flag) |
58 | int ofw_translate_failed(ofw_arg_t flag) |
59 | { |
59 | { |
60 | return flag != -1; |
60 | return flag != -1; |
61 | } |
61 | } |
62 | 62 | ||
63 | /** |
63 | /** |
64 | * Starts all CPUs represented by following siblings of the given node, |
64 | * Starts all CPUs represented by following siblings of the given node, |
65 | * except for the current CPU. |
65 | * except for the current CPU. |
66 | * |
66 | * |
67 | * @param child The first child of the OFW tree node whose children |
67 | * @param child The first child of the OFW tree node whose children |
68 | * represent CPUs to be woken up. |
68 | * represent CPUs to be woken up. |
69 | * @param current_mid MID of the current CPU, the current CPU will |
69 | * @param current_mid MID of the current CPU, the current CPU will |
70 | * (of course) not be woken up. |
70 | * (of course) not be woken up. |
71 | * @return Number of CPUs which have the same parent node as |
71 | * @return Number of CPUs which have the same parent node as |
72 | * "child". |
72 | * "child". |
73 | */ |
73 | */ |
74 | static int wake_cpus_in_node(phandle child, uint64_t current_mid) |
74 | static int wake_cpus_in_node(phandle child, uint64_t current_mid) |
75 | { |
75 | { |
76 | int cpus; |
76 | int cpus; |
77 | char type_name[BUF_SIZE]; |
77 | char type_name[BUF_SIZE]; |
78 | 78 | ||
79 | for (cpus = 0; child != 0 && child != -1; |
79 | for (cpus = 0; child != 0 && child != -1; |
80 | child = ofw_get_peer_node(child), cpus++) { |
80 | child = ofw_get_peer_node(child), cpus++) { |
81 | if (ofw_get_property(child, "device_type", type_name, |
81 | if (ofw_get_property(child, "device_type", type_name, |
82 | sizeof(type_name)) > 0) { |
82 | sizeof(type_name)) > 0) { |
83 | if (strcmp(type_name, "cpu") == 0) { |
83 | if (strcmp(type_name, "cpu") == 0) { |
84 | uint32_t mid; |
84 | uint32_t mid; |
85 | 85 | ||
86 | /* |
86 | /* |
87 | * "upa-portid" for US, "portid" for US-III, |
87 | * "upa-portid" for US, "portid" for US-III, |
88 | * "cpuid" for US-IV |
88 | * "cpuid" for US-IV |
89 | */ |
89 | */ |
90 | if (ofw_get_property( |
90 | if (ofw_get_property( |
91 | child, "upa-portid", |
91 | child, "upa-portid", |
92 | &mid, sizeof(mid)) <= 0 |
92 | &mid, sizeof(mid)) <= 0 |
93 | && ofw_get_property(child, "portid", |
93 | && ofw_get_property(child, "portid", |
94 | &mid, sizeof(mid)) <= 0 |
94 | &mid, sizeof(mid)) <= 0 |
95 | && ofw_get_property(child, "cpuid", |
95 | && ofw_get_property(child, "cpuid", |
96 | &mid, sizeof(mid)) <= 0) |
96 | &mid, sizeof(mid)) <= 0) |
97 | continue; |
97 | continue; |
98 | 98 | ||
99 | if (current_mid != mid) { |
99 | if (current_mid != mid) { |
100 | /* |
100 | /* |
101 | * Start secondary processor. |
101 | * Start secondary processor. |
102 | */ |
102 | */ |
103 | (void) ofw_call("SUNW,start-cpu", 3, 1, |
103 | (void) ofw_call("SUNW,start-cpu", 3, 1, |
104 | NULL, child, KERNEL_VIRTUAL_ADDRESS, |
104 | NULL, child, KERNEL_VIRTUAL_ADDRESS, |
105 | bootinfo.physmem_start | |
105 | bootinfo.physmem_start | |
106 | AP_PROCESSOR); |
106 | AP_PROCESSOR); |
107 | } |
107 | } |
108 | } |
108 | } |
109 | } |
109 | } |
110 | } |
110 | } |
111 | 111 | ||
112 | return cpus; |
112 | return cpus; |
113 | } |
113 | } |
114 | 114 | ||
115 | /** |
115 | /** |
116 | * Finds out the current CPU's MID and wakes up all AP processors. |
116 | * Finds out the current CPU's MID and wakes up all AP processors. |
117 | */ |
117 | */ |
118 | int ofw_cpu(void) |
118 | int ofw_cpu(void) |
119 | { |
119 | { |
120 | int cpus; |
120 | int cpus; |
121 | phandle node; |
121 | phandle node; |
122 | phandle subnode; |
122 | phandle subnode; |
123 | phandle cpus_parent; |
123 | phandle cpus_parent; |
124 | phandle cmp; |
124 | phandle cmp; |
125 | char name[BUF_SIZE]; |
125 | char name[BUF_SIZE]; |
126 | 126 | ||
127 | /* get the current CPU MID */ |
127 | /* get the current CPU MID */ |
128 | uint64_t current_mid; |
128 | uint64_t current_mid; |
129 | 129 | ||
130 | asm volatile ("ldxa [%1] %2, %0\n" |
130 | asm volatile ("ldxa [%1] %2, %0\n" |
131 | : "=r" (current_mid) |
131 | : "=r" (current_mid) |
132 | : "r" (0), "i" (ASI_ICBUS_CONFIG)); |
132 | : "r" (0), "i" (ASI_ICBUS_CONFIG)); |
133 | current_mid >>= ICBUS_CONFIG_MID_SHIFT; |
133 | current_mid >>= ICBUS_CONFIG_MID_SHIFT; |
134 | 134 | ||
135 | current_mid &= mid_mask; |
135 | current_mid &= mid_mask; |
136 | 136 | ||
137 | /* wake up CPUs */ |
137 | /* wake up CPUs */ |
138 | 138 | ||
139 | cpus_parent = ofw_find_device("/ssm@0,0"); |
139 | cpus_parent = ofw_find_device("/ssm@0,0"); |
140 | if (cpus_parent == 0 || cpus_parent == -1) { |
140 | if (cpus_parent == 0 || cpus_parent == -1) { |
141 | cpus_parent = ofw_find_device("/"); |
141 | cpus_parent = ofw_find_device("/"); |
142 | } |
142 | } |
143 | 143 | ||
144 | node = ofw_get_child_node(cpus_parent); |
144 | node = ofw_get_child_node(cpus_parent); |
145 | cpus = wake_cpus_in_node(node, current_mid); |
145 | cpus = wake_cpus_in_node(node, current_mid); |
146 | while (node != 0 && node != -1) { |
146 | while (node != 0 && node != -1) { |
147 | if (ofw_get_property(node, "name", name, |
147 | if (ofw_get_property(node, "name", name, |
148 | sizeof(name)) > 0) { |
148 | sizeof(name)) > 0) { |
149 | if (strcmp(name, "cmp") == 0) { |
149 | if (strcmp(name, "cmp") == 0) { |
150 | subnode = ofw_get_child_node(node); |
150 | subnode = ofw_get_child_node(node); |
151 | cpus += wake_cpus_in_node(subnode, |
151 | cpus += wake_cpus_in_node(subnode, |
152 | current_mid); |
152 | current_mid); |
153 | } |
153 | } |
154 | } |
154 | } |
155 | node = ofw_get_peer_node(node); |
155 | node = ofw_get_peer_node(node); |
156 | } |
156 | } |
157 | 157 | ||
158 | return cpus; |
158 | return cpus; |
159 | 159 | ||
160 | } |
160 | } |
161 | 161 | ||
162 | /** Get physical memory starting address. |
162 | /** Get physical memory starting address. |
163 | * |
163 | * |
164 | * @param start Pointer to variable where the physical memory starting |
164 | * @param start Pointer to variable where the physical memory starting |
165 | * address will be stored. |
165 | * address will be stored. |
166 | * |
166 | * |
167 | * @return Non-zero on succes, zero on failure. |
167 | * @return Non-zero on succes, zero on failure. |
168 | */ |
168 | */ |
169 | int ofw_get_physmem_start(uintptr_t *start) |
169 | int ofw_get_physmem_start(uintptr_t *start) |
170 | { |
170 | { |
171 | uint32_t memreg[4]; |
171 | uint32_t memreg[4]; |
172 | 172 | ||
173 | if (ofw_get_property(ofw_memory, "reg", &memreg, sizeof(memreg)) <= 0) |
173 | if (ofw_get_property(ofw_memory, "reg", &memreg, sizeof(memreg)) <= 0) |
174 | return 0; |
174 | return 0; |
175 | 175 | ||
176 | *start = (((uint64_t) memreg[0]) << 32) | memreg[1]; |
176 | *start = (((uint64_t) memreg[0]) << 32) | memreg[1]; |
177 | return 1; |
177 | return 1; |
178 | } |
178 | } |
179 | 179 | ||
180 | 180 |