Rev 4614 | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 4614 | Rev 4638 | ||
---|---|---|---|
1 | # |
1 | # |
2 | # Copyright (c) 2005 Jakub Jermar |
2 | # Copyright (c) 2005 Jakub Jermar |
3 | # Copyright (c) 2008 Pavel Rimsky |
3 | # Copyright (c) 2008 Pavel Rimsky |
4 | # All rights reserved. |
4 | # All rights reserved. |
5 | # |
5 | # |
6 | # Redistribution and use in source and binary forms, with or without |
6 | # Redistribution and use in source and binary forms, with or without |
7 | # modification, are permitted provided that the following conditions |
7 | # modification, are permitted provided that the following conditions |
8 | # are met: |
8 | # are met: |
9 | # |
9 | # |
10 | # - Redistributions of source code must retain the above copyright |
10 | # - Redistributions of source code must retain the above copyright |
11 | # notice, this list of conditions and the following disclaimer. |
11 | # notice, this list of conditions and the following disclaimer. |
12 | # - Redistributions in binary form must reproduce the above copyright |
12 | # - Redistributions in binary form must reproduce the above copyright |
13 | # notice, this list of conditions and the following disclaimer in the |
13 | # notice, this list of conditions and the following disclaimer in the |
14 | # documentation and/or other materials provided with the distribution. |
14 | # documentation and/or other materials provided with the distribution. |
15 | # - The name of the author may not be used to endorse or promote products |
15 | # - The name of the author may not be used to endorse or promote products |
16 | # derived from this software without specific prior written permission. |
16 | # derived from this software without specific prior written permission. |
17 | # |
17 | # |
18 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | # |
28 | # |
29 | 29 | ||
30 | #include <arch/arch.h> |
30 | #include <arch/arch.h> |
31 | #include <arch/stack.h> |
31 | #include <arch/stack.h> |
32 | #include <arch/context_offset.h> |
32 | #include <arch/context_offset.h> |
33 | #include <arch/sun4v/regdef.h> |
33 | #include <arch/sun4v/regdef.h> |
34 | #include <arch/sun4v/hypercall.h> |
34 | #include <arch/sun4v/hypercall.h> |
35 | #include <arch/sun4v/arch.h> |
35 | #include <arch/sun4v/arch.h> |
36 | #include <arch/sun4v/cpu.h> |
36 | #include <arch/sun4v/cpu.h> |
37 | #include <arch/mm/pagesize.h> |
37 | #include <arch/mm/pagesize.h> |
38 | #include <arch/mm/sun4v/tte.h> |
38 | #include <arch/mm/sun4v/tte.h> |
39 | #include <arch/mm/sun4v/mmu.h> |
39 | #include <arch/mm/sun4v/mmu.h> |
40 | #include <arch/mm/sun4v/tlb.h> |
40 | #include <arch/mm/sun4v/tlb.h> |
41 | 41 | ||
42 | .register %g2, #scratch |
42 | .register %g2, #scratch |
43 | .register %g3, #scratch |
43 | .register %g3, #scratch |
44 | 44 | ||
45 | .section K_TEXT_START, "ax" |
45 | .section K_TEXT_START, "ax" |
46 | 46 | ||
47 | #define BSP_FLAG 1 |
47 | #define BSP_FLAG 1 |
48 | #define PHYSMEM_ADDR_SIZE 56 |
48 | #define PHYSMEM_ADDR_SIZE 56 |
49 | 49 | ||
50 | /* |
50 | /* |
51 | * Flags set in the TTE data entry mapping the kernel. |
51 | * Flags set in the TTE data entry mapping the kernel. |
52 | */ |
52 | */ |
53 | #ifdef CONFIG_VIRT_IDX_DCACHE |
53 | #ifdef CONFIG_VIRT_IDX_DCACHE |
54 | #define TTE_FLAGS \ |
54 | #define TTE_FLAGS \ |
55 | (1 << TTE_V_SHIFT) \ |
55 | (1 << TTE_V_SHIFT) \ |
56 | | (1 << TTE_EP_SHIFT) \ |
56 | | (1 << TTE_EP_SHIFT) \ |
57 | | (1 << TTE_CP_SHIFT) \ |
57 | | (1 << TTE_CP_SHIFT) \ |
58 | | (1 << TTE_CV_SHIFT) \ |
58 | | (1 << TTE_CV_SHIFT) \ |
59 | | (1 << TTE_P_SHIFT) \ |
59 | | (1 << TTE_P_SHIFT) \ |
60 | | (1 << TTE_W_SHIFT) |
60 | | (1 << TTE_W_SHIFT) |
61 | #else |
61 | #else |
62 | #define TTE_FLAGS \ |
62 | #define TTE_FLAGS \ |
63 | (1 << TTE_V_SHIFT) \ |
63 | (1 << TTE_V_SHIFT) \ |
64 | | (1 << TTE_EP_SHIFT) \ |
64 | | (1 << TTE_EP_SHIFT) \ |
65 | | (1 << TTE_CP_SHIFT) \ |
65 | | (1 << TTE_CP_SHIFT) \ |
66 | | (1 << TTE_P_SHIFT) \ |
66 | | (1 << TTE_P_SHIFT) \ |
67 | | (1 << TTE_W_SHIFT) |
67 | | (1 << TTE_W_SHIFT) |
68 | #endif |
68 | #endif |
69 | 69 | ||
70 | 70 | ||
71 | /* |
71 | /* |
72 | * Fills a register with a TTE Data item. The item will map the given virtual |
72 | * Fills a register with a TTE Data item. The item will map the given virtual |
73 | * address to a real address which will be computed by adding the starting |
73 | * address to a real address which will be computed by adding the starting |
74 | * address of the physical memory to the virtual address. |
74 | * address of the physical memory to the virtual address. |
75 | * |
75 | * |
76 | * parameters: |
76 | * parameters: |
77 | * addr: virtual address to be mapped |
77 | * addr: virtual address to be mapped |
78 | * rphysmem_start: register containing the starting address of the |
78 | * rphysmem_start: register containing the starting address of the |
79 | * physical memory |
79 | * physical memory |
80 | * rtmp1: a register to be used as temporary |
80 | * rtmp1: a register to be used as temporary |
81 | * rtmp2: a register to be used as temporary |
81 | * rtmp2: a register to be used as temporary |
82 | * rd: register where the result will be saved |
82 | * rd: register where the result will be saved |
83 | */ |
83 | */ |
84 | #define TTE_DATA(addr, rphysmem_start, rtmp1, rtmp2, rd) \ |
84 | #define TTE_DATA(addr, rphysmem_start, rtmp1, rtmp2, rd) \ |
85 | setx TTE_FLAGS | PAGESIZE_4M, rtmp1, rd; \ |
85 | setx TTE_FLAGS | PAGESIZE_4M, rtmp1, rd; \ |
86 | add rd, rphysmem_start, rd; \ |
86 | add rd, rphysmem_start, rd; \ |
87 | setx (addr), rtmp1, rtmp2; \ |
87 | setx (addr), rtmp1, rtmp2; \ |
88 | add rd, rtmp2, rd; |
88 | add rd, rtmp2, rd; |
89 | 89 | ||
90 | /* |
90 | /* |
91 | * Here is where the kernel is passed control from the boot loader. |
91 | * Here is where the kernel is passed control from the boot loader. |
92 | * |
92 | * |
93 | * The registers are expected to be in this state: |
93 | * The registers are expected to be in this state: |
94 | * - %o0 starting address of physical memory + bootstrap processor flag |
94 | * - %o0 starting address of physical memory + bootstrap processor flag |
95 | * bits 63...1: physical memory starting address / 2 |
95 | * bits 63...1: physical memory starting address / 2 |
96 | * bit 0: non-zero on BSP processor, zero on AP processors |
96 | * bit 0: non-zero on BSP processor, zero on AP processors |
97 | * - %o1 bootinfo structure address (BSP only) |
97 | * - %o1 bootinfo structure address (BSP only) |
98 | * - %o2 bootinfo structure size (BSP only) |
98 | * - %o2 bootinfo structure size (BSP only) |
99 | * |
99 | * |
100 | * Moreover, we depend on boot having established the following environment: |
100 | * Moreover, we depend on boot having established the following environment: |
101 | * - TLBs are on |
101 | * - TLBs are on |
102 | * - identity mapping for the kernel image |
102 | * - identity mapping for the kernel image |
103 | */ |
103 | */ |
104 | .global kernel_image_start |
104 | .global kernel_image_start |
105 | kernel_image_start: |
105 | kernel_image_start: |
106 | mov BSP_FLAG, %l0 |
106 | mov BSP_FLAG, %l0 |
107 | and %o0, %l0, %l7 ! l7 <= bootstrap processor? |
107 | and %o0, %l0, %l7 ! l7 <= bootstrap processor? |
108 | andn %o0, %l0, %l6 ! l6 <= start of physical memory |
108 | andn %o0, %l0, %l6 ! l6 <= start of physical memory |
109 | or %o1, %g0, %l1 |
109 | or %o1, %g0, %l1 |
110 | or %o2, %g0, %l2 |
110 | or %o2, %g0, %l2 |
111 | 111 | ||
112 | ! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base. |
112 | ! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base. |
113 | srlx %l6, 13, %l5 |
113 | srlx %l6, 13, %l5 |
114 | 114 | ||
115 | ! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13] |
115 | ! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13] |
116 | sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5 |
116 | sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5 |
117 | srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5 |
117 | srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5 |
118 | 118 | ||
119 | /* |
119 | /* |
120 | * Setup basic runtime environment. |
120 | * Setup basic runtime environment. |
121 | */ |
121 | */ |
122 | wrpr %g0, NWINDOWS - 2, %cansave ! set maximum saveable windows |
122 | wrpr %g0, NWINDOWS - 2, %cansave ! set maximum saveable windows |
123 | wrpr %g0, 0, %canrestore ! get rid of windows we will |
123 | wrpr %g0, 0, %canrestore ! get rid of windows we will |
124 | ! never need again |
124 | ! never need again |
125 | wrpr %g0, 0, %otherwin ! make sure the window state is |
125 | wrpr %g0, 0, %otherwin ! make sure the window state is |
126 | ! consistent |
126 | ! consistent |
127 | wrpr %g0, NWINDOWS - 1, %cleanwin ! prevent needless clean_window |
127 | wrpr %g0, NWINDOWS - 1, %cleanwin ! prevent needless clean_window |
128 | ! traps for kernel |
128 | ! traps for kernel |
129 | 129 | ||
130 | wrpr %g0, 0, %wstate ! use default spill/fill trap |
130 | wrpr %g0, 0, %wstate ! use default spill/fill trap |
131 | 131 | ||
132 | wrpr %g0, 0, %tl ! TL = 0, primary context |
132 | wrpr %g0, 0, %tl ! TL = 0, primary context |
133 | ! register is used |
133 | ! register is used |
- | 134 | wrpr %g0, 0, %gl |
|
134 | 135 | ||
135 | wrpr %g0, PSTATE_PRIV_BIT, %pstate ! disable interrupts and disable |
136 | wrpr %g0, PSTATE_PRIV_BIT, %pstate ! disable interrupts and disable |
136 | ! 32-bit address masking |
137 | ! 32-bit address masking |
137 | 138 | ||
138 | wrpr %g0, 0, %pil ! intialize %pil |
139 | wrpr %g0, 0, %pil ! intialize %pil |
139 | 140 | ||
140 | /* |
141 | /* |
141 | * Switch to kernel trap table. |
142 | * Switch to kernel trap table. |
142 | */ |
143 | */ |
143 | sethi %hi(trap_table), %g1 |
144 | sethi %hi(trap_table), %g1 |
144 | wrpr %g1, %lo(trap_table), %tba |
145 | wrpr %g1, %lo(trap_table), %tba |
145 | 146 | ||
146 | /* Explicitly switch to hypervisor API 1.1. */ |
147 | /* Explicitly switch to hypervisor API 1.1. */ |
147 | mov 1, %o0 |
148 | mov 1, %o0 |
148 | mov 1, %o1 |
149 | mov 1, %o1 |
149 | mov 1, %o2 |
150 | mov 1, %o2 |
150 | mov 0, %o3 |
151 | mov 0, %o3 |
151 | mov 0, %o4 |
152 | mov 0, %o4 |
152 | mov 0, %o5 |
153 | mov 0, %o5 |
153 | ta 0xff |
154 | ta 0xff |
154 | nop |
155 | nop |
155 | 156 | ||
156 | /* |
157 | /* |
157 | * Take over the MMU. |
158 | * Take over the MMU. |
158 | */ |
159 | */ |
159 | 160 | ||
160 | ! map kernel in context 1 |
161 | ! map kernel in context 1 |
161 | set kernel_image_start, %o0 ! virt. address |
162 | set kernel_image_start, %o0 ! virt. address |
162 | set 1, %o1 ! context |
163 | set 1, %o1 ! context |
163 | TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2) ! TTE data |
164 | TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2) ! TTE data |
164 | set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3 ! MMU flags |
165 | set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3 ! MMU flags |
165 | __HYPERCALL_HYPERFAST(MMU_MAP_ADDR) |
166 | __HYPERCALL_HYPERFAST(MMU_MAP_ADDR) |
166 | 167 | ||
167 | ! switch to context 1 |
168 | ! switch to context 1 |
168 | set 1, %o0 |
169 | set 1, %o0 |
169 | set VA_PRIMARY_CONTEXT_REG, %o1 |
170 | set VA_PRIMARY_CONTEXT_REG, %o1 |
170 | stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG |
171 | stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG |
171 | 172 | ||
172 | ! demap all in context 0 |
173 | ! demap all in context 0 |
173 | set 0, %o0 ! reserved |
174 | set 0, %o0 ! reserved |
174 | set 0, %o1 ! reserved |
175 | set 0, %o1 ! reserved |
175 | set 0, %o2 ! context |
176 | set 0, %o2 ! context |
176 | set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3 ! MMU flags |
177 | set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3 ! MMU flags |
177 | __HYPERCALL_FAST(MMU_DEMAP_CTX) |
178 | __HYPERCALL_FAST(MMU_DEMAP_CTX) |
178 | 179 | ||
179 | ! install permanent mapping for kernel in context 0 |
180 | ! install permanent mapping for kernel in context 0 |
180 | set kernel_image_start, %o0 ! virtual address |
181 | set kernel_image_start, %o0 ! virtual address |
181 | set 0, %o1 ! context |
182 | set 0, %o1 ! context |
182 | TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2) ! TTE data |
183 | TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2) ! TTE data |
183 | set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3 ! MMU flags |
184 | set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3 ! MMU flags |
184 | __HYPERCALL_FAST(MMU_MAP_PERM_ADDR) |
185 | __HYPERCALL_FAST(MMU_MAP_PERM_ADDR) |
185 | 186 | ||
186 | ! switch to context 0 |
187 | ! switch to context 0 |
187 | mov 0, %o0 |
188 | mov 0, %o0 |
188 | set VA_PRIMARY_CONTEXT_REG, %o1 |
189 | set VA_PRIMARY_CONTEXT_REG, %o1 |
189 | stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG |
190 | stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG |
190 | 191 | ||
191 | ! demap all in context 1 (cleanup) |
192 | ! demap all in context 1 (cleanup) |
192 | set 0, %o0 ! reserved |
193 | set 0, %o0 ! reserved |
193 | set 0, %o1 ! reserved |
194 | set 0, %o1 ! reserved |
194 | set 1, %o2 ! context |
195 | set 1, %o2 ! context |
195 | set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3 ! MMU flags |
196 | set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3 ! MMU flags |
196 | __HYPERCALL_FAST(MMU_DEMAP_CTX) |
197 | __HYPERCALL_FAST(MMU_DEMAP_CTX) |
197 | 198 | ||
198 | /* |
199 | /* |
199 | * Set CPUID. |
200 | * Set CPUID. |
200 | */ |
201 | */ |
201 | __HYPERCALL_FAST(CPU_MYID) |
202 | __HYPERCALL_FAST(CPU_MYID) |
202 | mov SCRATCHPAD_CPUID, %g1 |
203 | mov SCRATCHPAD_CPUID, %g1 |
203 | stxa %o1, [%g1] ASI_SCRATCHPAD |
204 | stxa %o1, [%g1] ASI_SCRATCHPAD |
204 | 205 | ||
205 | /* |
206 | /* |
206 | * Set MMU fault status area for the current CPU. |
207 | * Set MMU fault status area for the current CPU. |
207 | */ |
208 | */ |
208 | set mmu_fsas, %o0 ! o0 <= addr. of fault status areas array |
209 | set mmu_fsas, %o0 ! o0 <= addr. of fault status areas array |
209 | add %o0, %l6, %o0 ! kernel address to real address |
210 | add %o0, %l6, %o0 ! kernel address to real address |
210 | mulx %o1, MMU_FSA_SIZE, %g1 ! g1 <= offset of current CPU's fault status area |
211 | mulx %o1, MMU_FSA_SIZE, %g1 ! g1 <= offset of current CPU's fault status area |
211 | add %g1, %o0, %o0 ! o0 <= FSA of the current CPU |
212 | add %g1, %o0, %o0 ! o0 <= FSA of the current CPU |
212 | mov SCRATCHPAD_MMU_FSA, %g1 |
213 | mov SCRATCHPAD_MMU_FSA, %g1 |
213 | stxa %o0, [%g1] ASI_SCRATCHPAD ! remember MMU fault status area to speed up miss handler |
214 | stxa %o0, [%g1] ASI_SCRATCHPAD ! remember MMU fault status area to speed up miss handler |
214 | __HYPERCALL_FAST(MMU_FAULT_AREA_CONF) |
215 | __HYPERCALL_FAST(MMU_FAULT_AREA_CONF) |
215 | 216 | ||
216 | ! on APs skip executing the following code |
217 | ! on APs skip executing the following code |
217 | cmp %l7, 0 |
218 | cmp %l7, 0 |
218 | be 1f |
219 | be 1f |
219 | nop |
220 | nop |
220 | 221 | ||
221 | /* |
222 | /* |
222 | * Save physmem_base for use by the mm subsystem. |
223 | * Save physmem_base for use by the mm subsystem. |
223 | * %l6 contains starting physical address |
224 | * %l6 contains starting physical address |
224 | */ |
225 | */ |
225 | sethi %hi(physmem_base), %l4 |
226 | sethi %hi(physmem_base), %l4 |
226 | stx %l6, [%l4 + %lo(physmem_base)] |
227 | stx %l6, [%l4 + %lo(physmem_base)] |
227 | 228 | ||
228 | /* |
229 | /* |
229 | * Store a template of a TTE Data entry for kernel mappings. |
230 | * Store a template of a TTE Data entry for kernel mappings. |
230 | * This template will be used from the kernel MMU miss handler. |
231 | * This template will be used from the kernel MMU miss handler. |
231 | */ |
232 | */ |
232 | !TTE_DATA(0, %l5, %g2, %g3, %g1) |
233 | !TTE_DATA(0, %l5, %g2, %g3, %g1) |
233 | setx TTE_FLAGS | PAGESIZE_8K, %g2, %g1; \ |
234 | setx TTE_FLAGS | PAGESIZE_8K, %g2, %g1; \ |
234 | add %g1, %l5, %g1; \ |
235 | add %g1, %l5, %g1; \ |
235 | set kernel_8k_tlb_data_template, %g4 |
236 | set kernel_8k_tlb_data_template, %g4 |
236 | stx %g1, [%g4] |
237 | stx %g1, [%g4] |
237 | 238 | ||
238 | /* |
239 | /* |
239 | * So far, we have not touched the stack. |
240 | * So far, we have not touched the stack. |
240 | * It is a good idea to set the kernel stack to a known state now. |
241 | * It is a good idea to set the kernel stack to a known state now. |
241 | */ |
242 | */ |
242 | sethi %hi(temporary_boot_stack), %sp |
243 | sethi %hi(temporary_boot_stack), %sp |
243 | or %sp, %lo(temporary_boot_stack), %sp |
244 | or %sp, %lo(temporary_boot_stack), %sp |
244 | sub %sp, STACK_BIAS, %sp |
245 | sub %sp, STACK_BIAS, %sp |
245 | 246 | ||
246 | or %l1, %g0, %o1 |
247 | or %l1, %g0, %o1 |
247 | or %l2, %g0, %o2 |
248 | or %l2, %g0, %o2 |
248 | sethi %hi(bootinfo), %o0 |
249 | sethi %hi(bootinfo), %o0 |
249 | call memcpy ! copy bootinfo |
250 | call memcpy ! copy bootinfo |
250 | or %o0, %lo(bootinfo), %o0 |
251 | or %o0, %lo(bootinfo), %o0 |
251 | 252 | ||
252 | call arch_pre_main |
253 | call arch_pre_main |
253 | nop |
254 | nop |
254 | 255 | ||
255 | call main_bsp |
256 | call main_bsp |
256 | nop |
257 | nop |
257 | 258 | ||
258 | /* Not reached. */ |
259 | /* Not reached. */ |
259 | 260 | ||
260 | 0: |
261 | 0: |
261 | ba 0b |
262 | ba 0b |
262 | nop |
263 | nop |
263 | 264 | ||
264 | 1: |
265 | 1: |
265 | 266 | ||
266 | #ifdef CONFIG_SMP |
267 | #ifdef CONFIG_SMP |
267 | 268 | ||
268 | /* |
269 | /* |
269 | * Configure stack for the AP. |
270 | * Configure stack for the AP. |
270 | * The AP is expected to use the stack saved |
271 | * The AP is expected to use the stack saved |
271 | * in the ctx global variable. |
272 | * in the ctx global variable. |
272 | */ |
273 | */ |
273 | 274 | ||
274 | mov 1, %o0 ! MMU enable flag |
275 | mov 1, %o0 ! MMU enable flag |
275 | set mmu_enabled, %o1 |
276 | set mmu_enabled, %o1 |
276 | mov MMU_ENABLE, %o5 ! MMU enable HV call |
277 | mov MMU_ENABLE, %o5 ! MMU enable HV call |
277 | ta 0x80 ! call HV |
278 | ta 0x80 ! call HV |
278 | 279 | ||
279 | mmu_enabled: |
280 | mmu_enabled: |
280 | 281 | ||
281 | /* |
282 | /* |
282 | * Configure stack for the AP. |
283 | * Configure stack for the AP. |
283 | * The AP is expected to use the stack saved |
284 | * The AP is expected to use the stack saved |
284 | * in the ctx global variable. |
285 | * in the ctx global variable. |
285 | */ |
286 | */ |
286 | set ctx, %g1 |
287 | set ctx, %g1 |
287 | add %g1, OFFSET_SP, %g1 |
288 | add %g1, OFFSET_SP, %g1 |
288 | ldx [%g1], %o6 |
289 | ldx [%g1], %o6 |
289 | 290 | ||
290 | call main_ap |
291 | call main_ap |
291 | nop |
292 | nop |
292 | #endif |
293 | #endif |
293 | 294 | ||
294 | /* Not reached. */ |
295 | /* Not reached. */ |
295 | 0: |
296 | 0: |
296 | ba 0b |
297 | ba 0b |
297 | nop |
298 | nop |
- | 299 | ||
- | 300 | .align 8 |
|
- | 301 | .global temp_cpu_mondo_handler |
|
- | 302 | temp_cpu_mondo_handler: |
|
- | 303 | ||
- | 304 | set 0x3c, %o0 |
|
- | 305 | set 0x15, %o5 |
|
- | 306 | ta 0x80 |
|
- | 307 | ||
- | 308 | mov 0, %o0 |
|
- | 309 | setx before_ap_boots, %g1, %o1 |
|
- | 310 | setx 0x80400000, %g1, %o2 |
|
- | 311 | add %o1, %o2, %o1 |
|
- | 312 | __HYPERCALL_FAST(MMU_ENABLE) |
|
- | 313 | ||
- | 314 | before_ap_boots: |
|
- | 315 | setx 0x80400000, %g0, %o0 |
|
- | 316 | ba kernel_image_start |
|
- | 317 | nop |
|
298 | 318 | ||
299 | .section K_DATA_START, "aw", @progbits |
319 | .section K_DATA_START, "aw", @progbits |
300 | 320 | ||
301 | #define INITIAL_STACK_SIZE 1024 |
321 | #define INITIAL_STACK_SIZE 1024 |
302 | 322 | ||
303 | .align STACK_ALIGNMENT |
323 | .align STACK_ALIGNMENT |
304 | .space INITIAL_STACK_SIZE |
324 | .space INITIAL_STACK_SIZE |
305 | .align STACK_ALIGNMENT |
325 | .align STACK_ALIGNMENT |
306 | temporary_boot_stack: |
326 | temporary_boot_stack: |
307 | .space STACK_WINDOW_SAVE_AREA_SIZE |
327 | .space STACK_WINDOW_SAVE_AREA_SIZE |
308 | 328 | ||
309 | 329 | ||
310 | .data |
330 | .data |
311 | 331 | ||
312 | .align 8 |
332 | .align 8 |
313 | .global physmem_base ! copy of the physical memory base address |
333 | .global physmem_base ! copy of the physical memory base address |
314 | physmem_base: |
334 | physmem_base: |
315 | .quad 0 |
335 | .quad 0 |
316 | 336 | ||
317 | .global kernel_8k_tlb_data_template |
337 | .global kernel_8k_tlb_data_template |
318 | kernel_8k_tlb_data_template: |
338 | kernel_8k_tlb_data_template: |
319 | .quad 0 |
339 | .quad 0 |
320 | 340 | ||
321 | /* MMU fault status areas for all CPUs */ |
341 | /* MMU fault status areas for all CPUs */ |
322 | .align MMU_FSA_ALIGNMENT |
342 | .align MMU_FSA_ALIGNMENT |
323 | .global mmu_fsas |
343 | .global mmu_fsas |
324 | mmu_fsas: |
344 | mmu_fsas: |
325 | .space (MMU_FSA_SIZE * MAX_NUM_STRANDS) |
345 | .space (MMU_FSA_SIZE * MAX_NUM_STRANDS) |
326 | 346 |