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/*
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/*
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 * Copyright (c) 2005 Jakub Jermar
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 * Copyright (c) 2005 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup sparc64
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/** @addtogroup sparc64
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 */
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 */
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#include <arch.h>
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#include <arch.h>
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#include <debug.h>
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#include <debug.h>
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#include <config.h>
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#include <config.h>
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#include <arch/trap/trap.h>
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#include <arch/trap/trap.h>
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#include <arch/console.h>
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#include <arch/console.h>
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#include <proc/thread.h>
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#include <proc/thread.h>
-
 
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#include <arch/drivers/sgcn.h>
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#include <arch/drivers/simics_output.h>
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#include <arch/drivers/simics_output.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <arch/boot/boot.h>
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#include <arch/boot/boot.h>
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#include <arch/arch.h>
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#include <arch/arch.h>
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#include <arch/asm.h>
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#include <arch/asm.h>
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#include <arch/mm/page.h>
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#include <arch/mm/page.h>
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#include <arch/stack.h>
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#include <arch/stack.h>
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#include <genarch/ofw/ofw_tree.h>
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#include <genarch/ofw/ofw_tree.h>
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#include <userspace.h>
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#include <userspace.h>
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#include <ddi/irq.h>
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#include <ddi/irq.h>
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bootinfo_t bootinfo;
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bootinfo_t bootinfo;
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/** Perform sparc64 specific initialization before main_bsp() is called. */
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/** Perform sparc64 specific initialization before main_bsp() is called. */
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void arch_pre_main(void)
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void arch_pre_main(void)
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{
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{
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    /* Copy init task info. */
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    /* Copy init task info. */
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    init.cnt = bootinfo.taskmap.count;
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    init.cnt = bootinfo.taskmap.count;
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    uint32_t i;
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    uint32_t i;
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    for (i = 0; i < bootinfo.taskmap.count; i++) {
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    for (i = 0; i < bootinfo.taskmap.count; i++) {
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        init.tasks[i].addr = (uintptr_t) bootinfo.taskmap.tasks[i].addr;
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        init.tasks[i].addr = (uintptr_t) bootinfo.taskmap.tasks[i].addr;
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        init.tasks[i].size = bootinfo.taskmap.tasks[i].size;
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        init.tasks[i].size = bootinfo.taskmap.tasks[i].size;
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    }
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    }
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    /* Copy boot allocations info. */
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    /* Copy boot allocations info. */
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    ballocs.base = bootinfo.ballocs.base;
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    ballocs.base = bootinfo.ballocs.base;
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    ballocs.size = bootinfo.ballocs.size;
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    ballocs.size = bootinfo.ballocs.size;
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    ofw_tree_init(bootinfo.ofw_root);
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    ofw_tree_init(bootinfo.ofw_root);
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}
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}
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/** Perform sparc64 specific initialization before mm is initialized. */
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/** Perform sparc64 specific initialization before mm is initialized. */
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void arch_pre_mm_init(void)
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void arch_pre_mm_init(void)
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{
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{
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    if (config.cpu_active == 1)
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    if (config.cpu_active == 1)
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        trap_init();
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        trap_init();
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}
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}
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/** Perform sparc64 specific initialization afterr mm is initialized. */
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/** Perform sparc64 specific initialization afterr mm is initialized. */
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void arch_post_mm_init(void)
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void arch_post_mm_init(void)
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{
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{
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    if (config.cpu_active == 1) {
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    if (config.cpu_active == 1) {
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        /*
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        /*
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         * We have 2^11 different interrupt vectors.
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         * We have 2^11 different interrupt vectors.
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         * But we only create 128 buckets.
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         * But we only create 128 buckets.
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         */
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         */
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        irq_init(1 << 11, 128);
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        irq_init(1 << 11, 128);
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#if defined (CONFIG_SIMICS_OUTPUT)
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#if defined (CONFIG_SIMICS_OUTPUT)
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        simics_output_init();
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        sgcn_init();
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#else
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#else
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        standalone_sparc64_console_init();
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        standalone_sparc64_console_init();
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#endif
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#endif
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    }
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    }
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}
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}
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void arch_post_cpu_init(void)
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void arch_post_cpu_init(void)
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{
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{
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}
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}
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void arch_pre_smp_init(void)
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void arch_pre_smp_init(void)
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{
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{
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}
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}
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void arch_post_smp_init(void)
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void arch_post_smp_init(void)
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{
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{
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    static thread_t *t = NULL;
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    static thread_t *t = NULL;
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    if (!t) {
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    if (!t) {
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        /*
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        /*
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             * Create thread that polls keyboard.
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             * Create thread that polls keyboard.
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             */
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             */
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        t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
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        t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
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        if (!t)
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        if (!t)
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            panic("cannot create kkbdpoll\n");
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            panic("cannot create kkbdpoll\n");
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        thread_ready(t);
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        thread_ready(t);
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    }
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    }
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}
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}
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/** Calibrate delay loop.
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/** Calibrate delay loop.
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 *
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 *
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 * On sparc64, we implement delay() by waiting for the TICK register to
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 * On sparc64, we implement delay() by waiting for the TICK register to
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 * reach a pre-computed value, as opposed to performing some pre-computed
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 * reach a pre-computed value, as opposed to performing some pre-computed
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 * amount of instructions of known duration. We set the delay_loop_const
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 * amount of instructions of known duration. We set the delay_loop_const
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 * to 1 in order to neutralize the multiplication done by delay().
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 * to 1 in order to neutralize the multiplication done by delay().
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 */
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 */
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void calibrate_delay_loop(void)
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void calibrate_delay_loop(void)
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{
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{
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    CPU->delay_loop_const = 1;
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    CPU->delay_loop_const = 1;
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}
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}
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/** Wait several microseconds.
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/** Wait several microseconds.
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 *
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 *
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 * We assume that interrupts are already disabled.
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 * We assume that interrupts are already disabled.
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 *
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 *
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 * @param t Microseconds to wait.
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 * @param t Microseconds to wait.
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 */
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 */
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void asm_delay_loop(const uint32_t usec)
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void asm_delay_loop(const uint32_t usec)
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{
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{
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    uint64_t stop = tick_read() + (uint64_t) usec * (uint64_t)
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    uint64_t stop = tick_read() + (uint64_t) usec * (uint64_t)
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        CPU->arch.clock_frequency / 1000000;
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        CPU->arch.clock_frequency / 1000000;
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    while (tick_read() < stop)
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    while (tick_read() < stop)
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        ;
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        ;
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}
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}
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/** Switch to userspace. */
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/** Switch to userspace. */
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void userspace(uspace_arg_t *kernel_uarg)
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void userspace(uspace_arg_t *kernel_uarg)
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{
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{
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    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
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    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
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        ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE
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        ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE
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        - (ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT) + STACK_BIAS),
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        - (ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT) + STACK_BIAS),
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        (uintptr_t) kernel_uarg->uspace_uarg);
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        (uintptr_t) kernel_uarg->uspace_uarg);
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    for (;;)
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    for (;;)
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        ;
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        ;
160
    /* not reached */
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    /* not reached */
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}
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}
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void arch_reboot(void)
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void arch_reboot(void)
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{
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{
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    // TODO
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    // TODO
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    while (1);
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    while (1);
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}
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}
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/** @}
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/** @}
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 */
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 */
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