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1 | /* |
1 | /* |
2 | * Copyright (c) 2008 Pavel Rimsky |
2 | * Copyright (c) 2008 Pavel Rimsky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64 |
29 | /** @addtogroup sparc64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief Macros, constants and functions needed to perform a call to the |
34 | * @brief Macros, constants and functions needed to perform a call to the |
35 | * hypervisor API. For details and terminology see this document: |
35 | * hypervisor API. For details and terminology see this document: |
36 | * UltraSPARC Virtual Machine Specification (The Hypervisor API |
36 | * UltraSPARC Virtual Machine Specification (The Hypervisor API |
37 | * specification for Logical Domains). |
37 | * specification for Logical Domains). |
38 | * |
38 | * |
39 | */ |
39 | */ |
40 | 40 | ||
41 | #ifndef KERN_sparc64_sun4v_HYPERCALL_H_ |
41 | #ifndef KERN_sparc64_sun4v_HYPERCALL_H_ |
42 | #define KERN_sparc64_sun4v_HYPERCALL_H_ |
42 | #define KERN_sparc64_sun4v_HYPERCALL_H_ |
43 | 43 | ||
44 | /* SW trap numbers for hyperfast traps */ |
44 | /* SW trap numbers for hyperfast traps */ |
45 | #define FAST_TRAP 0x80 |
45 | #define FAST_TRAP 0x80 |
46 | #define MMU_MAP_ADDR 0x83 |
46 | #define MMU_MAP_ADDR 0x83 |
47 | #define MMU_UNMAP_ADDR 0x84 |
47 | #define MMU_UNMAP_ADDR 0x84 |
48 | 48 | ||
49 | /* function codes for fast traps */ |
49 | /* function codes for fast traps */ |
50 | #define MACH_DESC 0x01 |
50 | #define MACH_DESC 0x01 |
51 | #define CPU_START 0x10 |
51 | #define CPU_START 0x10 |
52 | #define CPU_STOP 0x11 |
52 | #define CPU_STOP 0x11 |
53 | #define CPU_YIELD 0x12 |
53 | #define CPU_YIELD 0x12 |
54 | #define CPU_MYID 0x16 |
54 | #define CPU_MYID 0x16 |
55 | #define CPU_STATE 0x17 |
55 | #define CPU_STATE 0x17 |
56 | #define CPU_SET_RTBA 0x18 |
56 | #define CPU_SET_RTBA 0x18 |
57 | #define CPU_GET_RTBA 0x19 |
57 | #define CPU_GET_RTBA 0x19 |
58 | #define MMU_TSB_CTX0 0x20 |
58 | #define MMU_TSB_CTX0 0x20 |
59 | #define MMU_TSB_CTXNON0 0x21 |
59 | #define MMU_TSB_CTXNON0 0x21 |
60 | #define MMU_DEMAP_PAGE 0x22 |
60 | #define MMU_DEMAP_PAGE 0x22 |
61 | #define MMU_DEMAP_CTX 0x23 |
61 | #define MMU_DEMAP_CTX 0x23 |
62 | #define MMU_DEMAP_ALL 0x24 |
62 | #define MMU_DEMAP_ALL 0x24 |
63 | #define MMU_MAP_PERM_ADDR 0x25 |
63 | #define MMU_MAP_PERM_ADDR 0x25 |
64 | #define MMU_FAULT_AREA_CONF 0x26 |
64 | #define MMU_FAULT_AREA_CONF 0x26 |
65 | #define MMU_ENABLE 0x27 |
65 | #define MMU_ENABLE 0x27 |
66 | #define MMU_UNMAP_PERM_ADDR 0x28 |
66 | #define MMU_UNMAP_PERM_ADDR 0x28 |
67 | #define MMU_TSB_CTX0_INFO 0x29 |
67 | #define MMU_TSB_CTX0_INFO 0x29 |
68 | #define MMU_TSB_CTXNON0_INFO 0x2a |
68 | #define MMU_TSB_CTXNON0_INFO 0x2a |
69 | #define MMU_FAULT_AREA_INFO 0x2b |
69 | #define MMU_FAULT_AREA_INFO 0x2b |
70 | #define CPU_MONDO_SEND 0x42 |
70 | #define CPU_MONDO_SEND 0x42 |
71 | #define CONS_GETCHAR 0x60 |
71 | #define CONS_GETCHAR 0x60 |
72 | #define CONS_PUTCHAR 0x61 |
72 | #define CONS_PUTCHAR 0x61 |
73 | 73 | ||
- | 74 | ||
- | 75 | /* return codes */ |
|
- | 76 | #define EOK 0 /**< Successful return */ |
|
- | 77 | #define ENOCPU 1 /**< Invalid CPU id */ |
|
- | 78 | #define ENORADDR 2 /**< Invalid real address */ |
|
- | 79 | #define ENOINTR 3 /**< Invalid interrupt id */ |
|
- | 80 | #define EBADPGSZ 4 /**< Invalid pagesize encoding */ |
|
- | 81 | #define EBADTSB 5 /**< Invalid TSB description */ |
|
- | 82 | #define EINVAL 6 /**< Invalid argument */ |
|
- | 83 | #define EBADTRAP 7 /**< Invalid function number */ |
|
- | 84 | #define EBADALIGN 8 /**< Invalid address alignment */ |
|
- | 85 | #define EWOULDBLOCK 9 /**< Cannot complete operation without blocking */ |
|
- | 86 | #define ENOACCESS 10 /**< No access to specified resource */ |
|
- | 87 | #define EIO 11 /**< I/O Error */ |
|
- | 88 | #define ECPUERROR 12 /**< CPU is in error state */ |
|
- | 89 | #define ENOTSUPPORTED 13 /**< Function not supported */ |
|
- | 90 | #define ENOMAP 14 /**< No mapping found */ |
|
- | 91 | #define ETOOMANY 15 /**< Too many items specified / limit reached */ |
|
- | 92 | #define ECHANNEL 16 /**< Invalid LDC channel */ |
|
- | 93 | #define EBUSY 17 /**< Operation failed as resource is otherwise busy */ |
|
- | 94 | ||
- | 95 | ||
74 | /** |
96 | /** |
75 | * Performs a hyperfast hypervisor API call from the assembly language code. |
97 | * Performs a hyperfast hypervisor API call from the assembly language code. |
76 | * Expects the registers %o1-%o4 are properly filled with the arguments of the |
98 | * Expects the registers %o1-%o4 are properly filled with the arguments of the |
77 | * call. |
99 | * call. |
78 | * |
100 | * |
79 | * @param function_number hyperfast call function number |
101 | * @param function_number hyperfast call function number |
80 | */ |
102 | */ |
81 | #define __HYPERCALL_FAST(function_number) \ |
103 | #define __HYPERCALL_FAST(function_number) \ |
82 | set function_number, %o5; \ |
104 | set function_number, %o5; \ |
83 | ta FAST_TRAP; |
105 | ta FAST_TRAP; |
84 | 106 | ||
85 | /** |
107 | /** |
86 | * Performs a fast hypervisor API call from the assembly language code. |
108 | * Performs a fast hypervisor API call from the assembly language code. |
87 | * Expects the registers %o1-%o4 are properly filled with the arguments of the |
109 | * Expects the registers %o1-%o4 are properly filled with the arguments of the |
88 | * call. |
110 | * call. |
89 | * |
111 | * |
90 | * @param sw_trap_number software trap number |
112 | * @param sw_trap_number software trap number |
91 | */ |
113 | */ |
92 | #define __HYPERCALL_HYPERFAST(sw_trap_number) \ |
114 | #define __HYPERCALL_HYPERFAST(sw_trap_number) \ |
93 | ta (sw_trap_number); |
115 | ta (sw_trap_number); |
94 | 116 | ||
95 | 117 | ||
96 | #ifndef __ASM__ |
118 | #ifndef __ASM__ |
97 | 119 | ||
98 | /* |
120 | /* |
99 | * Macros to be used from the C-language code; __hypercall_fastN performs |
121 | * Macros to be used from the C-language code; __hypercall_fastN performs |
100 | * a fast hypervisor API call taking exactly N arguments. |
122 | * a fast hypervisor API call taking exactly N arguments. |
101 | */ |
123 | */ |
102 | 124 | ||
103 | #define __hypercall_fast0(function_number) \ |
125 | #define __hypercall_fast0(function_number) \ |
104 | __hypercall_fast(0, 0, 0, 0, 0, function_number) |
126 | __hypercall_fast(0, 0, 0, 0, 0, function_number) |
105 | #define __hypercall_fast1(function_number, p1) \ |
127 | #define __hypercall_fast1(function_number, p1) \ |
106 | __hypercall_fast(p1, 0, 0, 0, 0, function_number) |
128 | __hypercall_fast(p1, 0, 0, 0, 0, function_number) |
107 | #define __hypercall_fast2(function_number, p1, p2) \ |
129 | #define __hypercall_fast2(function_number, p1, p2) \ |
108 | __hypercall_fast(p1, p2, 0, 0, 0, function_number) |
130 | __hypercall_fast(p1, p2, 0, 0, 0, function_number) |
109 | #define __hypercall_fast3(function_number, p1, p2, p3) \ |
131 | #define __hypercall_fast3(function_number, p1, p2, p3) \ |
110 | __hypercall_fast(p1, p2, p3, 0, 0, function_number) |
132 | __hypercall_fast(p1, p2, p3, 0, 0, function_number) |
111 | #define __hypercall_fast4(function_number, p1, p2, p3, p4) \ |
133 | #define __hypercall_fast4(function_number, p1, p2, p3, p4) \ |
112 | __hypercall_fast(p1, p2, p3, p4, 0, function_number) |
134 | __hypercall_fast(p1, p2, p3, p4, 0, function_number) |
113 | #define __hypercall_fast5(function_number, p1, p2, p3, p4, p5) \ |
135 | #define __hypercall_fast5(function_number, p1, p2, p3, p4, p5) \ |
114 | __hypercall_fast(p1, p2, p3, p4, p5, function_number) |
136 | __hypercall_fast(p1, p2, p3, p4, p5, function_number) |
115 | 137 | ||
116 | /** |
138 | /** |
117 | * Performs a fast hypervisor API call. |
139 | * Performs a fast hypervisor API call which can returns a value. |
118 | * |
140 | * |
119 | * @param p1 the 1st argument of the hypervisor API call |
141 | * @param p1 the 1st argument of the hypervisor API call |
120 | * @param p2 the 2nd argument of the hypervisor API call |
142 | * @param p2 the 2nd argument of the hypervisor API call |
121 | * @param p3 the 3rd argument of the hypervisor API call |
143 | * @param p3 the 3rd argument of the hypervisor API call |
122 | * @param p4 the 4th argument of the hypervisor API call |
144 | * @param p4 the 4th argument of the hypervisor API call |
123 | * @param p5 the 5th argument of the hypervisor API call |
145 | * @param p5 the 5th argument of the hypervisor API call |
124 | * @param function_number function number of the call |
146 | * @param function_number function number of the call |
- | 147 | * @param ret1 pointer to an address where the return value |
|
- | 148 | * of the hypercall should be saved, or NULL |
|
- | 149 | * @return error status |
|
125 | */ |
150 | */ |
126 | static inline uint64_t |
151 | static inline uint64_t |
127 | __hypercall_fast(const uint64_t p1, const uint64_t p2, const uint64_t p3, |
152 | __hypercall_fast_ret1(const uint64_t p1, const uint64_t p2, const uint64_t p3, |
128 | const uint64_t p4, const uint64_t p5, const uint64_t function_number) |
153 | const uint64_t p4, const uint64_t p5, const uint64_t function_number, |
- | 154 | uint64_t * const ret1) |
|
129 | { |
155 | { |
130 | register uint64_t a6 asm("o5") = function_number; |
156 | register uint64_t a6 asm("o5") = function_number; |
131 | register uint64_t a1 asm("o0") = p1; |
157 | register uint64_t a1 asm("o0") = p1; |
132 | register uint64_t a2 asm("o1") = p2; |
158 | register uint64_t a2 asm("o1") = p2; |
133 | register uint64_t a3 asm("o2") = p3; |
159 | register uint64_t a3 asm("o2") = p3; |
134 | register uint64_t a4 asm("o3") = p4; |
160 | register uint64_t a4 asm("o3") = p4; |
135 | register uint64_t a5 asm("o4") = p5; |
161 | register uint64_t a5 asm("o4") = p5; |
136 | 162 | ||
137 | asm volatile ( |
163 | asm volatile ( |
138 | "ta %7\n" |
164 | "ta %7\n" |
139 | : "=r" (a1) |
165 | : "=r" (a1) |
140 | : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), |
166 | : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), |
141 | "i" (FAST_TRAP) |
167 | "i" (FAST_TRAP) |
142 | : "memory" |
168 | : "memory" |
143 | ); |
169 | ); |
144 | 170 | ||
- | 171 | if (ret1 != NULL) |
|
- | 172 | *ret1 = a2; |
|
145 | return a1; |
173 | return a1; |
146 | } |
174 | } |
- | 175 | ||
- | 176 | /** |
|
- | 177 | * Performs a fast hypervisor API call which return no value except for the |
|
- | 178 | * error status. |
|
- | 179 | * |
|
- | 180 | * @param p1 the 1st argument of the hypervisor API call |
|
- | 181 | * @param p2 the 2nd argument of the hypervisor API call |
|
- | 182 | * @param p3 the 3rd argument of the hypervisor API call |
|
- | 183 | * @param p4 the 4th argument of the hypervisor API call |
|
- | 184 | * @param p5 the 5th argument of the hypervisor API call |
|
- | 185 | * @param function_number function number of the call |
|
- | 186 | * @return error status |
|
- | 187 | */ |
|
- | 188 | static inline uint64_t |
|
- | 189 | __hypercall_fast(const uint64_t p1, const uint64_t p2, const uint64_t p3, |
|
- | 190 | const uint64_t p4, const uint64_t p5, const uint64_t function_number) |
|
- | 191 | { |
|
- | 192 | return __hypercall_fast_ret1(p1, p2, p3, p4, p5, function_number, |
|
- | 193 | NULL); |
|
- | 194 | } |
|
147 | 195 | ||
148 | /** |
196 | /** |
149 | * Performs a hyperfast hypervisor API call. |
197 | * Performs a hyperfast hypervisor API call. |
150 | * |
198 | * |
151 | * @param p1 the 1st argument of the hypervisor API call |
199 | * @param p1 the 1st argument of the hypervisor API call |
152 | * @param p2 the 2nd argument of the hypervisor API call |
200 | * @param p2 the 2nd argument of the hypervisor API call |
153 | * @param p3 the 3rd argument of the hypervisor API call |
201 | * @param p3 the 3rd argument of the hypervisor API call |
154 | * @param p4 the 4th argument of the hypervisor API call |
202 | * @param p4 the 4th argument of the hypervisor API call |
155 | * @param p5 the 5th argument of the hypervisor API call |
203 | * @param p5 the 5th argument of the hypervisor API call |
156 | * @param sw_trap_number software trap number |
204 | * @param sw_trap_number software trap number |
157 | */ |
205 | */ |
158 | static inline uint64_t |
206 | static inline uint64_t |
159 | __hypercall_hyperfast(const uint64_t p1, const uint64_t p2, const uint64_t p3, |
207 | __hypercall_hyperfast(const uint64_t p1, const uint64_t p2, const uint64_t p3, |
160 | const uint64_t p4, const uint64_t p5, const uint64_t sw_trap_number) |
208 | const uint64_t p4, const uint64_t p5, const uint64_t sw_trap_number) |
161 | { |
209 | { |
162 | register uint64_t a1 asm("o0") = p1; |
210 | register uint64_t a1 asm("o0") = p1; |
163 | register uint64_t a2 asm("o1") = p2; |
211 | register uint64_t a2 asm("o1") = p2; |
164 | register uint64_t a3 asm("o2") = p3; |
212 | register uint64_t a3 asm("o2") = p3; |
165 | register uint64_t a4 asm("o3") = p4; |
213 | register uint64_t a4 asm("o3") = p4; |
166 | register uint64_t a5 asm("o4") = p5; |
214 | register uint64_t a5 asm("o4") = p5; |
167 | 215 | ||
168 | asm volatile ( |
216 | asm volatile ( |
169 | "ta %6\n" |
217 | "ta %6\n" |
170 | : "=r" (a1) |
218 | : "=r" (a1) |
171 | : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), |
219 | : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), |
172 | "i" (sw_trap_number) |
220 | "i" (sw_trap_number) |
173 | : "memory" |
221 | : "memory" |
174 | ); |
222 | ); |
175 | 223 | ||
176 | return a1; |
224 | return a1; |
177 | } |
225 | } |
178 | 226 | ||
179 | #endif /* ASM */ |
227 | #endif /* ASM */ |
180 | 228 | ||
181 | #endif |
229 | #endif |
182 | 230 | ||
183 | /** @} |
231 | /** @} |
184 | */ |
232 | */ |
185 | 233 |