WebSVN – HelenOS – Diff – /branches/sparc/kernel/arch/ia64/src/start.S


#
# Copyright (c) 2005 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/register.h>
#include <arch/mm/page.h>
#include <arch/mm/asid.h>
#include <mm/asid.h>
 
#define RR_MASK (0xFFFFFFFF00000002)
#define RID_SHIFT 8
#define PS_SHIFT 2
 
#define KERNEL_TRANSLATION_I  0x0010000000000661
#define KERNEL_TRANSLATION_D  0x0010000000000661
#define KERNEL_TRANSLATION_VIO 0x0010000000000671
#define KERNEL_TRANSLATION_IO 0x00100FFFFC000671 
#define VIO_OFFSET            0x0002000000000000
 
#define IO_OFFSET             0x0001000000000000
 
 
 
.section K_TEXT_START, "ax"
 
.global kernel_image_start
 
stack0:
kernel_image_start:
	.auto
 
	mov psr.l = r0
	srlz.i
	srlz.d
 
	# Fill TR.i and TR.d using Region Register #VRN_KERNEL
 
 
	movl r8 = (VRN_KERNEL << VRN_SHIFT)
	mov r9 = rr[r8]
 
 
	movl r10 = (RR_MASK)
	and r9 = r10, r9
	movl r10 = ((RID_KERNEL << RID_SHIFT) | (KERNEL_PAGE_WIDTH << PS_SHIFT))
	or  r9 = r10, r9
 
 
	mov rr[r8] = r9
 
 
 
	movl r8 = (VRN_KERNEL << VRN_SHIFT)
	mov cr.ifa = r8
 
	
	mov r11 = cr.itir ;;
	movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT);;
	or r10 =r10 , r11  ;;
	mov cr.itir = r10;;
 
	
	movl r10 = (KERNEL_TRANSLATION_I)
	itr.i itr[r0] = r10
 
	
	movl r10 = (KERNEL_TRANSLATION_D)
	itr.d dtr[r0] = r10
 
 
	movl r7 = 1
	movl r8 = (VRN_KERNEL << VRN_SHIFT) | VIO_OFFSET
	mov cr.ifa = r8
	movl r10 = (KERNEL_TRANSLATION_VIO)
	itr.d dtr[r7] = r10
 
 
	mov r11 = cr.itir ;;
	movl r10 = ~0xfc;;
	and r10 =r10 , r11  ;;
	movl r11 = (IO_PAGE_WIDTH << PS_SHIFT);;
	or r10 =r10 , r11  ;;
	mov cr.itir = r10;;
 
 
	movl r7 = 2
	movl r8 = (VRN_KERNEL << VRN_SHIFT) | IO_OFFSET
	mov cr.ifa = r8
	movl r10 = (KERNEL_TRANSLATION_IO)
	itr.d dtr[r7] = r10
 
 
 
 
	# initialize PSR
	movl r10 = (PSR_DT_MASK | PSR_RT_MASK | PSR_IT_MASK | PSR_IC_MASK)  /* Enable paging */
	mov r9 = psr
	or r10 = r10, r9
	mov cr.ipsr = r10
	mov cr.ifs = r0
	movl r8 = paging_start
	mov cr.iip = r8
	srlz.d
	srlz.i
 
	.explicit
	/*
	 * Return From Interupt is the only the way to fill upper half word of PSR.
	 */
	rfi;;
 
.global paging_start
paging_start:
 
	/*
	 * Now we are paging.
	 */
 
	# switch to register bank 1
	bsw.1
	
	# initialize register stack
	mov ar.rsc = r0
	movl r8 = (VRN_KERNEL << VRN_SHIFT) ;;
	mov ar.bspstore = r8
	loadrs
 
	# initialize memory stack to some sane value
	movl r12 = stack0 ;;
	
	add r12 = -16, r12	/* allocate a scratch area on the stack */
 
	# initialize gp (Global Pointer) register
	movl r20 = (VRN_KERNEL << VRN_SHIFT);;
	or r20 = r20,r1;;
	movl r1 = _hardcoded_load_address
	
	/*
	 * Initialize hardcoded_* variables.
	 */
	movl r14 = _hardcoded_ktext_size
	movl r15 = _hardcoded_kdata_size
	movl r16 = _hardcoded_load_address ;;
	addl r17 = @gprel(hardcoded_ktext_size), gp
	addl r18 = @gprel(hardcoded_kdata_size), gp
	addl r19 = @gprel(hardcoded_load_address), gp
	addl r21 = @gprel(bootinfo), gp
	;;
	st8 [r17] = r14
	st8 [r18] = r15
	st8 [r19] = r16
	st8 [r21] = r20
 
	ssm (1 << 19) ;; /* Disable f32 - f127 */
	srlz.i
	srlz.d ;;
 
	br.call.sptk.many b0 = arch_pre_main
 
	movl r18 = main_bsp ;;
	mov b1 = r18 ;;
	br.call.sptk.many b0 = b1
 
 
0:
	br 0b
 

Rev 2726	Rev 3343
1	#	1	#
2	# Copyright (c) 2005 Jakub Jermar	2	# Copyright (c) 2005 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include <arch/register.h>	29	#include <arch/register.h>
30	#include <arch/mm/page.h>	30	#include <arch/mm/page.h>
31	#include <arch/mm/asid.h>	31	#include <arch/mm/asid.h>
32	#include <mm/asid.h>	32	#include <mm/asid.h>
33		33
34	#define RR_MASK (0xFFFFFFFF00000002)	34	#define RR_MASK (0xFFFFFFFF00000002)
35	#define RID_SHIFT 8	35	#define RID_SHIFT 8
36	#define PS_SHIFT 2	36	#define PS_SHIFT 2
37		37
38	#define KERNEL_TRANSLATION_I 0x0010000000000661	38	#define KERNEL_TRANSLATION_I 0x0010000000000661
39	#define KERNEL_TRANSLATION_D 0x0010000000000661	39	#define KERNEL_TRANSLATION_D 0x0010000000000661
40	#define KERNEL_TRANSLATION_VIO 0x0010000000000671	40	#define KERNEL_TRANSLATION_VIO 0x0010000000000671
41	#define KERNEL_TRANSLATION_IO 0x00100FFFFC000671	41	#define KERNEL_TRANSLATION_IO 0x00100FFFFC000671
42	#define VIO_OFFSET 0x0002000000000000	42	#define VIO_OFFSET 0x0002000000000000
43		43
44	#define IO_OFFSET 0x0001000000000000	44	#define IO_OFFSET 0x0001000000000000
45		45
46		46
47		47
48	.section K_TEXT_START, "ax"	48	.section K_TEXT_START, "ax"
49		49
50	.global kernel_image_start	50	.global kernel_image_start
51		51
52	stack0:	52	stack0:
53	kernel_image_start:	53	kernel_image_start:
54	.auto	54	.auto
55		55
56	mov psr.l = r0	56	mov psr.l = r0
57	srlz.i	57	srlz.i
58	srlz.d	58	srlz.d
59		59
60	# Fill TR.i and TR.d using Region Register #VRN_KERNEL	60	# Fill TR.i and TR.d using Region Register #VRN_KERNEL
61		61
62		62
63	movl r8 = (VRN_KERNEL << VRN_SHIFT)	63	movl r8 = (VRN_KERNEL << VRN_SHIFT)
64	mov r9 = rr[r8]	64	mov r9 = rr[r8]
65		65
66		66
67	movl r10 = (RR_MASK)	67	movl r10 = (RR_MASK)
68	and r9 = r10, r9	68	and r9 = r10, r9
69	movl r10 = ((RID_KERNEL << RID_SHIFT) \| (KERNEL_PAGE_WIDTH << PS_SHIFT))	69	movl r10 = ((RID_KERNEL << RID_SHIFT) \| (KERNEL_PAGE_WIDTH << PS_SHIFT))
70	or r9 = r10, r9	70	or r9 = r10, r9
71		71
72		72
73	mov rr[r8] = r9	73	mov rr[r8] = r9
74		74
75		75
76		76
77	movl r8 = (VRN_KERNEL << VRN_SHIFT)	77	movl r8 = (VRN_KERNEL << VRN_SHIFT)
78	mov cr.ifa = r8	78	mov cr.ifa = r8
79		79
80		80
81	mov r11 = cr.itir ;;	81	mov r11 = cr.itir ;;
82	movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT);;	82	movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT);;
83	or r10 =r10 , r11 ;;	83	or r10 =r10 , r11 ;;
84	mov cr.itir = r10;;	84	mov cr.itir = r10;;
85		85
86		86
87	movl r10 = (KERNEL_TRANSLATION_I)	87	movl r10 = (KERNEL_TRANSLATION_I)
88	itr.i itr[r0] = r10	88	itr.i itr[r0] = r10
89		89
90		90
91	movl r10 = (KERNEL_TRANSLATION_D)	91	movl r10 = (KERNEL_TRANSLATION_D)
92	itr.d dtr[r0] = r10	92	itr.d dtr[r0] = r10
93		93
94		94
95	movl r7 = 1	95	movl r7 = 1
96	movl r8 = (VRN_KERNEL << VRN_SHIFT) \| VIO_OFFSET	96	movl r8 = (VRN_KERNEL << VRN_SHIFT) \| VIO_OFFSET
97	mov cr.ifa = r8	97	mov cr.ifa = r8
98	movl r10 = (KERNEL_TRANSLATION_VIO)	98	movl r10 = (KERNEL_TRANSLATION_VIO)
99	itr.d dtr[r7] = r10	99	itr.d dtr[r7] = r10
100		100
101		101
102	mov r11 = cr.itir ;;	102	mov r11 = cr.itir ;;
103	movl r10 = ~0xfc;;	103	movl r10 = ~0xfc;;
104	and r10 =r10 , r11 ;;	104	and r10 =r10 , r11 ;;
105	movl r11 = (IO_PAGE_WIDTH << PS_SHIFT);;	105	movl r11 = (IO_PAGE_WIDTH << PS_SHIFT);;
106	or r10 =r10 , r11 ;;	106	or r10 =r10 , r11 ;;
107	mov cr.itir = r10;;	107	mov cr.itir = r10;;
108		108
109		109
110	movl r7 = 2	110	movl r7 = 2
111	movl r8 = (VRN_KERNEL << VRN_SHIFT) \| IO_OFFSET	111	movl r8 = (VRN_KERNEL << VRN_SHIFT) \| IO_OFFSET
112	mov cr.ifa = r8	112	mov cr.ifa = r8
113	movl r10 = (KERNEL_TRANSLATION_IO)	113	movl r10 = (KERNEL_TRANSLATION_IO)
114	itr.d dtr[r7] = r10	114	itr.d dtr[r7] = r10
115		115
116		116
117		117
118		118
119	# initialize PSR	119	# initialize PSR
120	movl r10 = (PSR_DT_MASK \| PSR_RT_MASK \| PSR_IT_MASK \| PSR_IC_MASK) /* Enable paging */	120	movl r10 = (PSR_DT_MASK \| PSR_RT_MASK \| PSR_IT_MASK \| PSR_IC_MASK) /* Enable paging */
121	mov r9 = psr	121	mov r9 = psr
122	or r10 = r10, r9	122	or r10 = r10, r9
123	mov cr.ipsr = r10	123	mov cr.ipsr = r10
124	mov cr.ifs = r0	124	mov cr.ifs = r0
125	movl r8 = paging_start	125	movl r8 = paging_start
126	mov cr.iip = r8	126	mov cr.iip = r8
127	srlz.d	127	srlz.d
128	srlz.i	128	srlz.i
129		129
130	.explicit	130	.explicit
131	/*	131	/*
132	* Return From Interupt is the only the way to fill upper half word of PSR.	132	* Return From Interupt is the only the way to fill upper half word of PSR.
133	*/	133	*/
134	rfi;;	134	rfi;;
135		135
136	.global paging_start	136	.global paging_start
137	paging_start:	137	paging_start:
138		138
139	/*	139	/*
140	* Now we are paging.	140	* Now we are paging.
141	*/	141	*/
142		142
143	# switch to register bank 1	143	# switch to register bank 1
144	bsw.1	144	bsw.1
145		145
146	# initialize register stack	146	# initialize register stack
147	mov ar.rsc = r0	147	mov ar.rsc = r0
148	movl r8 = (VRN_KERNEL << VRN_SHIFT) ;;	148	movl r8 = (VRN_KERNEL << VRN_SHIFT) ;;
149	mov ar.bspstore = r8	149	mov ar.bspstore = r8
150	loadrs	150	loadrs
151		151
152	# initialize memory stack to some sane value	152	# initialize memory stack to some sane value
153	movl r12 = stack0 ;;	153	movl r12 = stack0 ;;
154		154
155	add r12 = -16, r12 /* allocate a scratch area on the stack */	155	add r12 = -16, r12 /* allocate a scratch area on the stack */
156		156
157	# initialize gp (Global Pointer) register	157	# initialize gp (Global Pointer) register
158	movl r20 = (VRN_KERNEL << VRN_SHIFT);;	158	movl r20 = (VRN_KERNEL << VRN_SHIFT);;
159	or r20 = r20,r1;;	159	or r20 = r20,r1;;
160	movl r1 = _hardcoded_load_address	160	movl r1 = _hardcoded_load_address
161		161
162	/*	162	/*
163	* Initialize hardcoded_* variables.	163	* Initialize hardcoded_* variables.
164	*/	164	*/
165	movl r14 = _hardcoded_ktext_size	165	movl r14 = _hardcoded_ktext_size
166	movl r15 = _hardcoded_kdata_size	166	movl r15 = _hardcoded_kdata_size
167	movl r16 = _hardcoded_load_address ;;	167	movl r16 = _hardcoded_load_address ;;
168	addl r17 = @gprel(hardcoded_ktext_size), gp	168	addl r17 = @gprel(hardcoded_ktext_size), gp
169	addl r18 = @gprel(hardcoded_kdata_size), gp	169	addl r18 = @gprel(hardcoded_kdata_size), gp
170	addl r19 = @gprel(hardcoded_load_address), gp	170	addl r19 = @gprel(hardcoded_load_address), gp
171	addl r21 = @gprel(bootinfo), gp	171	addl r21 = @gprel(bootinfo), gp
172	;;	172	;;
173	st8 [r17] = r14	173	st8 [r17] = r14
174	st8 [r18] = r15	174	st8 [r18] = r15
175	st8 [r19] = r16	175	st8 [r19] = r16
176	st8 [r21] = r20	176	st8 [r21] = r20
177		177
178	ssm (1 << 19) ;; /* Disable f32 - f127 */	178	ssm (1 << 19) ;; /* Disable f32 - f127 */
179	srlz.i	179	srlz.i
180	srlz.d ;;	180	srlz.d ;;
181		181
182	br.call.sptk.many b0 = arch_pre_main	182	br.call.sptk.many b0 = arch_pre_main
183		183
184	movl r18 = main_bsp ;;	184	movl r18 = main_bsp ;;
185	mov b1 = r18 ;;	185	mov b1 = r18 ;;
186	br.call.sptk.many b0 = b1	186	br.call.sptk.many b0 = b1
187		187
188		188
189	0:	189	0:
190	br 0b	190	br 0b
191		191

Subversion Repositories HelenOS

(root)/branches/sparc/kernel/arch/ia64/src/start.S @ 3593 – Rev 2726 → 3343