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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Martin Decky |
2 | * Copyright (c) 2005 Martin Decky |
3 | * Copyright (c) 2006 Jakub Jermar |
3 | * Copyright (c) 2006 Jakub Jermar |
4 | * All rights reserved. |
4 | * All rights reserved. |
5 | * |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
8 | * are met: |
9 | * |
9 | * |
10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
17 | * |
17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | */ |
28 | */ |
29 | 29 | ||
30 | /** |
30 | /** |
31 | * @file |
31 | * @file |
32 | * @brief Architecture dependent parts of OpenFirmware interface. |
32 | * @brief Architecture dependent parts of OpenFirmware interface. |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <ofwarch.h> |
35 | #include <ofwarch.h> |
36 | #include <ofw.h> |
36 | #include <ofw.h> |
37 | #include <printf.h> |
37 | #include <printf.h> |
38 | #include <string.h> |
38 | #include <string.h> |
39 | #include <register.h> |
39 | #include <register.h> |
40 | #include "main.h" |
40 | #include "main.h" |
41 | #include "asm.h" |
41 | #include "asm.h" |
42 | 42 | ||
43 | void write(const char *str, const int len) |
43 | void write(const char *str, const int len) |
44 | { |
44 | { |
45 | int i; |
45 | int i; |
46 | 46 | ||
47 | for (i = 0; i < len; i++) { |
47 | for (i = 0; i < len; i++) { |
48 | if (str[i] == '\n') |
48 | if (str[i] == '\n') |
49 | ofw_write("\r", 1); |
49 | ofw_write("\r", 1); |
50 | ofw_write(&str[i], 1); |
50 | ofw_write(&str[i], 1); |
51 | } |
51 | } |
52 | } |
52 | } |
53 | 53 | ||
54 | int ofw_translate_failed(ofw_arg_t flag) |
54 | int ofw_translate_failed(ofw_arg_t flag) |
55 | { |
55 | { |
56 | return flag != -1; |
56 | return flag != -1; |
57 | } |
57 | } |
58 | 58 | ||
59 | /* |
- | |
60 | * Node among whose children the CPU nodes are located. |
- | |
61 | */ |
- | |
62 | #if defined (OPEN_BOOT) |
- | |
63 | #define CPUS_PARENT_NODE ofw_root |
- | |
64 | #elif defined (SMART_FIRMWARE) |
- | |
65 | #define CPUS_PARENT_NODE ofw_find_device("/ssm@0,0") |
- | |
66 | #endif |
- | |
67 | - | ||
68 | - | ||
69 | int ofw_cpu(void) |
59 | int ofw_cpu(void) |
70 | { |
60 | { |
71 | char type_name[BUF_SIZE]; |
61 | char type_name[BUF_SIZE]; |
72 | - | ||
73 | phandle node; |
62 | phandle node; |
- | 63 | phandle ssm; |
|
- | 64 | ||
- | 65 | ssm = ofw_find_device("/ssm@0,0"); |
|
- | 66 | if (ssm == -1) { |
|
74 | node = ofw_get_child_node(CPUS_PARENT_NODE); |
67 | node = ofw_get_child_node(ofw_root); |
- | 68 | } else { |
|
- | 69 | node = ofw_get_child_node(ssm); |
|
- | 70 | } |
|
75 | 71 | ||
76 | if (node == 0 || node == -1) { |
72 | if (node == 0 || node == -1) { |
77 | printf("Could not find any child nodes of the root node.\n"); |
73 | printf("Could not find any child nodes of the root node.\n"); |
78 | return 0; |
74 | return 0; |
79 | } |
75 | } |
80 | 76 | ||
81 | uint64_t current_mid; |
77 | uint64_t current_mid; |
82 | 78 | ||
83 | asm volatile ("ldxa [%1] %2, %0\n" |
79 | asm volatile ("ldxa [%1] %2, %0\n" |
84 | : "=r" (current_mid) |
80 | : "=r" (current_mid) |
85 | : "r" (0), "i" (ASI_UPA_CONFIG)); |
81 | : "r" (0), "i" (ASI_ICBUS_CONFIG)); |
86 | current_mid >>= UPA_CONFIG_MID_SHIFT; |
82 | current_mid >>= ICBUS_CONFIG_MID_SHIFT; |
87 | current_mid &= UPA_CONFIG_MID_MASK; |
83 | current_mid &= ICBUS_CONFIG_MID_MASK; |
88 | 84 | ||
89 | int cpus; |
85 | int cpus; |
90 | 86 | ||
91 | for (cpus = 0; node != 0 && node != -1; node = ofw_get_peer_node(node), |
87 | for (cpus = 0; node != 0 && node != -1; node = ofw_get_peer_node(node), |
92 | cpus++) { |
88 | cpus++) { |
93 | if (ofw_get_property(node, "device_type", type_name, |
89 | if (ofw_get_property(node, "device_type", type_name, |
94 | sizeof(type_name)) > 0) { |
90 | sizeof(type_name)) > 0) { |
95 | if (strcmp(type_name, "cpu") == 0) { |
91 | if (strcmp(type_name, "cpu") == 0) { |
96 | uint32_t mid; |
92 | uint32_t mid; |
97 | 93 | ||
98 | /* "upa-portid" for US, "portid" for US-III */ |
94 | /* "upa-portid" for US, "portid" for US-III */ |
99 | if (ofw_get_property( |
95 | if (ofw_get_property( |
100 | node, "upa-portid", |
96 | node, "upa-portid", |
101 | &mid, sizeof(mid)) <= 0 |
97 | &mid, sizeof(mid)) <= 0 |
102 | && ofw_get_property(node, "portid", |
98 | && ofw_get_property(node, "portid", |
103 | &mid, sizeof(mid)) <= 0) |
99 | &mid, sizeof(mid)) <= 0) |
104 | continue; |
100 | continue; |
105 | 101 | ||
106 | if (current_mid != mid) { |
102 | if (current_mid != mid) { |
107 | /* |
103 | /* |
108 | * Start secondary processor. |
104 | * Start secondary processor. |
109 | */ |
105 | */ |
110 | (void) ofw_call("SUNW,start-cpu", 3, 1, |
106 | (void) ofw_call("SUNW,start-cpu", 3, 1, |
111 | NULL, node, KERNEL_VIRTUAL_ADDRESS, |
107 | NULL, node, KERNEL_VIRTUAL_ADDRESS, |
112 | bootinfo.physmem_start | |
108 | bootinfo.physmem_start | |
113 | AP_PROCESSOR); |
109 | AP_PROCESSOR); |
114 | } |
110 | } |
115 | } |
111 | } |
116 | } |
112 | } |
117 | } |
113 | } |
118 | 114 | ||
119 | return cpus; |
115 | return cpus; |
120 | } |
116 | } |
121 | 117 | ||
122 | /** Get physical memory starting address. |
118 | /** Get physical memory starting address. |
123 | * |
119 | * |
124 | * @param start Pointer to variable where the physical memory starting |
120 | * @param start Pointer to variable where the physical memory starting |
125 | * address will be stored. |
121 | * address will be stored. |
126 | * |
122 | * |
127 | * @return Non-zero on succes, zero on failure. |
123 | * @return Non-zero on succes, zero on failure. |
128 | */ |
124 | */ |
129 | int ofw_get_physmem_start(uintptr_t *start) |
125 | int ofw_get_physmem_start(uintptr_t *start) |
130 | { |
126 | { |
131 | uint32_t memreg[4]; |
127 | uint32_t memreg[4]; |
132 | 128 | ||
133 | if (ofw_get_property(ofw_memory, "reg", &memreg, sizeof(memreg)) <= 0) |
129 | if (ofw_get_property(ofw_memory, "reg", &memreg, sizeof(memreg)) <= 0) |
134 | return 0; |
130 | return 0; |
135 | 131 | ||
136 | *start = (((uint64_t) memreg[0]) << 32) | memreg[1]; |
132 | *start = (((uint64_t) memreg[0]) << 32) | memreg[1]; |
137 | return 1; |
133 | return 1; |
138 | } |
134 | } |
139 | 135 | ||
140 | 136 |