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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia32xen |
29 | /** @addtogroup ia32xen |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <smp/smp.h> |
35 | #include <smp/smp.h> |
36 | #include <arch/smp/smp.h> |
36 | #include <arch/smp/smp.h> |
37 | #include <arch/smp/mps.h> |
37 | #include <arch/smp/mps.h> |
38 | #include <arch/smp/ap.h> |
38 | #include <arch/smp/ap.h> |
39 | #include <genarch/acpi/acpi.h> |
39 | #include <genarch/acpi/acpi.h> |
40 | #include <genarch/acpi/madt.h> |
40 | #include <genarch/acpi/madt.h> |
41 | #include <config.h> |
41 | #include <config.h> |
42 | #include <synch/waitq.h> |
42 | #include <synch/waitq.h> |
43 | #include <synch/synch.h> |
43 | #include <synch/synch.h> |
44 | #include <arch/pm.h> |
44 | #include <arch/pm.h> |
45 | #include <func.h> |
45 | #include <func.h> |
46 | #include <panic.h> |
46 | #include <panic.h> |
47 | #include <debug.h> |
47 | #include <debug.h> |
48 | #include <arch/asm.h> |
48 | #include <arch/asm.h> |
49 | #include <mm/frame.h> |
49 | #include <mm/frame.h> |
50 | #include <mm/page.h> |
50 | #include <mm/page.h> |
51 | #include <mm/slab.h> |
51 | #include <mm/slab.h> |
52 | #include <mm/as.h> |
52 | #include <mm/as.h> |
53 | #include <print.h> |
53 | #include <print.h> |
54 | #include <memstr.h> |
54 | #include <memstr.h> |
55 | 55 | ||
56 | #ifdef CONFIG_SMP |
56 | #ifdef CONFIG_SMP |
57 | 57 | ||
58 | static struct smp_config_operations *ops = NULL; |
58 | static struct smp_config_operations *ops = NULL; |
59 | 59 | ||
60 | void smp_init(void) |
60 | void smp_init(void) |
61 | { |
61 | { |
62 | uintptr_t l_apic_address, io_apic_address; |
62 | uintptr_t l_apic_address, io_apic_address; |
63 | 63 | ||
64 | if (acpi_madt) { |
64 | if (acpi_madt) { |
65 | acpi_madt_parse(); |
65 | acpi_madt_parse(); |
66 | ops = &madt_config_operations; |
66 | ops = &madt_config_operations; |
67 | } |
67 | } |
68 | if (config.cpu_count == 1) { |
68 | if (config.cpu_count == 1) { |
69 | mps_init(); |
69 | mps_init(); |
70 | ops = &mps_config_operations; |
70 | ops = &mps_config_operations; |
71 | } |
71 | } |
72 | 72 | ||
73 | l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
73 | l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
74 | if (!l_apic_address) |
74 | if (!l_apic_address) |
75 | panic("cannot allocate address for l_apic\n"); |
75 | panic("cannot allocate address for l_apic\n"); |
76 | 76 | ||
77 | io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
77 | io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA); |
78 | if (!io_apic_address) |
78 | if (!io_apic_address) |
79 | panic("cannot allocate address for io_apic\n"); |
79 | panic("cannot allocate address for io_apic\n"); |
80 | 80 | ||
81 | if (config.cpu_count > 1) { |
81 | if (config.cpu_count > 1) { |
82 | page_mapping_insert(AS_KERNEL, l_apic_address, (uintptr_t) l_apic, |
82 | page_mapping_insert(AS_KERNEL, l_apic_address, (uintptr_t) l_apic, |
83 | PAGE_NOT_CACHEABLE); |
83 | PAGE_NOT_CACHEABLE | PAGE_WRITE); |
84 | page_mapping_insert(AS_KERNEL, io_apic_address, (uintptr_t) io_apic, |
84 | page_mapping_insert(AS_KERNEL, io_apic_address, (uintptr_t) io_apic, |
85 | PAGE_NOT_CACHEABLE); |
85 | PAGE_NOT_CACHEABLE | PAGE_WRITE); |
86 | 86 | ||
87 | l_apic = (uint32_t *) l_apic_address; |
87 | l_apic = (uint32_t *) l_apic_address; |
88 | io_apic = (uint32_t *) io_apic_address; |
88 | io_apic = (uint32_t *) io_apic_address; |
89 | } |
89 | } |
90 | } |
90 | } |
91 | 91 | ||
92 | /* |
92 | /* |
93 | * Kernel thread for bringing up application processors. It becomes clear |
93 | * Kernel thread for bringing up application processors. It becomes clear |
94 | * that we need an arrangement like this (AP's being initialized by a kernel |
94 | * that we need an arrangement like this (AP's being initialized by a kernel |
95 | * thread), for a thread has its dedicated stack. (The stack used during the |
95 | * thread), for a thread has its dedicated stack. (The stack used during the |
96 | * BSP initialization (prior the very first call to scheduler()) will be used |
96 | * BSP initialization (prior the very first call to scheduler()) will be used |
97 | * as an initialization stack for each AP.) |
97 | * as an initialization stack for each AP.) |
98 | */ |
98 | */ |
99 | void kmp(void *arg) |
99 | void kmp(void *arg) |
100 | { |
100 | { |
101 | int i; |
101 | int i; |
102 | 102 | ||
103 | ASSERT(ops != NULL); |
103 | ASSERT(ops != NULL); |
104 | 104 | ||
105 | waitq_initialize(&ap_completion_wq); |
105 | waitq_initialize(&ap_completion_wq); |
106 | 106 | ||
107 | /* |
107 | /* |
108 | * We need to access data in frame 0. |
108 | * We need to access data in frame 0. |
109 | * We boldly make use of kernel address space mapping. |
109 | * We boldly make use of kernel address space mapping. |
110 | */ |
110 | */ |
111 | 111 | ||
112 | /* |
112 | /* |
113 | * Save 0xa to address 0xf of the CMOS RAM. |
113 | * Save 0xa to address 0xf of the CMOS RAM. |
114 | * BIOS will not do the POST after the INIT signal. |
114 | * BIOS will not do the POST after the INIT signal. |
115 | */ |
115 | */ |
116 | outb(0x70,0xf); |
116 | outb(0x70,0xf); |
117 | outb(0x71,0xa); |
117 | outb(0x71,0xa); |
118 | 118 | ||
119 | // pic_disable_irqs(0xffff); |
119 | // pic_disable_irqs(0xffff); |
120 | apic_init(); |
120 | apic_init(); |
121 | 121 | ||
122 | for (i = 0; i < ops->cpu_count(); i++) { |
122 | for (i = 0; i < ops->cpu_count(); i++) { |
123 | struct descriptor *gdt_new; |
123 | struct descriptor *gdt_new; |
124 | 124 | ||
125 | /* |
125 | /* |
126 | * Skip processors marked unusable. |
126 | * Skip processors marked unusable. |
127 | */ |
127 | */ |
128 | if (!ops->cpu_enabled(i)) |
128 | if (!ops->cpu_enabled(i)) |
129 | continue; |
129 | continue; |
130 | 130 | ||
131 | /* |
131 | /* |
132 | * The bootstrap processor is already up. |
132 | * The bootstrap processor is already up. |
133 | */ |
133 | */ |
134 | if (ops->cpu_bootstrap(i)) |
134 | if (ops->cpu_bootstrap(i)) |
135 | continue; |
135 | continue; |
136 | 136 | ||
137 | if (ops->cpu_apic_id(i) == l_apic_id()) { |
137 | if (ops->cpu_apic_id(i) == l_apic_id()) { |
138 | printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i); |
138 | printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i); |
139 | continue; |
139 | continue; |
140 | } |
140 | } |
141 | 141 | ||
142 | /* |
142 | /* |
143 | * Prepare new GDT for CPU in question. |
143 | * Prepare new GDT for CPU in question. |
144 | */ |
144 | */ |
145 | if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC))) |
145 | if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC))) |
146 | panic("couldn't allocate memory for GDT\n"); |
146 | panic("couldn't allocate memory for GDT\n"); |
147 | 147 | ||
148 | memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
148 | memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
149 | memsetb((uintptr_t)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0); |
149 | memsetb((uintptr_t)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0); |
150 | gdtr.base = (uintptr_t) gdt_new; |
150 | gdtr.base = (uintptr_t) gdt_new; |
151 | 151 | ||
152 | if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) { |
152 | if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) { |
153 | /* |
153 | /* |
154 | * There may be just one AP being initialized at |
154 | * There may be just one AP being initialized at |
155 | * the time. After it comes completely up, it is |
155 | * the time. After it comes completely up, it is |
156 | * supposed to wake us up. |
156 | * supposed to wake us up. |
157 | */ |
157 | */ |
158 | if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) |
158 | if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) |
159 | printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i)); |
159 | printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i)); |
160 | } else |
160 | } else |
161 | printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i)); |
161 | printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i)); |
162 | } |
162 | } |
163 | } |
163 | } |
164 | 164 | ||
165 | int smp_irq_to_pin(unsigned int irq) |
165 | int smp_irq_to_pin(unsigned int irq) |
166 | { |
166 | { |
167 | ASSERT(ops != NULL); |
167 | ASSERT(ops != NULL); |
168 | return ops->irq_to_pin(irq); |
168 | return ops->irq_to_pin(irq); |
169 | } |
169 | } |
170 | 170 | ||
171 | #endif /* CONFIG_SMP */ |
171 | #endif /* CONFIG_SMP */ |
172 | 172 | ||
173 | /** @} |
173 | /** @} |
174 | */ |
174 | */ |
175 | 175 |