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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Ondrej Palkovsky |
2 | * Copyright (c) 2006 Ondrej Palkovsky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup libcmips32 |
29 | /** @addtogroup libcmips32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | * @ingroup libcmips32eb |
33 | * @ingroup libcmips32eb |
34 | */ |
34 | */ |
35 | 35 | ||
36 | /* TLS for MIPS is described in http://www.linux-mips.org/wiki/NPTL */ |
36 | /* TLS for MIPS is described in http://www.linux-mips.org/wiki/NPTL */ |
37 | 37 | ||
38 | #ifndef LIBC_mips32_TLS_H_ |
38 | #ifndef LIBC_mips32_TLS_H_ |
39 | #define LIBC_mips32_TLS_H_ |
39 | #define LIBC_mips32_TLS_H_ |
40 | 40 | ||
41 | /* |
41 | /* |
42 | * FIXME: Note that the use of variant I contradicts the observations made in |
42 | * FIXME: Note that the use of variant I contradicts the observations made in |
43 | * the note below. Nevertheless the scheme we have used for allocating and |
43 | * the note below. Nevertheless the scheme we have used for allocating and |
44 | * deallocatin TLS corresponds to TLS variant I. |
44 | * deallocatin TLS corresponds to TLS variant I. |
45 | */ |
45 | */ |
46 | #define CONFIG_TLS_VARIANT_1 |
46 | #define CONFIG_TLS_VARIANT_1 |
47 | 47 | ||
48 | /* I did not find any specification (neither MIPS nor PowerPC), but |
48 | /* I did not find any specification (neither MIPS nor PowerPC), but |
49 | * as I found it |
49 | * as I found it |
50 | * - it uses Variant II |
50 | * - it uses Variant II |
51 | * - TCB is at Address(First TLS Block)+0x7000. |
51 | * - TCB is at Address(First TLS Block)+0x7000. |
52 | * - DTV is at Address(First TLS Block)+0x8000 |
52 | * - DTV is at Address(First TLS Block)+0x8000 |
53 | * - What would happen if the TLS data was larger then 0x7000? |
53 | * - What would happen if the TLS data was larger then 0x7000? |
54 | * - The linker never accesses DTV directly, has the second definition any |
54 | * - The linker never accesses DTV directly, has the second definition any |
55 | * sense? |
55 | * sense? |
56 | * We will make it this way: |
56 | * We will make it this way: |
57 | * - TCB is at TP-0x7000-sizeof(tcb) |
57 | * - TCB is at TP-0x7000-sizeof(tcb) |
58 | * - No assumption about DTV etc., but it will not have a fixed address |
58 | * - No assumption about DTV etc., but it will not have a fixed address |
59 | */ |
59 | */ |
60 | #define MIPS_TP_OFFSET 0x7000 |
60 | #define MIPS_TP_OFFSET 0x7000 |
61 | 61 | ||
62 | typedef struct { |
62 | typedef struct { |
63 | void *fibril_data; |
63 | void *fibril_data; |
64 | } tcb_t; |
64 | } tcb_t; |
65 | 65 | ||
66 | static inline void __tcb_set(tcb_t *tcb) |
66 | static inline void __tcb_set(tcb_t *tcb) |
67 | { |
67 | { |
68 | void *tp = tcb; |
68 | void *tp = tcb; |
69 | tp += MIPS_TP_OFFSET + sizeof(tcb_t); |
69 | tp += MIPS_TP_OFFSET + sizeof(tcb_t); |
70 | 70 | ||
71 | asm volatile ("add $27, %0, $0" : : "r"(tp)); /* Move tls to K1 */ |
71 | asm volatile ("add $27, %0, $0" : : "r"(tp)); /* Move tls to K1 */ |
72 | } |
72 | } |
73 | 73 | ||
74 | static inline tcb_t * __tcb_get(void) |
74 | static inline tcb_t * __tcb_get(void) |
75 | { |
75 | { |
76 | void * retval; |
76 | void * retval; |
77 | 77 | ||
78 | asm volatile("add %0, $27, $0" : "=r"(retval)); |
78 | asm volatile("add %0, $27, $0" : "=r"(retval)); |
79 | 79 | ||
80 | return (tcb_t *)(retval - MIPS_TP_OFFSET - sizeof(tcb_t)); |
80 | return (tcb_t *)(retval - MIPS_TP_OFFSET - sizeof(tcb_t)); |
81 | } |
81 | } |
82 | 82 | ||
83 | #endif |
83 | #endif |
84 | 84 | ||
85 | /** @} |
85 | /** @} |
86 | */ |
86 | */ |
87 | 87 |