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/*
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/*
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 * Copyright (c) 2005 Jakub Jermar
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 * Copyright (c) 2005 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup sparc64
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/** @addtogroup sparc64
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 */
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 */
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#ifndef KERN_sparc64_REGISTER_H_
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#ifndef KERN_sparc64_REGISTER_H_
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#define KERN_sparc64_REGISTER_H_
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#define KERN_sparc64_REGISTER_H_
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#include <arch/regdef.h>
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#include <arch/regdef.h>
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#include <arch/types.h>
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#include <arch/types.h>
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/** Version Register. */
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/** Version Register. */
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union ver_reg {
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union ver_reg {
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    uint64_t value;
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    uint64_t value;
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    struct {
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    struct {
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        uint16_t manuf; /**< Manufacturer code. */
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        uint16_t manuf; /**< Manufacturer code. */
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        uint16_t impl;  /**< Implementation code. */
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        uint16_t impl;  /**< Implementation code. */
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        uint8_t mask;   /**< Mask set revision. */
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        uint8_t mask;   /**< Mask set revision. */
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        unsigned : 8;
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        unsigned : 8;
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        uint8_t maxtl;
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        uint8_t maxtl;
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        unsigned : 3;
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        unsigned : 3;
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        unsigned maxwin : 5;
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        unsigned maxwin : 5;
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    } __attribute__ ((packed));
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    } __attribute__ ((packed));
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};
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};
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typedef union ver_reg ver_reg_t;
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typedef union ver_reg ver_reg_t;
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/** Processor State Register. */
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/** Processor State Register. */
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union pstate_reg {
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union pstate_reg {
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    uint64_t value;
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    uint64_t value;
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    struct {
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    struct {
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        uint64_t : 52;
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        uint64_t : 52;
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        unsigned ig : 1;    /**< Interrupt Globals. */
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        unsigned ig : 1;    /**< Interrupt Globals. */
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        unsigned mg : 1;    /**< MMU Globals. */
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        unsigned mg : 1;    /**< MMU Globals. */
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        unsigned cle : 1;   /**< Current Little Endian. */
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        unsigned cle : 1;   /**< Current Little Endian. */
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        unsigned tle : 1;   /**< Trap Little Endian. */
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        unsigned tle : 1;   /**< Trap Little Endian. */
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        unsigned mm : 2;    /**< Memory Model. */
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        unsigned mm : 2;    /**< Memory Model. */
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        unsigned red : 1;   /**< RED state. */
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        unsigned red : 1;   /**< RED state. */
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        unsigned pef : 1;   /**< Enable floating-point. */
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        unsigned pef : 1;   /**< Enable floating-point. */
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        unsigned am : 1;    /**< 32-bit Address Mask. */
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        unsigned am : 1;    /**< 32-bit Address Mask. */
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        unsigned priv : 1;  /**< Privileged Mode. */
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        unsigned priv : 1;  /**< Privileged Mode. */
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        unsigned ie : 1;    /**< Interrupt Enable. */
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        unsigned ie : 1;    /**< Interrupt Enable. */
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        unsigned ag : 1;    /**< Alternate Globals*/
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        unsigned ag : 1;    /**< Alternate Globals*/
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    } __attribute__ ((packed));
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    } __attribute__ ((packed));
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};
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};
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typedef union pstate_reg pstate_reg_t;
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typedef union pstate_reg pstate_reg_t;
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/** TICK Register. */
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/** TICK Register. */
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union tick_reg {
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union tick_reg {
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    uint64_t value;
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    uint64_t value;
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    struct {
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    struct {
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        unsigned npt : 1;   /**< Non-privileged Trap enable. */
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        unsigned npt : 1;   /**< Non-privileged Trap enable. */
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        uint64_t counter : 63;  /**< Elapsed CPU clck cycle counter. */
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        uint64_t counter : 63;  /**< Elapsed CPU clck cycle counter. */
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    } __attribute__ ((packed));
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    } __attribute__ ((packed));
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};
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};
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typedef union tick_reg tick_reg_t;
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typedef union tick_reg tick_reg_t;
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/** TICK_compare Register. */
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/** TICK_compare Register. */
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union tick_compare_reg {
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union tick_compare_reg {
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    uint64_t value;
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    uint64_t value;
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    struct {
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    struct {
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        unsigned int_dis : 1;       /**< TICK_INT interrupt disabled flag. */
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        unsigned int_dis : 1;       /**< TICK_INT interrupt disabled flag. */
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        uint64_t tick_cmpr : 63;    /**< Compare value for TICK interrupts. */
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        uint64_t tick_cmpr : 63;    /**< Compare value for TICK interrupts. */
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    } __attribute__ ((packed));
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    } __attribute__ ((packed));
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};
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};
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typedef union tick_compare_reg tick_compare_reg_t;
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typedef union tick_compare_reg tick_compare_reg_t;
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/** SOFTINT Register. */
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/** SOFTINT Register. */
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union softint_reg {
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union softint_reg {
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    uint64_t value;
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    uint64_t value;
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    struct {
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    struct {
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        uint64_t : 47;
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        uint64_t : 47;
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        unsigned stick_int : 1;
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        unsigned stick_int : 1;
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        unsigned int_level : 15;
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        unsigned int_level : 15;
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        unsigned tick_int : 1;
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        unsigned tick_int : 1;
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    } __attribute__ ((packed));
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    } __attribute__ ((packed));
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};
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};
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typedef union softint_reg softint_reg_t;
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typedef union softint_reg softint_reg_t;
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/** Floating-point Registers State Register. */
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/** Floating-point Registers State Register. */
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union fprs_reg {
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union fprs_reg {
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    uint64_t value;
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    uint64_t value;
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    struct {
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    struct {
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        uint64_t : 61;
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        uint64_t : 61;
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        unsigned fef : 1;
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        unsigned fef : 1;
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        unsigned du : 1;
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        unsigned du : 1;
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        unsigned dl : 1;
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        unsigned dl : 1;
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    } __attribute__ ((packed));
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    } __attribute__ ((packed));
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};
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};
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typedef union fprs_reg fprs_reg_t;
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typedef union fprs_reg fprs_reg_t;
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/** UPA_CONFIG register.
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 *
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 * Note that format of this register differs significantly from
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 * processor version to version. The format defined here
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 * is the common subset for all supported processor versions.
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 */
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union upa_config {
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    uint64_t value;
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    struct {
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        uint64_t : 34;
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        unsigned pcon : 8;  /**< Processor configuration. */
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        unsigned mid : 5;   /**< Module (processor) ID register. */
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        unsigned pcap : 17; /**< Processor capabilities. */
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    } __attribute__ ((packed));
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};
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typedef union upa_config upa_config_t;
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#endif
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#endif
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/** @}
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/** @}
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 */
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 */
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