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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Jakub Jermar |
2 | * Copyright (c) 2006 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64mm |
29 | /** @addtogroup sparc64mm |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #ifndef KERN_sparc64_TSB_H_ |
35 | #ifndef KERN_sparc64_TSB_H_ |
36 | #define KERN_sparc64_TSB_H_ |
36 | #define KERN_sparc64_TSB_H_ |
37 | 37 | ||
38 | /* |
38 | /* |
39 | * ITSB abd DTSB will claim 64K of memory, which |
39 | * ITSB abd DTSB will claim 64K of memory, which |
40 | * is a nice number considered that it is one of |
40 | * is a nice number considered that it is one of |
41 | * the page sizes supported by hardware, which, |
41 | * the page sizes supported by hardware, which, |
42 | * again, is nice because TSBs need to be locked |
42 | * again, is nice because TSBs need to be locked |
43 | * in TLBs - only one TLB entry will do. |
43 | * in TLBs - only one TLB entry will do. |
44 | */ |
44 | */ |
45 | #define TSB_SIZE 2 /* when changing this, change |
45 | #define TSB_SIZE 2 /* when changing this, change |
46 | * as.c as well */ |
46 | * as.c as well */ |
47 | #define ITSB_ENTRY_COUNT (512 * (1 << TSB_SIZE)) |
47 | #define ITSB_ENTRY_COUNT (512 * (1 << TSB_SIZE)) |
48 | #define DTSB_ENTRY_COUNT (512 * (1 << TSB_SIZE)) |
48 | #define DTSB_ENTRY_COUNT (512 * (1 << TSB_SIZE)) |
49 | 49 | ||
50 | #define TSB_TAG_TARGET_CONTEXT_SHIFT 48 |
50 | #define TSB_TAG_TARGET_CONTEXT_SHIFT 48 |
51 | 51 | ||
52 | #ifndef __ASM__ |
52 | #ifndef __ASM__ |
53 | 53 | ||
54 | #include <arch/mm/tte.h> |
54 | #include <arch/mm/tte.h> |
55 | #include <arch/mm/mmu.h> |
55 | #include <arch/mm/mmu.h> |
56 | #include <arch/types.h> |
56 | #include <arch/types.h> |
57 | 57 | ||
58 | /** TSB Base register. */ |
58 | /** TSB Base register. */ |
59 | typedef union tsb_base_reg { |
59 | typedef union tsb_base_reg { |
60 | uint64_t value; |
60 | uint64_t value; |
61 | struct { |
61 | struct { |
62 | uint64_t base : 51; /**< TSB base address, bits 63:13. */ |
62 | uint64_t base : 51; /**< TSB base address, bits 63:13. */ |
63 | unsigned split : 1; /**< Split vs. common TSB for 8K and 64K |
63 | unsigned split : 1; /**< Split vs. common TSB for 8K and 64K |
64 | * pages. HelenOS uses only 8K pages |
64 | * pages. HelenOS uses only 8K pages |
65 | * for user mappings, so we always set |
65 | * for user mappings, so we always set |
66 | * this to 0. |
66 | * this to 0. |
67 | */ |
67 | */ |
68 | unsigned : 9; |
68 | unsigned : 9; |
69 | unsigned size : 3; /**< TSB size. Number of entries is |
69 | unsigned size : 3; /**< TSB size. Number of entries is |
70 | * 512 * 2^size. */ |
70 | * 512 * 2^size. */ |
71 | } __attribute__ ((packed)); |
71 | } __attribute__ ((packed)); |
72 | } tsb_base_reg_t; |
72 | } tsb_base_reg_t; |
73 | 73 | ||
74 | /** Read ITSB Base register. |
74 | /** Read ITSB Base register. |
75 | * |
75 | * |
76 | * @return Content of the ITSB Base register. |
76 | * @return Content of the ITSB Base register. |
77 | */ |
77 | */ |
78 | static inline uint64_t itsb_base_read(void) |
78 | static inline uint64_t itsb_base_read(void) |
79 | { |
79 | { |
80 | return asi_u64_read(ASI_IMMU, VA_IMMU_TSB_BASE); |
80 | return asi_u64_read(ASI_IMMU, VA_IMMU_TSB_BASE); |
81 | } |
81 | } |
82 | 82 | ||
83 | /** Read DTSB Base register. |
83 | /** Read DTSB Base register. |
84 | * |
84 | * |
85 | * @return Content of the DTSB Base register. |
85 | * @return Content of the DTSB Base register. |
86 | */ |
86 | */ |
87 | static inline uint64_t dtsb_base_read(void) |
87 | static inline uint64_t dtsb_base_read(void) |
88 | { |
88 | { |
89 | return asi_u64_read(ASI_DMMU, VA_DMMU_TSB_BASE); |
89 | return asi_u64_read(ASI_DMMU, VA_DMMU_TSB_BASE); |
90 | } |
90 | } |
91 | 91 | ||
92 | /** Write ITSB Base register. |
92 | /** Write ITSB Base register. |
93 | * |
93 | * |
94 | * @param v New content of the ITSB Base register. |
94 | * @param v New content of the ITSB Base register. |
95 | */ |
95 | */ |
96 | static inline void itsb_base_write(uint64_t v) |
96 | static inline void itsb_base_write(uint64_t v) |
97 | { |
97 | { |
98 | asi_u64_write(ASI_IMMU, VA_IMMU_TSB_BASE, v); |
98 | asi_u64_write(ASI_IMMU, VA_IMMU_TSB_BASE, v); |
99 | } |
99 | } |
100 | 100 | ||
101 | /** Write DTSB Base register. |
101 | /** Write DTSB Base register. |
102 | * |
102 | * |
103 | * @param v New content of the DTSB Base register. |
103 | * @param v New content of the DTSB Base register. |
104 | */ |
104 | */ |
105 | static inline void dtsb_base_write(uint64_t v) |
105 | static inline void dtsb_base_write(uint64_t v) |
106 | { |
106 | { |
107 | asi_u64_write(ASI_DMMU, VA_DMMU_TSB_BASE, v); |
107 | asi_u64_write(ASI_DMMU, VA_DMMU_TSB_BASE, v); |
108 | } |
108 | } |
109 | 109 | ||
- | 110 | #if defined (US3) |
|
- | 111 | ||
- | 112 | /** Write DTSB Primary Extension register. |
|
- | 113 | * |
|
- | 114 | * @param v New content of the DTSB Primary Extension register. |
|
- | 115 | */ |
|
- | 116 | static inline void dtsb_primary_extension_write(uint64_t v) |
|
- | 117 | { |
|
- | 118 | asi_u64_write(ASI_DMMU, VA_DMMU_PRIMARY_EXTENSION, v); |
|
- | 119 | } |
|
- | 120 | ||
- | 121 | /** Write DTSB Secondary Extension register. |
|
- | 122 | * |
|
- | 123 | * @param v New content of the DTSB Secondary Extension register. |
|
- | 124 | */ |
|
- | 125 | static inline void dtsb_secondary_extension_write(uint64_t v) |
|
- | 126 | { |
|
- | 127 | asi_u64_write(ASI_DMMU, VA_DMMU_SECONDARY_EXTENSION, v); |
|
- | 128 | } |
|
- | 129 | ||
- | 130 | /** Write DTSB Nucleus Extension register. |
|
- | 131 | * |
|
- | 132 | * @param v New content of the DTSB Nucleus Extension register. |
|
- | 133 | */ |
|
- | 134 | static inline void dtsb_nucleus_extension_write(uint64_t v) |
|
- | 135 | { |
|
- | 136 | asi_u64_write(ASI_DMMU, VA_DMMU_NUCLEUS_EXTENSION, v); |
|
- | 137 | } |
|
- | 138 | ||
- | 139 | /** Write ITSB Primary Extension register. |
|
- | 140 | * |
|
- | 141 | * @param v New content of the ITSB Primary Extension register. |
|
- | 142 | */ |
|
- | 143 | static inline void itsb_primary_extension_write(uint64_t v) |
|
- | 144 | { |
|
- | 145 | asi_u64_write(ASI_IMMU, VA_IMMU_PRIMARY_EXTENSION, v); |
|
- | 146 | } |
|
- | 147 | ||
- | 148 | /** Write ITSB Nucleus Extension register. |
|
- | 149 | * |
|
- | 150 | * @param v New content of the ITSB Nucleus Extension register. |
|
- | 151 | */ |
|
- | 152 | static inline void itsb_nucleus_extension_write(uint64_t v) |
|
- | 153 | { |
|
- | 154 | asi_u64_write(ASI_IMMU, VA_IMMU_NUCLEUS_EXTENSION, v); |
|
- | 155 | } |
|
- | 156 | ||
- | 157 | #endif |
|
- | 158 | ||
110 | /* Forward declarations. */ |
159 | /* Forward declarations. */ |
111 | struct as; |
160 | struct as; |
112 | struct pte; |
161 | struct pte; |
113 | 162 | ||
114 | extern void tsb_invalidate(struct as *as, uintptr_t page, count_t pages); |
163 | extern void tsb_invalidate(struct as *as, uintptr_t page, count_t pages); |
115 | extern void itsb_pte_copy(struct pte *t, index_t index); |
164 | extern void itsb_pte_copy(struct pte *t, index_t index); |
116 | extern void dtsb_pte_copy(struct pte *t, index_t index, bool ro); |
165 | extern void dtsb_pte_copy(struct pte *t, index_t index, bool ro); |
117 | 166 | ||
118 | #endif /* !def __ASM__ */ |
167 | #endif /* !def __ASM__ */ |
119 | 168 | ||
120 | #endif |
169 | #endif |
121 | 170 | ||
122 | /** @} |
171 | /** @} |
123 | */ |
172 | */ |
124 | 173 |