WebSVN – HelenOS – Diff – /branches/network/kernel/arch/ppc32/src/drivers/cuda.c


/*
 * Copyright (c) 2006 Martin Decky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ppc32
 * @{
 */
/** @file
 */
 
#include <arch/drivers/cuda.h>
#include <arch/asm.h>
#include <console/console.h>
#include <console/chardev.h>
#include <arch/drivers/pic.h>
#include <sysinfo/sysinfo.h>
#include <interrupt.h>
#include <stdarg.h>
#include <ddi/device.h>
#include <string.h>
 
#define CUDA_IRQ 10
 
 
#define PACKET_ADB   0x00
#define PACKET_CUDA  0x01
 
#define CUDA_POWERDOWN  0x0a
#define CUDA_RESET      0x11
 
#define RS   0x200
#define B    (0 * RS)
#define A    (1 * RS)
#define SR   (10 * RS)
#define ACR  (11 * RS)
 
#define SR_OUT  0x10
#define TACK    0x10
#define TIP     0x20
 
#define SCANCODES  128
 
static volatile uint8_t *cuda = NULL;
static irq_t cuda_irq;                 /**< Cuda's IRQ. */
 
};
 
 
static void receive_packet(uint8_t *kind, index_t count, uint8_t data[])
{
    cuda[B] = cuda[B] & ~TIP;
    *kind = cuda[SR];
   
    index_t i;
    for (i = 0; i < count; i++)
        data[i] = cuda[SR];
   
    cuda[B] = cuda[B] | TIP;
}
 
 
static indev_t kbrd;
static indev_operations_t ops = {
    .poll = NULL
};
 
 
int cuda_get_scancode(void)
{
    if (cuda) {
        uint8_t kind;
        uint8_t data[4];
       
        receive_packet(&kind, 4, data);
       
        if ((kind == PACKET_ADB) && (data[0] == 0x40) && (data[1] == 0x2c))
            return data[2];
    }
   
    return -1;
}
 
static void cuda_irq_handler(irq_t *irq)
{
    int scan_code = cuda_get_scancode();
   
    if (scan_code != -1) {
        uint8_t scancode = (uint8_t) scan_code;
        if ((scancode & 0x80) != 0x80)
            indev_push_character(&kbrd, lchars[scancode & 0x7f]);
    }
}
 
static irq_ownership_t cuda_claim(irq_t *irq)
{
    return IRQ_ACCEPT;
}
 
void cuda_init(uintptr_t base, size_t size)
{
    cuda = (uint8_t *) hw_map(base, size);
   
    indev_initialize("cuda_kbd", &kbrd, &ops);
    stdin = &kbrd;
   
    irq_initialize(&cuda_irq);
    cuda_irq.devno = device_assign_devno();
    cuda_irq.inr = CUDA_IRQ;
    cuda_irq.claim = cuda_claim;
    cuda_irq.handler = cuda_irq_handler;
    irq_register(&cuda_irq);
   
    pic_enable_interrupt(CUDA_IRQ);
   
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.inr", NULL, CUDA_IRQ);
    sysinfo_set_item_val("kbd.address.virtual", NULL, base);
}
 
 
static void send_packet(const uint8_t kind, count_t count, ...)
{
    index_t i;
    va_list va;
   
    cuda[B] = cuda[B] | TIP;
    cuda[ACR] = cuda[ACR] | SR_OUT;
    cuda[SR] = kind;
    cuda[B] = cuda[B] & ~TIP;
   
    va_start(va, count);
   
    for (i = 0; i < count; i++) {
        cuda[ACR] = cuda[ACR] | SR_OUT;
        cuda[SR] = va_arg(va, int);
        cuda[B] = cuda[B] | TACK;
    }
   
    va_end(va);
   
    cuda[B] = cuda[B] | TIP;
}
 
 
void cpu_halt(void) {
    asm volatile (
        "b 0\n"
    );
}
 
void arch_reboot(void) {
    if (cuda)
        send_packet(PACKET_CUDA, 1, CUDA_RESET);
   
    asm volatile (
        "b 0\n"
    );
}
 
/** @}
 */
 

Rev 4153	Rev 4263
1	/*	1	/*
2	* Copyright (c) 2006 Martin Decky	2	* Copyright (c) 2006 Martin Decky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ppc32	29	/** @addtogroup ppc32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch/drivers/cuda.h>	35	#include <arch/drivers/cuda.h>
36	#include <arch/asm.h>	36	#include <arch/asm.h>
37	#include <console/console.h>	37	#include <console/console.h>
38	#include <console/chardev.h>	38	#include <console/chardev.h>
39	#include <arch/drivers/pic.h>	39	#include <arch/drivers/pic.h>
40	#include <sysinfo/sysinfo.h>	40	#include <sysinfo/sysinfo.h>
41	#include <interrupt.h>	41	#include <interrupt.h>
42	#include <stdarg.h>	42	#include <stdarg.h>
43	#include <ddi/device.h>	43	#include <ddi/device.h>
-		44	#include <string.h>
44		45
45	#define CUDA_IRQ 10	46	#define CUDA_IRQ 10
46	#define SPECIAL '?'	-
47		47
48	#define PACKET_ADB 0x00	48	#define PACKET_ADB 0x00
49	#define PACKET_CUDA 0x01	49	#define PACKET_CUDA 0x01
50		50
51	#define CUDA_POWERDOWN 0x0a	51	#define CUDA_POWERDOWN 0x0a
52	#define CUDA_RESET 0x11	52	#define CUDA_RESET 0x11
53		53
54	#define RS 0x200	54	#define RS 0x200
55	#define B (0 * RS)	55	#define B (0 * RS)
56	#define A (1 * RS)	56	#define A (1 * RS)
57	#define SR (10 * RS)	57	#define SR (10 * RS)
58	#define ACR (11 * RS)	58	#define ACR (11 * RS)
59		59
60	#define SR_OUT 0x10	60	#define SR_OUT 0x10
61	#define TACK 0x10	61	#define TACK 0x10
62	#define TIP 0x20	62	#define TIP 0x20
63		63
-		64	#define SCANCODES 128
64		65
65	static volatile uint8_t *cuda = NULL;	66	static volatile uint8_t *cuda = NULL;
66	static irq_t cuda_irq; /*< Cuda's IRQ. /	67	static irq_t cuda_irq; /*< Cuda's IRQ. /
67		68
192	};	150	};
193		151
194		-
195	static void receive_packet(uint8_t *kind, index_t count, uint8_t data[])	152	static void receive_packet(uint8_t *kind, index_t count, uint8_t data[])
196	{	153	{
197	cuda[B] = cuda[B] & ~TIP;	154	cuda[B] = cuda[B] & ~TIP;
198	*kind = cuda[SR];	155	*kind = cuda[SR];
199		156
200	index_t i;	157	index_t i;
201	for (i = 0; i < count; i++)	158	for (i = 0; i < count; i++)
202	data[i] = cuda[SR];	159	data[i] = cuda[SR];
203		160
204	cuda[B] = cuda[B] \| TIP;	161	cuda[B] = cuda[B] \| TIP;
205	}	162	}
206		163
207		-
208	static indev_t kbrd;	164	static indev_t kbrd;
209	static indev_operations_t ops = {	165	static indev_operations_t ops = {
210	.poll = NULL	166	.poll = NULL
211	};	167	};
212		168
213		-
214	int cuda_get_scancode(void)	169	int cuda_get_scancode(void)
215	{	170	{
216	if (cuda) {	171	if (cuda) {
217	uint8_t kind;	172	uint8_t kind;
218	uint8_t data[4];	173	uint8_t data[4];
219		174
220	receive_packet(&kind, 4, data);	175	receive_packet(&kind, 4, data);
221		176
222	if ((kind == PACKET_ADB) && (data[0] == 0x40) && (data[1] == 0x2c))	177	if ((kind == PACKET_ADB) && (data[0] == 0x40) && (data[1] == 0x2c))
223	return data[2];	178	return data[2];
224	}	179	}
225		180
226	return -1;	181	return -1;
227	}	182	}
228		183
229	static void cuda_irq_handler(irq_t *irq)	184	static void cuda_irq_handler(irq_t *irq)
230	{	185	{
231	int scan_code = cuda_get_scancode();	186	int scan_code = cuda_get_scancode();
232		187
233	if (scan_code != -1) {	188	if (scan_code != -1) {
234	uint8_t scancode = (uint8_t) scan_code;	189	uint8_t scancode = (uint8_t) scan_code;
235	if ((scancode & 0x80) != 0x80)	190	if ((scancode & 0x80) != 0x80)
236	indev_push_character(&kbrd, lchars[scancode & 0x7f]);	191	indev_push_character(&kbrd, lchars[scancode & 0x7f]);
237	}	192	}
238	}	193	}
239		194
240	static irq_ownership_t cuda_claim(irq_t *irq)	195	static irq_ownership_t cuda_claim(irq_t *irq)
241	{	196	{
242	return IRQ_ACCEPT;	197	return IRQ_ACCEPT;
243	}	198	}
244		199
245	void cuda_init(uintptr_t base, size_t size)	200	void cuda_init(uintptr_t base, size_t size)
246	{	201	{
247	cuda = (uint8_t *) hw_map(base, size);	202	cuda = (uint8_t *) hw_map(base, size);
248		203
249	indev_initialize("cuda_kbd", &kbrd, &ops);	204	indev_initialize("cuda_kbd", &kbrd, &ops);
250	stdin = &kbrd;	205	stdin = &kbrd;
251		206
252	irq_initialize(&cuda_irq);	207	irq_initialize(&cuda_irq);
253	cuda_irq.devno = device_assign_devno();	208	cuda_irq.devno = device_assign_devno();
254	cuda_irq.inr = CUDA_IRQ;	209	cuda_irq.inr = CUDA_IRQ;
255	cuda_irq.claim = cuda_claim;	210	cuda_irq.claim = cuda_claim;
256	cuda_irq.handler = cuda_irq_handler;	211	cuda_irq.handler = cuda_irq_handler;
257	irq_register(&cuda_irq);	212	irq_register(&cuda_irq);
258		213
259	pic_enable_interrupt(CUDA_IRQ);	214	pic_enable_interrupt(CUDA_IRQ);
260		215
261	sysinfo_set_item_val("kbd", NULL, true);	216	sysinfo_set_item_val("kbd", NULL, true);
262	sysinfo_set_item_val("kbd.inr", NULL, CUDA_IRQ);	217	sysinfo_set_item_val("kbd.inr", NULL, CUDA_IRQ);
263	sysinfo_set_item_val("kbd.address.virtual", NULL, base);	218	sysinfo_set_item_val("kbd.address.virtual", NULL, base);
264	}	219	}
265		220
266		-
267	static void send_packet(const uint8_t kind, count_t count, ...)	221	static void send_packet(const uint8_t kind, count_t count, ...)
268	{	222	{
269	index_t i;	223	index_t i;
270	va_list va;	224	va_list va;
271		225
272	cuda[B] = cuda[B] \| TIP;	226	cuda[B] = cuda[B] \| TIP;
273	cuda[ACR] = cuda[ACR] \| SR_OUT;	227	cuda[ACR] = cuda[ACR] \| SR_OUT;
274	cuda[SR] = kind;	228	cuda[SR] = kind;
275	cuda[B] = cuda[B] & ~TIP;	229	cuda[B] = cuda[B] & ~TIP;
276		230
277	va_start(va, count);	231	va_start(va, count);
278		232
279	for (i = 0; i < count; i++) {	233	for (i = 0; i < count; i++) {
280	cuda[ACR] = cuda[ACR] \| SR_OUT;	234	cuda[ACR] = cuda[ACR] \| SR_OUT;
281	cuda[SR] = va_arg(va, int);	235	cuda[SR] = va_arg(va, int);
282	cuda[B] = cuda[B] \| TACK;	236	cuda[B] = cuda[B] \| TACK;
283	}	237	}
284		238
285	va_end(va);	239	va_end(va);
286		240
287	cuda[B] = cuda[B] \| TIP;	241	cuda[B] = cuda[B] \| TIP;
288	}	242	}
289		243
290		-
291	void cpu_halt(void) {	244	void cpu_halt(void) {
292	asm volatile (	245	asm volatile (
293	"b 0\n"	246	"b 0\n"
294	);	247	);
295	}	248	}
296		249
297	void arch_reboot(void) {	250	void arch_reboot(void) {
298	if (cuda)	251	if (cuda)
299	send_packet(PACKET_CUDA, 1, CUDA_RESET);	252	send_packet(PACKET_CUDA, 1, CUDA_RESET);
300		253
301	asm volatile (	254	asm volatile (
302	"b 0\n"	255	"b 0\n"
303	);	256	);
304	}	257	}
305		258
306	/** @}	259	/** @}
307	*/	260	*/
308		261

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(root)/branches/network/kernel/arch/ppc32/src/drivers/cuda.c – Rev 4153 → 4263