WebSVN – HelenOS – Diff – /branches/network/kernel/arch/arm32/src/interrupt.c


/*
 * Copyright (c) 2007 Petr Stepan
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32
 * @{
 */
/** @file
 */
 
#include <arch/asm.h>
#include <arch/regutils.h>
#include <ddi/irq.h>
#include <arch/machine.h>
#include <interrupt.h>
 
/** Initial size of a table holding interrupt handlers. */
#define IRQ_COUNT 8
 
 
/** Disable interrupts.
 *
 * @return Old interrupt priority level.
 */
ipl_t interrupts_disable(void)
{
    ipl_t ipl = current_status_reg_read();
 
    current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT | ipl);
   
    return ipl;
}
 
/** Enable interrupts.
 *
 * @return Old interrupt priority level.
 */
ipl_t interrupts_enable(void)
{
    ipl_t ipl = current_status_reg_read();
 
    current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT);
 
    return ipl;
}
 
/** Restore interrupt priority level.
 *
 * @param ipl Saved interrupt priority level.
 */
void interrupts_restore(ipl_t ipl)
{
    current_status_reg_control_write(
        (current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) |
        (ipl & STATUS_REG_IRQ_DISABLED_BIT)
    );
}
 
/** Read interrupt priority level.
 *
 * @return Current interrupt priority level.
 */
ipl_t interrupts_read(void)
{
    return current_status_reg_read();
}
 
/** Initialize basic tables for exception dispatching
 * and starts the timer.
 */
void interrupt_init(void)
{
    irq_init(IRQ_COUNT, IRQ_COUNT);
    machine_timer_irq_start();
}
 
 
/** @}
 */
 

Subversion Repositories HelenOS

(root)/branches/network/kernel/arch/arm32/src/interrupt.c @ 4718 – Rev 2343 → 2407

Rev 2343		Rev 2407
1	/*	1	/*
2	* Copyright (c) 2007 Petr Stepan	2	* Copyright (c) 2007 Petr Stepan
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32	29	/** @addtogroup arm32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch/asm.h>	35	#include <arch/asm.h>
36	#include <arch/regutils.h>	36	#include <arch/regutils.h>
37	#include <ddi/irq.h>	37	#include <ddi/irq.h>
38	#include <arch/machine.h>	38	#include <arch/machine.h>
39	#include <interrupt.h>	39	#include <interrupt.h>
40		40
-		41	/** Initial size of a table holding interrupt handlers. */
41	#define IRQ_COUNT 8	42	#define IRQ_COUNT 8
42		43
43		44
44	/** Disable interrupts.	45	/** Disable interrupts.
45	*	46	*
46	* @return Old interrupt priority level.	47	* @return Old interrupt priority level.
47	*/	48	*/
48	ipl_t interrupts_disable(void)	49	ipl_t interrupts_disable(void)
49	{	50	{
50	ipl_t ipl = current_status_reg_read();	51	ipl_t ipl = current_status_reg_read();
51		52
52	current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT \| ipl);	53	current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT \| ipl);
53		54
54	return ipl;	55	return ipl;
55	}	56	}
56		57
57	/** Enable interrupts.	58	/** Enable interrupts.
58	*	59	*
59	* @return Old interrupt priority level.	60	* @return Old interrupt priority level.
60	*/	61	*/
61	ipl_t interrupts_enable(void)	62	ipl_t interrupts_enable(void)
62	{	63	{
63	ipl_t ipl = current_status_reg_read();	64	ipl_t ipl = current_status_reg_read();
64		65
65	current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT);	66	current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT);
66		67
67	return ipl;	68	return ipl;
68	}	69	}
69		70
70	/** Restore interrupt priority level.	71	/** Restore interrupt priority level.
71	*	72	*
72	* @param ipl Saved interrupt priority level.	73	* @param ipl Saved interrupt priority level.
73	*/	74	*/
74	void interrupts_restore(ipl_t ipl)	75	void interrupts_restore(ipl_t ipl)
75	{	76	{
76	current_status_reg_control_write(	77	current_status_reg_control_write(
77	(current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) \|	78	(current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) \|
78	(ipl & STATUS_REG_IRQ_DISABLED_BIT)	79	(ipl & STATUS_REG_IRQ_DISABLED_BIT)
79	);	80	);
80	}	81	}
81		82
82	/** Read interrupt priority level.	83	/** Read interrupt priority level.
83	*	84	*
84	* @return Current interrupt priority level.	85	* @return Current interrupt priority level.
85	*/	86	*/
86	ipl_t interrupts_read(void)	87	ipl_t interrupts_read(void)
87	{	88	{
88	return current_status_reg_read();	89	return current_status_reg_read();
89	}	90	}
90		91
91	/** Initialize basic tables for exception dispatching	92	/** Initialize basic tables for exception dispatching
92	* and starts the timer.	93	* and starts the timer.
93	*/	94	*/
94	void interrupt_init(void)	95	void interrupt_init(void)
95	{	96	{
96	irq_init(IRQ_COUNT, IRQ_COUNT);	97	irq_init(IRQ_COUNT, IRQ_COUNT);
97	machine_timer_irq_start();	98	machine_timer_irq_start();
98	}	99	}
99		100
100		101
101	/** @}	102	/** @}
102	*/	103	*/
103		104