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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Ondrej Palkovsky |
2 | * Copyright (C) 2005 Ondrej Palkovsky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #include <arch.h> |
29 | #include <arch.h> |
30 | 30 | ||
31 | #include <arch/types.h> |
31 | #include <arch/types.h> |
32 | 32 | ||
33 | #include <config.h> |
33 | #include <config.h> |
34 | 34 | ||
35 | #include <arch/ega.h> |
35 | #include <arch/ega.h> |
36 | #include <arch/i8042.h> |
36 | #include <arch/i8042.h> |
37 | #include <arch/i8254.h> |
37 | #include <arch/i8254.h> |
38 | #include <arch/i8259.h> |
38 | #include <arch/i8259.h> |
39 | 39 | ||
40 | #include <arch/bios/bios.h> |
40 | #include <arch/bios/bios.h> |
41 | #include <arch/mm/memory_init.h> |
41 | #include <arch/mm/memory_init.h> |
42 | #include <arch/cpu.h> |
42 | #include <arch/cpu.h> |
43 | #include <print.h> |
43 | #include <print.h> |
44 | #include <arch/cpuid.h> |
44 | #include <arch/cpuid.h> |
45 | #include <genarch/acpi/acpi.h> |
45 | #include <genarch/acpi/acpi.h> |
46 | #include <panic.h> |
46 | #include <panic.h> |
47 | #include <interrupt.h> |
47 | #include <interrupt.h> |
48 | #include <arch/syscall.h> |
48 | #include <arch/syscall.h> |
49 | 49 | ||
50 | /** Disable I/O on non-privileged levels |
50 | /** Disable I/O on non-privileged levels |
51 | * |
51 | * |
52 | * Clean IOPL(12,13) and NT(14) flags in EFLAGS register |
52 | * Clean IOPL(12,13) and NT(14) flags in EFLAGS register |
53 | */ |
53 | */ |
54 | static void clean_IOPL_NT_flags(void) |
54 | static void clean_IOPL_NT_flags(void) |
55 | { |
55 | { |
56 | asm |
56 | asm |
57 | ( |
57 | ( |
58 | "pushfq;" |
58 | "pushfq;" |
59 | "pop %%rax;" |
59 | "pop %%rax;" |
60 | "and $~(0x7000),%%rax;" |
60 | "and $~(0x7000),%%rax;" |
61 | "pushq %%rax;" |
61 | "pushq %%rax;" |
62 | "popfq;" |
62 | "popfq;" |
63 | : |
63 | : |
64 | : |
64 | : |
65 | :"%rax" |
65 | :"%rax" |
66 | ); |
66 | ); |
67 | } |
67 | } |
68 | 68 | ||
69 | /** Disable alignment check |
69 | /** Disable alignment check |
70 | * |
70 | * |
71 | * Clean AM(18) flag in CR0 register |
71 | * Clean AM(18) flag in CR0 register |
72 | */ |
72 | */ |
73 | static void clean_AM_flag(void) |
73 | static void clean_AM_flag(void) |
74 | { |
74 | { |
75 | asm |
75 | asm |
76 | ( |
76 | ( |
77 | "mov %%cr0,%%rax;" |
77 | "mov %%cr0,%%rax;" |
78 | "and $~(0x40000),%%rax;" |
78 | "and $~(0x40000),%%rax;" |
79 | "mov %%rax,%%cr0;" |
79 | "mov %%rax,%%cr0;" |
80 | : |
80 | : |
81 | : |
81 | : |
82 | :"%rax" |
82 | :"%rax" |
83 | ); |
83 | ); |
84 | } |
84 | } |
85 | 85 | ||
86 | void arch_pre_mm_init(void) |
86 | void arch_pre_mm_init(void) |
87 | { |
87 | { |
88 | struct cpu_info cpuid_s; |
88 | struct cpu_info cpuid_s; |
89 | 89 | ||
90 | cpuid(AMD_CPUID_EXTENDED,&cpuid_s); |
90 | cpuid(AMD_CPUID_EXTENDED,&cpuid_s); |
91 | if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE))) |
91 | if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE))) |
92 | panic("Processor does not support No-execute pages.\n"); |
92 | panic("Processor does not support No-execute pages.\n"); |
93 | 93 | ||
94 | cpuid(INTEL_CPUID_STANDARD,&cpuid_s); |
94 | cpuid(INTEL_CPUID_STANDARD,&cpuid_s); |
95 | if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE))) |
95 | if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE))) |
96 | panic("Processor does not support FXSAVE/FXRESTORE.\n"); |
96 | panic("Processor does not support FXSAVE/FXRESTORE.\n"); |
97 | 97 | ||
98 | if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2))) |
98 | if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2))) |
99 | panic("Processor does not support SSE2 instructions.\n"); |
99 | panic("Processor does not support SSE2 instructions.\n"); |
100 | 100 | ||
101 | /* Enable No-execute pages */ |
101 | /* Enable No-execute pages */ |
102 | set_efer_flag(AMD_NXE_FLAG); |
102 | set_efer_flag(AMD_NXE_FLAG); |
103 | /* Enable FPU */ |
103 | /* Enable FPU */ |
104 | cpu_setup_fpu(); |
104 | cpu_setup_fpu(); |
105 | 105 | ||
106 | /* Initialize segmentation */ |
106 | /* Initialize segmentation */ |
107 | pm_init(); |
107 | pm_init(); |
108 | 108 | ||
109 | /* Disable I/O on nonprivileged levels |
109 | /* Disable I/O on nonprivileged levels |
110 | * clear the NT(nested-thread) flag |
110 | * clear the NT(nested-thread) flag |
111 | */ |
111 | */ |
112 | clean_IOPL_NT_flags(); |
112 | clean_IOPL_NT_flags(); |
113 | /* Disable alignment check */ |
113 | /* Disable alignment check */ |
114 | clean_AM_flag(); |
114 | clean_AM_flag(); |
115 | 115 | ||
116 | if (config.cpu_active == 1) { |
116 | if (config.cpu_active == 1) { |
117 | bios_init(); |
117 | bios_init(); |
118 | i8259_init(); /* PIC */ |
118 | i8259_init(); /* PIC */ |
119 | i8254_init(); /* hard clock */ |
119 | i8254_init(); /* hard clock */ |
120 | 120 | ||
121 | #ifdef CONFIG_SMP |
121 | #ifdef CONFIG_SMP |
122 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", |
122 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", |
123 | tlb_shootdown_ipi); |
123 | tlb_shootdown_ipi); |
124 | exc_register(VECTOR_WAKEUP_IPI, "wakeup_ipi", wakeup_ipi); |
- | |
125 | #endif /* CONFIG_SMP */ |
124 | #endif /* CONFIG_SMP */ |
126 | } |
125 | } |
127 | } |
126 | } |
128 | 127 | ||
129 | void arch_post_mm_init(void) |
128 | void arch_post_mm_init(void) |
130 | { |
129 | { |
131 | if (config.cpu_active == 1) { |
130 | if (config.cpu_active == 1) { |
132 | ega_init(); /* video */ |
131 | ega_init(); /* video */ |
133 | } |
132 | } |
134 | /* Setup fast SYSCALL/SYSRET */ |
133 | /* Setup fast SYSCALL/SYSRET */ |
135 | syscall_setup_cpu(); |
134 | syscall_setup_cpu(); |
136 | 135 | ||
137 | } |
136 | } |
138 | 137 | ||
139 | void arch_pre_smp_init(void) |
138 | void arch_pre_smp_init(void) |
140 | { |
139 | { |
141 | if (config.cpu_active == 1) { |
140 | if (config.cpu_active == 1) { |
142 | memory_print_map(); |
141 | memory_print_map(); |
143 | 142 | ||
144 | #ifdef CONFIG_SMP |
143 | #ifdef CONFIG_SMP |
145 | acpi_init(); |
144 | acpi_init(); |
146 | #endif /* CONFIG_SMP */ |
145 | #endif /* CONFIG_SMP */ |
147 | } |
146 | } |
148 | } |
147 | } |
149 | 148 | ||
150 | void arch_post_smp_init(void) |
149 | void arch_post_smp_init(void) |
151 | { |
150 | { |
152 | i8042_init(); /* keyboard controller */ |
151 | i8042_init(); /* keyboard controller */ |
153 | } |
152 | } |
154 | 153 | ||
155 | void calibrate_delay_loop(void) |
154 | void calibrate_delay_loop(void) |
156 | { |
155 | { |
157 | i8254_calibrate_delay_loop(); |
156 | i8254_calibrate_delay_loop(); |
158 | i8254_normal_operation(); |
157 | i8254_normal_operation(); |
159 | } |
158 | } |
160 | 159 |