WebSVN – HelenOS – Diff – /branches/dynload/uspace/srv/bd/ata_bd/ata_bd.h


/*
 * Copyright (c) 2009 Jiri Svoboda
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup bd
 * @{
 */
/** @file
 */
 
#ifndef __ATA_BD_H__
#define __ATA_BD_H__
 
#include <sys/types.h>
#include <fibril_sync.h>
 
enum {
    CTL_READ_START  = 0,
    CTL_WRITE_START = 1,
};
 
enum {
    STATUS_FAILURE  = 0
};
 
enum {
    MAX_DISKS   = 2
};
 
/** ATA Command Register Block. */
typedef union {
    /* Read/Write */
    struct {
        uint16_t data_port;
        uint8_t sector_count;
        uint8_t sector_number;
        uint8_t cylinder_low;
        uint8_t cylinder_high;
        uint8_t drive_head;
        uint8_t pad_rw0;       
    };
 
    /* Read Only */
    struct {
        uint8_t pad_ro0;
        uint8_t error;
        uint8_t pad_ro1[5];
        uint8_t status;
    };
 
    /* Write Only */
    struct {
        uint8_t pad_wo0;
        uint8_t features;
        uint8_t pad_wo1[5];
        uint8_t command;
    };
} ata_cmd_t;
 
typedef union {
    /* Read */
    struct {
        uint8_t pad0[6];
        uint8_t alt_status;
        uint8_t drive_address;
    };
 
    /* Write */
    struct {
        uint8_t pad1[6];
        uint8_t device_control;
        uint8_t pad2;
    };
} ata_ctl_t;
 
enum devctl_bits {
    DCR_SRST    = 0x04, /**< Software Reset */
    DCR_nIEN    = 0x02  /**< Interrupt Enable (negated) */
};
 
enum status_bits {
    SR_BSY      = 0x80, /**< Busy */
    SR_DRDY     = 0x40, /**< Drive Ready */
    SR_DWF      = 0x20, /**< Drive Write Fault */
    SR_DSC      = 0x10, /**< Drive Seek Complete */
    SR_DRQ      = 0x08, /**< Data Request */
    SR_CORR     = 0x04, /**< Corrected Data */
    SR_IDX      = 0x02, /**< Index */
    SR_ERR      = 0x01  /**< Error */
};
 
enum drive_head_bits {
    DHR_DRV     = 0x10
};
 
enum error_bits {
    ER_BBK      = 0x80, /**< Bad Block Detected */
    ER_UNC      = 0x40, /**< Uncorrectable Data Error */
    ER_MC       = 0x20, /**< Media Changed */
    ER_IDNF     = 0x10, /**< ID Not Found */
    ER_MCR      = 0x08, /**< Media Change Request */
    ER_ABRT     = 0x04, /**< Aborted Command */
    ER_TK0NF    = 0x02, /**< Track 0 Not Found */
    ER_AMNF     = 0x01  /**< Address Mark Not Found */
};
 
enum ata_command {
    CMD_IDENTIFY_DRIVE  = 0xEC,
    CMD_READ_SECTORS    = 0x20,
    CMD_WRITE_SECTORS   = 0x30
};
 
typedef struct {
    bool present;
    unsigned heads;
    unsigned cylinders;
    unsigned sectors;
    uint64_t blocks;
 
    fibril_mutex_t lock;
    dev_handle_t dev_handle;
} disk_t;
 
#endif
 
/** @}
 */
 

Rev 4557	Rev 4691
1	/*	1	/*
2	* Copyright (c) 2009 Jiri Svoboda	2	* Copyright (c) 2009 Jiri Svoboda
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup bd	29	/** @addtogroup bd
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifndef __ATA_BD_H__	35	#ifndef __ATA_BD_H__
36	#define __ATA_BD_H__	36	#define __ATA_BD_H__
37		37
38	#include <sys/types.h>	38	#include <sys/types.h>
39	#include <fibril_sync.h>	39	#include <fibril_sync.h>
40		40
41	enum {	41	enum {
42	CTL_READ_START = 0,	42	CTL_READ_START = 0,
43	CTL_WRITE_START = 1,	43	CTL_WRITE_START = 1,
44	};	44	};
45		45
46	enum {	46	enum {
47	STATUS_FAILURE = 0	47	STATUS_FAILURE = 0
48	};	48	};
49		49
50	enum {	50	enum {
51	MAX_DISKS = 2	51	MAX_DISKS = 2
52	};	52	};
53		53
54	/** ATA Command Register Block. */	54	/** ATA Command Register Block. */
55	typedef union {	55	typedef union {
56	/* Read/Write */	56	/* Read/Write */
57	struct {	57	struct {
58	uint16_t data_port;	58	uint16_t data_port;
59	uint8_t sector_count;	59	uint8_t sector_count;
60	uint8_t sector_number;	60	uint8_t sector_number;
61	uint8_t cylinder_low;	61	uint8_t cylinder_low;
62	uint8_t cylinder_high;	62	uint8_t cylinder_high;
63	uint8_t drive_head;	63	uint8_t drive_head;
64	uint8_t pad_rw0;	64	uint8_t pad_rw0;
65	};	65	};
66		66
67	/* Read Only */	67	/* Read Only */
68	struct {	68	struct {
69	uint8_t pad_ro0;	69	uint8_t pad_ro0;
70	uint8_t error;	70	uint8_t error;
71	uint8_t pad_ro1[5];	71	uint8_t pad_ro1[5];
72	uint8_t status;	72	uint8_t status;
73	};	73	};
74		74
75	/* Write Only */	75	/* Write Only */
76	struct {	76	struct {
77	uint8_t pad_wo0;	77	uint8_t pad_wo0;
78	uint8_t features;	78	uint8_t features;
79	uint8_t pad_wo1[5];	79	uint8_t pad_wo1[5];
80	uint8_t command;	80	uint8_t command;
81	};	81	};
82	} ata_cmd_t;	82	} ata_cmd_t;
83		83
84	typedef union {	84	typedef union {
85	/* Read */	85	/* Read */
86	struct {	86	struct {
87	uint8_t pad0[6];	87	uint8_t pad0[6];
88	uint8_t alt_status;	88	uint8_t alt_status;
89	uint8_t drive_address;	89	uint8_t drive_address;
90	};	90	};
91		91
92	/* Write */	92	/* Write */
93	struct {	93	struct {
94	uint8_t pad1[6];	94	uint8_t pad1[6];
95	uint8_t device_control;	95	uint8_t device_control;
96	uint8_t pad2;	96	uint8_t pad2;
97	};	97	};
98	} ata_ctl_t;	98	} ata_ctl_t;
99		99
100	enum devctl_bits {	100	enum devctl_bits {
101	DCR_SRST = 0x04, /*< Software Reset /	101	DCR_SRST = 0x04, /*< Software Reset /
102	DCR_nIEN = 0x02 /*< Interrupt Enable (negated) /	102	DCR_nIEN = 0x02 /*< Interrupt Enable (negated) /
103	};	103	};
104		104
105	enum status_bits {	105	enum status_bits {
106	SR_BSY = 0x80, /*< Busy /	106	SR_BSY = 0x80, /*< Busy /
107	SR_DRDY = 0x40, /*< Drive Ready /	107	SR_DRDY = 0x40, /*< Drive Ready /
108	SR_DWF = 0x20, /*< Drive Write Fault /	108	SR_DWF = 0x20, /*< Drive Write Fault /
109	SR_DSC = 0x10, /*< Drive Seek Complete /	109	SR_DSC = 0x10, /*< Drive Seek Complete /
110	SR_DRQ = 0x08, /*< Data Request /	110	SR_DRQ = 0x08, /*< Data Request /
111	SR_CORR = 0x04, /*< Corrected Data /	111	SR_CORR = 0x04, /*< Corrected Data /
112	SR_IDX = 0x02, /*< Index /	112	SR_IDX = 0x02, /*< Index /
113	SR_ERR = 0x01 /*< Error /	113	SR_ERR = 0x01 /*< Error /
114	};	114	};
115		115
116	enum drive_head_bits {	116	enum drive_head_bits {
117	DHR_DRV = 0x10	117	DHR_DRV = 0x10
118	};	118	};
119		119
120	enum error_bits {	120	enum error_bits {
121	ER_BBK = 0x80, /*< Bad Block Detected /	121	ER_BBK = 0x80, /*< Bad Block Detected /
122	ER_UNC = 0x40, /*< Uncorrectable Data Error /	122	ER_UNC = 0x40, /*< Uncorrectable Data Error /
123	ER_MC = 0x20, /*< Media Changed /	123	ER_MC = 0x20, /*< Media Changed /
124	ER_IDNF = 0x10, /*< ID Not Found /	124	ER_IDNF = 0x10, /*< ID Not Found /
125	ER_MCR = 0x08, /*< Media Change Request /	125	ER_MCR = 0x08, /*< Media Change Request /
126	ER_ABRT = 0x04, /*< Aborted Command /	126	ER_ABRT = 0x04, /*< Aborted Command /
127	ER_TK0NF = 0x02, /*< Track 0 Not Found /	127	ER_TK0NF = 0x02, /*< Track 0 Not Found /
128	ER_AMNF = 0x01 /*< Address Mark Not Found /	128	ER_AMNF = 0x01 /*< Address Mark Not Found /
129	};	129	};
130		130
131	enum ata_command {	131	enum ata_command {
132	CMD_IDENTIFY_DRIVE = 0xEC,	132	CMD_IDENTIFY_DRIVE = 0xEC,
133	CMD_READ_SECTORS = 0x20,	133	CMD_READ_SECTORS = 0x20,
134	CMD_WRITE_SECTORS = 0x30	134	CMD_WRITE_SECTORS = 0x30
135	};	135	};
136		136
137	typedef struct {	137	typedef struct {
138	bool present;	138	bool present;
139	unsigned heads;	139	unsigned heads;
140	unsigned cylinders;	140	unsigned cylinders;
141	unsigned sectors;	141	unsigned sectors;
142	uint64_t blocks;	142	uint64_t blocks;
143		143
144	fibril_mutex_t lock;	144	fibril_mutex_t lock;
145	dev_handle_t dev_handle;	145	dev_handle_t dev_handle;
146	} disk_t;	146	} disk_t;
147		147
148	#endif	148	#endif
149		149
150	/** @}	150	/** @}
151	*/	151	*/
152		152

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(root)/branches/dynload/uspace/srv/bd/ata_bd/ata_bd.h – Rev 4557 → 4691