Rev 4346 | Go to most recent revision | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 4346 | Rev 4347 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * Copyright (c) 2009 Jakub Jermar |
2 | * Copyright (c) 2009 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup genarch |
29 | /** @addtogroup genarch |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief Zilog 8530 serial controller driver. |
34 | * @brief Zilog 8530 serial controller driver. |
35 | */ |
35 | */ |
36 | 36 | ||
37 | #include <genarch/drivers/z8530/z8530.h> |
37 | #include <genarch/drivers/z8530/z8530.h> |
38 | #include <console/chardev.h> |
38 | #include <console/chardev.h> |
39 | #include <ddi/irq.h> |
39 | #include <ddi/irq.h> |
40 | #include <arch/asm.h> |
40 | #include <arch/asm.h> |
41 | #include <mm/slab.h> |
41 | #include <mm/slab.h> |
- | 42 | #include <ddi/device.h> |
|
42 | 43 | ||
43 | static indev_operations_t kbrdin_ops = { |
44 | static indev_operations_t kbrdin_ops = { |
44 | .poll = NULL |
45 | .poll = NULL |
45 | }; |
46 | }; |
46 | 47 | ||
47 | static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val) |
48 | static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val) |
48 | { |
49 | { |
49 | /* |
50 | /* |
50 | * Registers 8-15 will automatically issue the Point High |
51 | * Registers 8-15 will automatically issue the Point High |
51 | * command as their bit 3 is 1. |
52 | * command as their bit 3 is 1. |
52 | */ |
53 | */ |
53 | pio_write_8(ctl, reg); /* Select register */ |
54 | pio_write_8(ctl, reg); /* Select register */ |
54 | pio_write_8(ctl, val); /* Write value */ |
55 | pio_write_8(ctl, val); /* Write value */ |
55 | } |
56 | } |
56 | 57 | ||
57 | static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg) |
58 | static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg) |
58 | { |
59 | { |
59 | /* |
60 | /* |
60 | * Registers 8-15 will automatically issue the Point High |
61 | * Registers 8-15 will automatically issue the Point High |
61 | * command as their bit 3 is 1. |
62 | * command as their bit 3 is 1. |
62 | */ |
63 | */ |
63 | pio_write_8(ctl, reg); /* Select register */ |
64 | pio_write_8(ctl, reg); /* Select register */ |
64 | return pio_read_8(ctl); |
65 | return pio_read_8(ctl); |
65 | } |
66 | } |
66 | 67 | ||
67 | static irq_ownership_t z8530_claim(irq_t *irq) |
68 | static irq_ownership_t z8530_claim(irq_t *irq) |
68 | { |
69 | { |
69 | z8530_instance_t *instance = irq->instance; |
70 | z8530_instance_t *instance = irq->instance; |
70 | z8530_t *dev = instance->z8530; |
71 | z8530_t *dev = instance->z8530; |
71 | 72 | ||
72 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) |
73 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) |
73 | return IRQ_ACCEPT; |
74 | return IRQ_ACCEPT; |
74 | else |
75 | else |
75 | return IRQ_DECLINE; |
76 | return IRQ_DECLINE; |
76 | } |
77 | } |
77 | 78 | ||
78 | static void z8530_irq_handler(irq_t *irq) |
79 | static void z8530_irq_handler(irq_t *irq) |
79 | { |
80 | { |
80 | z8530_instance_t *instance = irq->instance; |
81 | z8530_instance_t *instance = irq->instance; |
81 | z8530_t *dev = instance->z8530; |
82 | z8530_t *dev = instance->z8530; |
82 | 83 | ||
83 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) { |
84 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) { |
84 | uint8_t x = z8530_read(&dev->ctl_a, RR8); |
85 | uint8_t x = z8530_read(&dev->ctl_a, RR8); |
85 | indev_push_character(&instance->kbrdin, x); |
86 | indev_push_character(&instance->kbrdin, x); |
86 | } |
87 | } |
87 | } |
88 | } |
88 | 89 | ||
89 | /** Initialize z8530. */ |
90 | /** Initialize z8530. */ |
90 | indev_t *z8530_init(z8530_t *dev, devno_t devno, inr_t inr, cir_t cir, void *cir_arg) |
91 | indev_t *z8530_init(z8530_t *dev, inr_t inr, cir_t cir, void *cir_arg) |
91 | { |
92 | { |
92 | z8530_instance_t *instance |
93 | z8530_instance_t *instance |
93 | = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC); |
94 | = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC); |
94 | if (!instance) |
95 | if (!instance) |
95 | return false; |
96 | return false; |
96 | 97 | ||
97 | indev_initialize("z8530", &instance->kbrdin, &kbrdin_ops); |
98 | indev_initialize("z8530", &instance->kbrdin, &kbrdin_ops); |
98 | 99 | ||
99 | instance->devno = devno; |
- | |
100 | instance->z8530 = dev; |
100 | instance->z8530 = dev; |
101 | 101 | ||
102 | irq_initialize(&instance->irq); |
102 | irq_initialize(&instance->irq); |
103 | instance->irq.devno = devno; |
103 | instance->irq.devno = device_assign_devno(); |
104 | instance->irq.inr = inr; |
104 | instance->irq.inr = inr; |
105 | instance->irq.claim = z8530_claim; |
105 | instance->irq.claim = z8530_claim; |
106 | instance->irq.handler = z8530_irq_handler; |
106 | instance->irq.handler = z8530_irq_handler; |
107 | instance->irq.instance = instance; |
107 | instance->irq.instance = instance; |
108 | instance->irq.cir = cir; |
108 | instance->irq.cir = cir; |
109 | instance->irq.cir_arg = cir_arg; |
109 | instance->irq.cir_arg = cir_arg; |
110 | irq_register(&instance->irq); |
110 | irq_register(&instance->irq); |
111 | 111 | ||
112 | (void) z8530_read(&dev->ctl_a, RR8); |
112 | (void) z8530_read(&dev->ctl_a, RR8); |
113 | 113 | ||
114 | /* |
114 | /* |
115 | * Clear any pending TX interrupts or we never manage |
115 | * Clear any pending TX interrupts or we never manage |
116 | * to set FHC UART interrupt state to idle. |
116 | * to set FHC UART interrupt state to idle. |
117 | */ |
117 | */ |
118 | z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST); |
118 | z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST); |
119 | 119 | ||
120 | /* interrupt on all characters */ |
120 | /* interrupt on all characters */ |
121 | z8530_write(&dev->ctl_a, WR1, WR1_IARCSC); |
121 | z8530_write(&dev->ctl_a, WR1, WR1_IARCSC); |
122 | 122 | ||
123 | /* 8 bits per character and enable receiver */ |
123 | /* 8 bits per character and enable receiver */ |
124 | z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
124 | z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
125 | 125 | ||
126 | /* Master Interrupt Enable. */ |
126 | /* Master Interrupt Enable. */ |
127 | z8530_write(&dev->ctl_a, WR9, WR9_MIE); |
127 | z8530_write(&dev->ctl_a, WR9, WR9_MIE); |
128 | 128 | ||
129 | return &instance->kbrdin; |
129 | return &instance->kbrdin; |
130 | } |
130 | } |
131 | 131 | ||
132 | /** @} |
132 | /** @} |
133 | */ |
133 | */ |
134 | 134 |