WebSVN – HelenOS – Diff – /branches/dynload/kernel/genarch/src/drivers/z8530/z8530.c


/*
 * Copyright (c) 2009 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup genarch
 * @{
 */
/**
 * @file
 * @brief Zilog 8530 serial controller driver.
 */
 
#include <genarch/drivers/z8530/z8530.h>
#include <console/chardev.h>
#include <ddi/irq.h>
#include <arch/asm.h>
#include <mm/slab.h>
 
static indev_operations_t kbrdin_ops = {
    .poll = NULL
};
 
static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val)
{
    /*
     * Registers 8-15 will automatically issue the Point High
     * command as their bit 3 is 1.
     */
    pio_write_8(ctl, reg);  /* Select register */
    pio_write_8(ctl, val);  /* Write value */
}
 
static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg)
{
    /*
     * Registers 8-15 will automatically issue the Point High
     * command as their bit 3 is 1.
     */
    pio_write_8(ctl, reg);   /* Select register */
    return pio_read_8(ctl);
}
 
static irq_ownership_t z8530_claim(irq_t *irq)
{
    z8530_instance_t *instance = irq->instance;
    z8530_t *dev = instance->z8530;
   
    if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA)
        return IRQ_ACCEPT;
    else
        return IRQ_DECLINE;
}
 
static void z8530_irq_handler(irq_t *irq)
{
    z8530_instance_t *instance = irq->instance;
    z8530_t *dev = instance->z8530;
   
    if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) {
        uint8_t x = z8530_read(&dev->ctl_a, RR8);
        indev_push_character(&instance->kbrdin, x);
    }
}
 
/** Initialize z8530. */
indev_t *z8530_init(z8530_t *dev, devno_t devno, inr_t inr, cir_t cir, void *cir_arg)
{
    z8530_instance_t *instance
        = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC);
    if (!instance)
        return false;
   
    indev_initialize("z8530", &instance->kbrdin, &kbrdin_ops);
   
    instance->devno = devno;
    instance->z8530 = dev;
   
    irq_initialize(&instance->irq);
    instance->irq.devno = devno;
    instance->irq.inr = inr;
    instance->irq.claim = z8530_claim;
    instance->irq.handler = z8530_irq_handler;
    instance->irq.instance = instance;
    instance->irq.cir = cir;
    instance->irq.cir_arg = cir_arg;
    irq_register(&instance->irq);
   
    (void) z8530_read(&dev->ctl_a, RR8);
   
    /*
     * Clear any pending TX interrupts or we never manage
     * to set FHC UART interrupt state to idle.
     */
    z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST);
   
    /* interrupt on all characters */
    z8530_write(&dev->ctl_a, WR1, WR1_IARCSC);
   
    /* 8 bits per character and enable receiver */
    z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE);
   
    /* Master Interrupt Enable. */
    z8530_write(&dev->ctl_a, WR9, WR9_MIE);
   
    return &instance->kbrdin;
}
 
/** @}
 */
 

Subversion Repositories HelenOS

(root)/branches/dynload/kernel/genarch/src/drivers/z8530/z8530.c – Rev 4119 → 4346

Rev 4119		Rev 4346
1	/*	1	/*
2	* Copyright (c) 2009 Jakub Jermar	2	* Copyright (c) 2009 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup genarch	29	/** @addtogroup genarch
30	* @{	30	* @{
31	*/	31	*/
32	/**	32	/**
33	* @file	33	* @file
34	* @brief Zilog 8530 serial controller driver.	34	* @brief Zilog 8530 serial controller driver.
35	*/	35	*/
36		36
37	#include <genarch/drivers/z8530/z8530.h>	37	#include <genarch/drivers/z8530/z8530.h>
38	#include <console/chardev.h>	38	#include <console/chardev.h>
39	#include <ddi/irq.h>	39	#include <ddi/irq.h>
40	#include <arch/asm.h>	40	#include <arch/asm.h>
41	#include <mm/slab.h>	41	#include <mm/slab.h>
42		42
43	static indev_operations_t kbrdin_ops = {	43	static indev_operations_t kbrdin_ops = {
44	.poll = NULL	44	.poll = NULL
45	};	45	};
46		46
47	static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val)	47	static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val)
48	{	48	{
49	/*	49	/*
50	* Registers 8-15 will automatically issue the Point High	50	* Registers 8-15 will automatically issue the Point High
51	* command as their bit 3 is 1.	51	* command as their bit 3 is 1.
52	*/	52	*/
53	pio_write_8(ctl, reg); /* Select register */	53	pio_write_8(ctl, reg); /* Select register */
54	pio_write_8(ctl, val); /* Write value */	54	pio_write_8(ctl, val); /* Write value */
55	}	55	}
56		56
57	static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg)	57	static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg)
58	{	58	{
59	/*	59	/*
60	* Registers 8-15 will automatically issue the Point High	60	* Registers 8-15 will automatically issue the Point High
61	* command as their bit 3 is 1.	61	* command as their bit 3 is 1.
62	*/	62	*/
63	pio_write_8(ctl, reg); /* Select register */	63	pio_write_8(ctl, reg); /* Select register */
64	return pio_read_8(ctl);	64	return pio_read_8(ctl);
65	}	65	}
66		66
67	static irq_ownership_t z8530_claim(irq_t *irq)	67	static irq_ownership_t z8530_claim(irq_t *irq)
68	{	68	{
69	z8530_instance_t *instance = irq->instance;	69	z8530_instance_t *instance = irq->instance;
70	z8530_t *dev = instance->z8530;	70	z8530_t *dev = instance->z8530;
71		71
72	if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA)	72	if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA)
73	return IRQ_ACCEPT;	73	return IRQ_ACCEPT;
74	else	74	else
75	return IRQ_DECLINE;	75	return IRQ_DECLINE;
76	}	76	}
77		77
78	static void z8530_irq_handler(irq_t *irq)	78	static void z8530_irq_handler(irq_t *irq)
79	{	79	{
80	z8530_instance_t *instance = irq->instance;	80	z8530_instance_t *instance = irq->instance;
81	z8530_t *dev = instance->z8530;	81	z8530_t *dev = instance->z8530;
82		82
83	if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) {	83	if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) {
84	uint8_t x = z8530_read(&dev->ctl_a, RR8);	84	uint8_t x = z8530_read(&dev->ctl_a, RR8);
85	indev_push_character(&instance->kbrdin, x);	85	indev_push_character(&instance->kbrdin, x);
86	}	86	}
87	}	87	}
88		88
89	/** Initialize z8530. */	89	/** Initialize z8530. */
90	indev_t z8530_init(z8530_t dev, devno_t devno, inr_t inr, cir_t cir, void *cir_arg)	90	indev_t z8530_init(z8530_t dev, devno_t devno, inr_t inr, cir_t cir, void *cir_arg)
91	{	91	{
92	z8530_instance_t *instance	92	z8530_instance_t *instance
93	= malloc(sizeof(z8530_instance_t), FRAME_ATOMIC);	93	= malloc(sizeof(z8530_instance_t), FRAME_ATOMIC);
94	if (!instance)	94	if (!instance)
95	return false;	95	return false;
96		96
97	indev_initialize("z8530", &instance->kbrdin, &kbrdin_ops);	97	indev_initialize("z8530", &instance->kbrdin, &kbrdin_ops);
98		98
99	instance->devno = devno;	99	instance->devno = devno;
100	instance->z8530 = dev;	100	instance->z8530 = dev;
101		101
102	irq_initialize(&instance->irq);	102	irq_initialize(&instance->irq);
103	instance->irq.devno = devno;	103	instance->irq.devno = devno;
104	instance->irq.inr = inr;	104	instance->irq.inr = inr;
105	instance->irq.claim = z8530_claim;	105	instance->irq.claim = z8530_claim;
106	instance->irq.handler = z8530_irq_handler;	106	instance->irq.handler = z8530_irq_handler;
107	instance->irq.instance = instance;	107	instance->irq.instance = instance;
108	instance->irq.cir = cir;	108	instance->irq.cir = cir;
109	instance->irq.cir_arg = cir_arg;	109	instance->irq.cir_arg = cir_arg;
110	irq_register(&instance->irq);	110	irq_register(&instance->irq);
111		111
112	(void) z8530_read(&dev->ctl_a, RR8);	112	(void) z8530_read(&dev->ctl_a, RR8);
113		113
114	/*	114	/*
115	* Clear any pending TX interrupts or we never manage	115	* Clear any pending TX interrupts or we never manage
116	* to set FHC UART interrupt state to idle.	116	* to set FHC UART interrupt state to idle.
117	*/	117	*/
118	z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST);	118	z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST);
119		119
120	/* interrupt on all characters */	120	/* interrupt on all characters */
121	z8530_write(&dev->ctl_a, WR1, WR1_IARCSC);	121	z8530_write(&dev->ctl_a, WR1, WR1_IARCSC);
122		122
123	/* 8 bits per character and enable receiver */	123	/* 8 bits per character and enable receiver */
124	z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH \| WR3_RX_ENABLE);	124	z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH \| WR3_RX_ENABLE);
125		125
126	/* Master Interrupt Enable. */	126	/* Master Interrupt Enable. */
127	z8530_write(&dev->ctl_a, WR9, WR9_MIE);	127	z8530_write(&dev->ctl_a, WR9, WR9_MIE);
128		128
129	return &instance->kbrdin;	129	return &instance->kbrdin;
130	}	130	}
131		131
132	/** @}	132	/** @}
133	*/	133	*/
134		134