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1 | /* |
1 | /* |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup genarch |
29 | /** @addtogroup genarch |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief Headers for NS 16550 serial port / keyboard driver. |
34 | * @brief Headers for NS 16550 serial port / keyboard driver. |
35 | */ |
35 | */ |
36 | 36 | ||
37 | #ifndef KERN_NS16550_H_ |
37 | #ifndef KERN_NS16550_H_ |
38 | #define KERN_NS16550_H_ |
38 | #define KERN_NS16550_H_ |
39 | 39 | ||
40 | #include <console/chardev.h> |
40 | #include <console/chardev.h> |
- | 41 | #include <ddi/irq.h> |
|
41 | #include <ipc/irq.h> |
42 | #include <ipc/irq.h> |
42 | 43 | ||
43 | extern void ns16550_init(devno_t devno, inr_t inr, uintptr_t vaddr); |
44 | extern void ns16550_init(devno_t, uintptr_t, inr_t, cir_t, void *); |
44 | extern void ns16550_poll(void); |
45 | extern void ns16550_poll(void); |
45 | extern void ns16550_grab(void); |
46 | extern void ns16550_grab(void); |
46 | extern void ns16550_release(void); |
47 | extern void ns16550_release(void); |
47 | extern char ns16550_key_read(chardev_t *d); |
48 | extern char ns16550_key_read(chardev_t *); |
48 | extern irq_ownership_t ns16550_claim(void); |
49 | extern irq_ownership_t ns16550_claim(void); |
49 | extern void ns16550_irq_handler(irq_t *irq, void *arg, ...); |
50 | extern void ns16550_irq_handler(irq_t *, void *, ...); |
50 | 51 | ||
51 | #include <arch/types.h> |
52 | #include <arch/types.h> |
52 | #ifndef ia64 |
53 | #ifndef ia64 |
53 | #include <arch/drivers/kbd.h> |
54 | #include <arch/drivers/kbd.h> |
54 | #endif |
55 | #endif |
55 | /* NS16550 registers */ |
56 | /* NS16550 registers */ |
56 | #define RBR_REG 0 /** Receiver Buffer Register. */ |
57 | #define RBR_REG 0 /** Receiver Buffer Register. */ |
57 | #define IER_REG 1 /** Interrupt Enable Register. */ |
58 | #define IER_REG 1 /** Interrupt Enable Register. */ |
58 | #define IIR_REG 2 /** Interrupt Ident Register (read). */ |
59 | #define IIR_REG 2 /** Interrupt Ident Register (read). */ |
59 | #define FCR_REG 2 /** FIFO control register (write). */ |
60 | #define FCR_REG 2 /** FIFO control register (write). */ |
60 | #define LCR_REG 3 /** Line Control register. */ |
61 | #define LCR_REG 3 /** Line Control register. */ |
- | 62 | #define MCR_REG 4 /** Modem Control Register. */ |
|
61 | #define LSR_REG 5 /** Line Status Register. */ |
63 | #define LSR_REG 5 /** Line Status Register. */ |
62 | 64 | ||
63 | #define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */ |
65 | #define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */ |
64 | 66 | ||
65 | #define LCR_DLAB 0x80 /** Divisor Latch Access bit. */ |
67 | #define LCR_DLAB 0x80 /** Divisor Latch Access bit. */ |
66 | 68 | ||
- | 69 | #define MCR_OUT2 0x08 /** OUT2. */ |
|
- | 70 | ||
67 | /** Structure representing the ns16550 device. */ |
71 | /** Structure representing the ns16550 device. */ |
68 | typedef struct { |
72 | typedef struct { |
69 | devno_t devno; |
73 | devno_t devno; |
70 | volatile ioport_t io_port; /** Memory mapped registers of the ns16550. */ |
74 | /** Memory mapped registers of the ns16550. */ |
- | 75 | volatile ioport_t io_port; |
|
71 | } ns16550_t; |
76 | } ns16550_t; |
72 | 77 | ||
73 | static inline uint8_t ns16550_rbr_read(ns16550_t *dev) |
78 | static inline uint8_t ns16550_rbr_read(ns16550_t *dev) |
74 | { |
79 | { |
75 | return inb(dev->io_port+RBR_REG); |
80 | return inb(dev->io_port + RBR_REG); |
76 | } |
81 | } |
77 | static inline void ns16550_rbr_write(ns16550_t *dev, uint8_t v) |
82 | static inline void ns16550_rbr_write(ns16550_t *dev, uint8_t v) |
78 | { |
83 | { |
79 | outb(dev->io_port+RBR_REG,v); |
84 | outb(dev->io_port + RBR_REG, v); |
80 | } |
85 | } |
81 | 86 | ||
82 | static inline uint8_t ns16550_ier_read(ns16550_t *dev) |
87 | static inline uint8_t ns16550_ier_read(ns16550_t *dev) |
83 | { |
88 | { |
84 | return inb(dev->io_port+IER_REG); |
89 | return inb(dev->io_port + IER_REG); |
85 | } |
90 | } |
86 | 91 | ||
87 | static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v) |
92 | static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v) |
88 | { |
93 | { |
89 | outb(dev->io_port+IER_REG,v); |
94 | outb(dev->io_port + IER_REG, v); |
90 | } |
95 | } |
91 | 96 | ||
92 | static inline uint8_t ns16550_iir_read(ns16550_t *dev) |
97 | static inline uint8_t ns16550_iir_read(ns16550_t *dev) |
93 | { |
98 | { |
94 | return inb(dev->io_port+IIR_REG); |
99 | return inb(dev->io_port + IIR_REG); |
95 | } |
100 | } |
96 | 101 | ||
97 | static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v) |
102 | static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v) |
98 | { |
103 | { |
99 | outb(dev->io_port+FCR_REG,v); |
104 | outb(dev->io_port + FCR_REG, v); |
100 | } |
105 | } |
101 | 106 | ||
102 | static inline uint8_t ns16550_lcr_read(ns16550_t *dev) |
107 | static inline uint8_t ns16550_lcr_read(ns16550_t *dev) |
103 | { |
108 | { |
104 | return inb(dev->io_port+LCR_REG); |
109 | return inb(dev->io_port + LCR_REG); |
105 | } |
110 | } |
106 | 111 | ||
107 | static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v) |
112 | static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v) |
108 | { |
113 | { |
109 | outb(dev->io_port+LCR_REG,v); |
114 | outb(dev->io_port + LCR_REG, v); |
110 | } |
115 | } |
111 | 116 | ||
112 | static inline uint8_t ns16550_lsr_read(ns16550_t *dev) |
117 | static inline uint8_t ns16550_lsr_read(ns16550_t *dev) |
113 | { |
118 | { |
114 | return inb(dev->io_port+LSR_REG); |
119 | return inb(dev->io_port + LSR_REG); |
115 | } |
120 | } |
116 | 121 | ||
- | 122 | static inline uint8_t ns16550_mcr_read(ns16550_t *dev) |
|
- | 123 | { |
|
- | 124 | return inb(dev->io_port + MCR_REG); |
|
- | 125 | } |
|
117 | 126 | ||
- | 127 | static inline void ns16550_mcr_write(ns16550_t *dev, uint8_t v) |
|
- | 128 | { |
|
- | 129 | outb(dev->io_port + MCR_REG, v); |
|
- | 130 | } |
|
118 | 131 | ||
119 | #endif |
132 | #endif |
120 | 133 | ||
121 | /** @} |
134 | /** @} |
122 | */ |
135 | */ |
123 | 136 |