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1 | /* |
1 | /* |
2 | * Copyright (c) 2009 Vineeth Pillai |
2 | * Copyright (c) 2009 Vineeth Pillai |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup genarch |
29 | /** @addtogroup genarch |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | * @brief Describes the pl050 keyboard/mouse controller |
33 | * @brief Describes the pl050 keyboard/mouse controller |
34 | */ |
34 | */ |
35 | 35 | ||
36 | /** |
36 | /** |
37 | * This file implements pl050 specific functions for keyboard and mouse |
37 | * This file implements pl050 specific functions for keyboard and mouse |
38 | */ |
38 | */ |
39 | 39 | ||
40 | #ifndef KERN_genarch_PL050_H |
40 | #ifndef KERN_genarch_PL050_H |
41 | #define KERN_genarch_PL050_H |
41 | #define KERN_genarch_PL050_H |
42 | 42 | ||
43 | #include <ddi/irq.h> |
43 | #include <ddi/irq.h> |
44 | #include <arch/types.h> |
44 | #include <arch/types.h> |
45 | #include <console/chardev.h> |
45 | #include <console/chardev.h> |
46 | #include <typedefs.h> |
46 | #include <typedefs.h> |
47 | 47 | ||
48 | 48 | ||
49 | /* |
49 | /* |
50 | * pl050 register offsets from the base address |
50 | * pl050 register offsets from the base address |
51 | */ |
51 | */ |
52 | #define PL050_CR 0x00 |
52 | #define PL050_CR 0x00 |
53 | #define PL050_STAT 0x04 |
53 | #define PL050_STAT 0x04 |
54 | #define PL050_DATA 0x08 |
54 | #define PL050_DATA 0x08 |
55 | #define PL050_CLOCKDIV 0x0C |
55 | #define PL050_CLOCKDIV 0x0C |
56 | #define PL050_INTRSTAT 0x10 |
56 | #define PL050_INTRSTAT 0x10 |
57 | 57 | ||
58 | /* |
58 | /* |
59 | * Control Register Bits |
59 | * Control Register Bits |
60 | */ |
60 | */ |
61 | #define PL050_CR_TYPE (1 << 5) /* Type 0: PS2/AT mode, 1: No Line control bit mode */ |
61 | #define PL050_CR_TYPE (1 << 5) /* Type 0: PS2/AT mode, 1: No Line control bit mode */ |
62 | #define PL050_CR_RXINTR (1 << 4) /* Recieve Interrupt Enable */ |
62 | #define PL050_CR_RXINTR (1 << 4) /* Recieve Interrupt Enable */ |
63 | #define PL050_CR_TXINTR (1 << 3) /* Transmit Interrupt Enable */ |
63 | #define PL050_CR_TXINTR (1 << 3) /* Transmit Interrupt Enable */ |
64 | #define PL050_CR_INTR (1 << 2) /* Interrupt Enable */ |
64 | #define PL050_CR_INTR (1 << 2) /* Interrupt Enable */ |
65 | #define PL050_CR_FKMID (1 << 1) /* Force KMI Data Low */ |
65 | #define PL050_CR_FKMID (1 << 1) /* Force KMI Data Low */ |
66 | #define PL050_CR_FKMIC 1 /* Force KMI Clock Low */ |
66 | #define PL050_CR_FKMIC 1 /* Force KMI Clock Low */ |
67 | 67 | ||
68 | /* |
68 | /* |
69 | * Status register bits |
69 | * Status register bits |
70 | */ |
70 | */ |
71 | #define PL050_STAT_TXEMPTY (1 << 6) /* 1: Transmit register empty */ |
71 | #define PL050_STAT_TXEMPTY (1 << 6) /* 1: Transmit register empty */ |
72 | #define PL050_STAT_TXBUSY (1 << 5) /* 1: Busy, sending data */ |
72 | #define PL050_STAT_TXBUSY (1 << 5) /* 1: Busy, sending data */ |
73 | #define PL050_STAT_RXFULL (1 << 4) /* 1: register Full */ |
73 | #define PL050_STAT_RXFULL (1 << 4) /* 1: register Full */ |
74 | #define PL050_STAT_RXBUSY (1 << 3) /* 1: Busy, recieving Data */ |
74 | #define PL050_STAT_RXBUSY (1 << 3) /* 1: Busy, recieving Data */ |
75 | #define PL050_STAT_RXPARITY (1 << 2) /* odd parity of the last bit recieved */ |
75 | #define PL050_STAT_RXPARITY (1 << 2) /* odd parity of the last bit recieved */ |
76 | #define PL050_STAT_KMIC (1 << 1) /* status of KMICLKIN */ |
76 | #define PL050_STAT_KMIC (1 << 1) /* status of KMICLKIN */ |
77 | #define PL050_STAT_KMID 1 /* status of KMIDATAIN */ |
77 | #define PL050_STAT_KMID 1 /* status of KMIDATAIN */ |
78 | 78 | ||
79 | /* |
79 | /* |
80 | * Interrupt status register bits. |
80 | * Interrupt status register bits. |
81 | */ |
81 | */ |
82 | #define PL050_TX_INTRSTAT (1 << 1) /* Transmit intr asserted */ |
82 | #define PL050_TX_INTRSTAT (1 << 1) /* Transmit intr asserted */ |
83 | #define PL050_RX_INTRSTAT 1 /* Recieve intr asserted */ |
83 | #define PL050_RX_INTRSTAT 1 /* Recieve intr asserted */ |
84 | 84 | ||
85 | typedef struct { |
85 | typedef struct { |
86 | ioport8_t *base; |
86 | ioport8_t *base; |
87 | ioport8_t *data; |
87 | ioport8_t *data; |
88 | ioport8_t *status; |
88 | ioport8_t *status; |
89 | ioport8_t *ctrl; |
89 | ioport8_t *ctrl; |
90 | } pl050_t; |
90 | } pl050_t; |
91 | 91 | ||
92 | typedef struct { |
92 | typedef struct { |
93 | irq_t irq; |
93 | irq_t irq; |
94 | pl050_t *pl050; |
94 | pl050_t *pl050; |
95 | indev_t *kbrdin; |
95 | indev_t *kbrdin; |
96 | } pl050_instance_t; |
96 | } pl050_instance_t; |
97 | 97 | ||
98 | extern pl050_instance_t *pl050_init(pl050_t *, inr_t); |
98 | extern pl050_instance_t *pl050_init(pl050_t *, inr_t); |
99 | extern void pl050_wire(pl050_instance_t *, indev_t *); |
99 | extern void pl050_wire(pl050_instance_t *, indev_t *); |
100 | 100 | ||
101 | 101 | ||
102 | #endif |
102 | #endif |
103 | 103 | ||
104 | /** @} |
104 | /** @} |
105 | */ |
105 | */ |
106 | 106 |