Rev 1822 | Rev 1860 | Go to most recent revision | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 1822 | Rev 1823 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64 |
29 | /** @addtogroup sparc64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch.h> |
35 | #include <arch.h> |
36 | #include <debug.h> |
36 | #include <debug.h> |
37 | #include <arch/trap/trap.h> |
37 | #include <arch/trap/trap.h> |
38 | #include <arch/console.h> |
38 | #include <arch/console.h> |
39 | #include <arch/drivers/tick.h> |
39 | #include <arch/drivers/tick.h> |
40 | #include <proc/thread.h> |
40 | #include <proc/thread.h> |
41 | #include <console/console.h> |
41 | #include <console/console.h> |
42 | #include <arch/boot/boot.h> |
42 | #include <arch/boot/boot.h> |
43 | #include <arch/arch.h> |
43 | #include <arch/arch.h> |
44 | #include <arch/mm/tlb.h> |
44 | #include <arch/mm/tlb.h> |
45 | #include <mm/asid.h> |
45 | #include <mm/asid.h> |
46 | 46 | ||
47 | bootinfo_t bootinfo; |
47 | bootinfo_t bootinfo; |
48 | 48 | ||
49 | void arch_pre_mm_init(void) |
49 | void arch_pre_mm_init(void) |
50 | { |
50 | { |
51 | trap_init(); |
51 | trap_init(); |
52 | tick_init(); |
52 | tick_init(); |
53 | } |
53 | } |
54 | 54 | ||
55 | void arch_post_mm_init(void) |
55 | void arch_post_mm_init(void) |
56 | { |
56 | { |
57 | standalone_sparc64_console_init(); |
57 | standalone_sparc64_console_init(); |
58 | } |
58 | } |
59 | 59 | ||
60 | void arch_pre_smp_init(void) |
60 | void arch_pre_smp_init(void) |
61 | { |
61 | { |
62 | } |
62 | } |
63 | 63 | ||
64 | void arch_post_smp_init(void) |
64 | void arch_post_smp_init(void) |
65 | { |
65 | { |
66 | thread_t *t; |
66 | thread_t *t; |
67 | 67 | ||
68 | /* |
68 | /* |
69 | * Create thread that polls keyboard. |
69 | * Create thread that polls keyboard. |
70 | */ |
70 | */ |
71 | t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll"); |
71 | t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll"); |
72 | if (!t) |
72 | if (!t) |
73 | panic("cannot create kkbdpoll\n"); |
73 | panic("cannot create kkbdpoll\n"); |
74 | thread_ready(t); |
74 | thread_ready(t); |
75 | } |
75 | } |
76 | 76 | ||
77 | void calibrate_delay_loop(void) |
77 | void calibrate_delay_loop(void) |
78 | { |
78 | { |
79 | } |
79 | } |
80 | 80 | ||
81 | /** Acquire console back for kernel |
81 | /** Acquire console back for kernel |
82 | * |
82 | * |
83 | */ |
83 | */ |
84 | void arch_grab_console(void) |
84 | void arch_grab_console(void) |
85 | { |
85 | { |
86 | } |
86 | } |
87 | /** Return console to userspace |
87 | /** Return console to userspace |
88 | * |
88 | * |
89 | */ |
89 | */ |
90 | void arch_release_console(void) |
90 | void arch_release_console(void) |
91 | { |
91 | { |
92 | } |
92 | } |
93 | 93 | ||
94 | /** Take over TLB and trap table. |
- | |
95 | * |
- | |
96 | * Initialize ITLB and DTLB and switch to kernel |
- | |
97 | * trap table. |
- | |
98 | * |
- | |
99 | * First, demap context 0 and install the |
- | |
100 | * global 4M locked kernel mapping. |
- | |
101 | * |
- | |
102 | * Second, prepare a temporary IMMU mapping in |
- | |
103 | * context 1, switch to it, demap context 0, |
- | |
104 | * install the global 4M locked kernel mapping |
- | |
105 | * in context 0 and switch back to context 0. |
- | |
106 | * |
- | |
107 | * @param base Base address that will be hardwired in both TLBs. |
- | |
108 | */ |
- | |
109 | void take_over_tlb_and_tt(uintptr_t base) |
- | |
110 | { |
- | |
111 | tlb_tag_access_reg_t tag; |
- | |
112 | tlb_data_t data; |
- | |
113 | frame_address_t fr; |
- | |
114 | page_address_t pg; |
- | |
115 | - | ||
116 | /* |
- | |
117 | * Switch to the kernel trap table. |
- | |
118 | */ |
- | |
119 | trap_switch_trap_table(); |
- | |
120 | - | ||
121 | fr.address = base; |
- | |
122 | pg.address = base; |
- | |
123 | - | ||
124 | /* |
- | |
125 | * We do identity mapping of 4M-page at 4M. |
- | |
126 | */ |
- | |
127 | tag.value = 0; |
- | |
128 | tag.context = 0; |
- | |
129 | tag.vpn = pg.vpn; |
- | |
130 | - | ||
131 | data.value = 0; |
- | |
132 | data.v = true; |
- | |
133 | data.size = PAGESIZE_4M; |
- | |
134 | data.pfn = fr.pfn; |
- | |
135 | data.l = true; |
- | |
136 | data.cp = 1; |
- | |
137 | data.cv = 0; |
- | |
138 | data.p = true; |
- | |
139 | data.w = true; |
- | |
140 | data.g = true; |
- | |
141 | - | ||
142 | /* |
- | |
143 | * Straightforwardly demap DMUU context 0, |
- | |
144 | * and replace it with the locked kernel mapping. |
- | |
145 | */ |
- | |
146 | dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
- | |
147 | dtlb_tag_access_write(tag.value); |
- | |
148 | dtlb_data_in_write(data.value); |
- | |
149 | - | ||
150 | /* |
- | |
151 | * Install kernel code mapping in context 1 |
- | |
152 | * and switch to it. |
- | |
153 | */ |
- | |
154 | tag.context = 1; |
- | |
155 | data.g = false; |
- | |
156 | itlb_tag_access_write(tag.value); |
- | |
157 | itlb_data_in_write(data.value); |
- | |
158 | mmu_primary_context_write(1); |
- | |
159 | - | ||
160 | /* |
- | |
161 | * Demap old context 0. |
- | |
162 | */ |
- | |
163 | itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
- | |
164 | - | ||
165 | /* |
- | |
166 | * Install the locked kernel mapping in context 0 |
- | |
167 | * and switch to it. |
- | |
168 | */ |
- | |
169 | tag.context = 0; |
- | |
170 | data.g = true; |
- | |
171 | itlb_tag_access_write(tag.value); |
- | |
172 | itlb_data_in_write(data.value); |
- | |
173 | mmu_primary_context_write(0); |
- | |
174 | } |
- | |
175 | - | ||
176 | /** @} |
94 | /** @} |
177 | */ |
95 | */ |
178 | 96 |