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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Jakub Jermar |
2 | * Copyright (c) 2006 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64 |
29 | /** @addtogroup sparc64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief FireHose Controller (FHC) driver. |
34 | * @brief FireHose Controller (FHC) driver. |
35 | * |
35 | * |
36 | * Note that this driver is a result of reverse engineering |
36 | * Note that this driver is a result of reverse engineering |
37 | * rather than implementation of a specification. This |
37 | * rather than implementation of a specification. This |
38 | * is due to the fact that the FHC documentation is not |
38 | * is due to the fact that the FHC documentation is not |
39 | * publicly available. |
39 | * publicly available. |
40 | */ |
40 | */ |
41 | 41 | ||
42 | #include <arch/drivers/fhc.h> |
42 | #include <arch/drivers/fhc.h> |
43 | #include <arch/trap/interrupt.h> |
43 | #include <arch/trap/interrupt.h> |
44 | #include <mm/page.h> |
44 | #include <mm/page.h> |
45 | #include <mm/slab.h> |
45 | #include <mm/slab.h> |
46 | #include <arch/types.h> |
46 | #include <arch/types.h> |
47 | #include <genarch/ofw/ofw_tree.h> |
47 | #include <genarch/ofw/ofw_tree.h> |
48 | 48 | ||
49 | fhc_t *central_fhc = NULL; |
49 | fhc_t *central_fhc = NULL; |
50 | 50 | ||
51 | /** |
51 | /** |
52 | * I suspect this must be hardcoded in the FHC. |
52 | * I suspect this must be hardcoded in the FHC. |
53 | * If it is not, than we can read all IMAP registers |
53 | * If it is not, than we can read all IMAP registers |
54 | * and get the complete mapping. |
54 | * and get the complete mapping. |
55 | */ |
55 | */ |
56 | #define FHC_UART_INR 0x39 |
56 | #define FHC_UART_INR 0x39 |
57 | 57 | ||
58 | #define FHC_UART_IMAP 0x0 |
58 | #define FHC_UART_IMAP 0x0 |
59 | #define FHC_UART_ICLR 0x4 |
59 | #define FHC_UART_ICLR 0x4 |
60 | 60 | ||
61 | #define UART_IMAP_REG 4 |
61 | #define UART_IMAP_REG 4 |
62 | 62 | ||
63 | fhc_t *fhc_init(ofw_tree_node_t *node) |
63 | fhc_t *fhc_init(ofw_tree_node_t *node) |
64 | { |
64 | { |
65 | fhc_t *fhc; |
65 | fhc_t *fhc; |
66 | ofw_tree_property_t *prop; |
66 | ofw_tree_property_t *prop; |
67 | 67 | ||
68 | prop = ofw_tree_getprop(node, "reg"); |
68 | prop = ofw_tree_getprop(node, "reg"); |
69 | 69 | ||
70 | if (!prop || !prop->value) |
70 | if (!prop || !prop->value) |
71 | return NULL; |
71 | return NULL; |
72 | 72 | ||
73 | count_t regs = prop->size / sizeof(ofw_central_reg_t); |
73 | count_t regs = prop->size / sizeof(ofw_central_reg_t); |
74 | if (regs + 1 < UART_IMAP_REG) |
74 | if (regs + 1 < UART_IMAP_REG) |
75 | return NULL; |
75 | return NULL; |
76 | 76 | ||
77 | ofw_central_reg_t *reg = &((ofw_central_reg_t *) prop->value)[UART_IMAP_REG]; |
77 | ofw_central_reg_t *reg = &((ofw_central_reg_t *) prop->value)[UART_IMAP_REG]; |
78 | 78 | ||
79 | uintptr_t paddr; |
79 | uintptr_t paddr; |
80 | if (!ofw_central_apply_ranges(node->parent, reg, &paddr)) |
80 | if (!ofw_central_apply_ranges(node->parent, reg, &paddr)) |
81 | return NULL; |
81 | return NULL; |
82 | 82 | ||
83 | fhc = (fhc_t *) malloc(sizeof(fhc_t), FRAME_ATOMIC); |
83 | fhc = (fhc_t *) malloc(sizeof(fhc_t), FRAME_ATOMIC); |
84 | if (!fhc) |
84 | if (!fhc) |
85 | return NULL; |
85 | return NULL; |
86 | 86 | ||
87 | fhc->uart_imap = (uint32_t *) hw_map(paddr, reg->size); |
87 | fhc->uart_imap = (uint32_t *) hw_map(paddr, reg->size); |
88 | 88 | ||
89 | return fhc; |
89 | return fhc; |
90 | } |
90 | } |
91 | 91 | ||
92 | void fhc_enable_interrupt(fhc_t *fhc, int inr) |
92 | void fhc_enable_interrupt(fhc_t *fhc, int inr) |
93 | { |
93 | { |
94 | switch (inr) { |
94 | switch (inr) { |
95 | case FHC_UART_INR: |
95 | case FHC_UART_INR: |
96 | fhc->uart_imap[FHC_UART_IMAP] |= IMAP_V_MASK; |
96 | fhc->uart_imap[FHC_UART_IMAP] |= IMAP_V_MASK; |
97 | break; |
97 | break; |
98 | default: |
98 | default: |
99 | panic("Unexpected INR (%d)\n", inr); |
99 | panic("Unexpected INR (%d)\n", inr); |
100 | break; |
100 | break; |
101 | } |
101 | } |
102 | } |
102 | } |
103 | 103 | ||
104 | void fhc_clear_interrupt(fhc_t *fhc, int inr) |
104 | void fhc_clear_interrupt(void *fhcp, int inr) |
105 | { |
105 | { |
- | 106 | fhc_t *fhc = (fhc_t *)fhcp; |
|
106 | ASSERT(fhc->uart_imap); |
107 | ASSERT(fhc->uart_imap); |
107 | 108 | ||
108 | switch (inr) { |
109 | switch (inr) { |
109 | case FHC_UART_INR: |
110 | case FHC_UART_INR: |
110 | fhc->uart_imap[FHC_UART_ICLR] = 0; |
111 | fhc->uart_imap[FHC_UART_ICLR] = 0; |
111 | break; |
112 | break; |
112 | default: |
113 | default: |
113 | panic("Unexpected INR (%d)\n", inr); |
114 | panic("Unexpected INR (%d)\n", inr); |
114 | break; |
115 | break; |
115 | } |
116 | } |
116 | } |
117 | } |
117 | 118 | ||
118 | /** @} |
119 | /** @} |
119 | */ |
120 | */ |
120 | 121 |