Rev 1609 | Rev 1708 | Go to most recent revision | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 1609 | Rev 1702 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Martin Decky |
2 | * Copyright (C) 2005 Martin Decky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
- | 29 | /** @addtogroup ppc32mm |
|
- | 30 | * @{ |
|
- | 31 | */ |
|
- | 32 | /** @file |
|
- | 33 | */ |
|
- | 34 | ||
29 | #include <arch/mm/page.h> |
35 | #include <arch/mm/page.h> |
30 | #include <genarch/mm/page_pt.h> |
36 | #include <genarch/mm/page_pt.h> |
31 | #include <arch/mm/frame.h> |
37 | #include <arch/mm/frame.h> |
32 | #include <arch/asm.h> |
38 | #include <arch/asm.h> |
33 | #include <arch/interrupt.h> |
39 | #include <arch/interrupt.h> |
34 | #include <mm/frame.h> |
40 | #include <mm/frame.h> |
35 | #include <mm/page.h> |
41 | #include <mm/page.h> |
36 | #include <mm/as.h> |
42 | #include <mm/as.h> |
37 | #include <arch.h> |
43 | #include <arch.h> |
38 | #include <arch/types.h> |
44 | #include <arch/types.h> |
39 | #include <arch/exception.h> |
45 | #include <arch/exception.h> |
40 | #include <align.h> |
46 | #include <align.h> |
41 | #include <config.h> |
47 | #include <config.h> |
42 | #include <print.h> |
48 | #include <print.h> |
43 | #include <symtab.h> |
49 | #include <symtab.h> |
44 | 50 | ||
45 | static phte_t *phte; |
51 | static phte_t *phte; |
46 | 52 | ||
47 | 53 | ||
48 | /** Try to find PTE for faulting address |
54 | /** Try to find PTE for faulting address |
49 | * |
55 | * |
50 | * Try to find PTE for faulting address. |
56 | * Try to find PTE for faulting address. |
51 | * The as->lock must be held on entry to this function |
57 | * The as->lock must be held on entry to this function |
52 | * if lock is true. |
58 | * if lock is true. |
53 | * |
59 | * |
54 | * @param as Address space. |
60 | * @param as Address space. |
55 | * @param lock Lock/unlock the address space. |
61 | * @param lock Lock/unlock the address space. |
56 | * @param badvaddr Faulting virtual address. |
62 | * @param badvaddr Faulting virtual address. |
57 | * @param access Access mode that caused the fault. |
63 | * @param access Access mode that caused the fault. |
58 | * @param istate Pointer to interrupted state. |
64 | * @param istate Pointer to interrupted state. |
59 | * @param pfrc Pointer to variable where as_page_fault() return code will be stored. |
65 | * @param pfrc Pointer to variable where as_page_fault() return code will be stored. |
60 | * @return PTE on success, NULL otherwise. |
66 | * @return PTE on success, NULL otherwise. |
61 | * |
67 | * |
62 | */ |
68 | */ |
63 | static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access, |
69 | static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access, |
64 | istate_t *istate, int *pfcr) |
70 | istate_t *istate, int *pfcr) |
65 | { |
71 | { |
66 | /* |
72 | /* |
67 | * Check if the mapping exists in page tables. |
73 | * Check if the mapping exists in page tables. |
68 | */ |
74 | */ |
69 | pte_t *pte = page_mapping_find(as, badvaddr); |
75 | pte_t *pte = page_mapping_find(as, badvaddr); |
70 | if ((pte) && (pte->p)) { |
76 | if ((pte) && (pte->p)) { |
71 | /* |
77 | /* |
72 | * Mapping found in page tables. |
78 | * Mapping found in page tables. |
73 | * Immediately succeed. |
79 | * Immediately succeed. |
74 | */ |
80 | */ |
75 | return pte; |
81 | return pte; |
76 | } else { |
82 | } else { |
77 | int rc; |
83 | int rc; |
78 | 84 | ||
79 | /* |
85 | /* |
80 | * Mapping not found in page tables. |
86 | * Mapping not found in page tables. |
81 | * Resort to higher-level page fault handler. |
87 | * Resort to higher-level page fault handler. |
82 | */ |
88 | */ |
83 | page_table_unlock(as, lock); |
89 | page_table_unlock(as, lock); |
84 | switch (rc = as_page_fault(badvaddr, access, istate)) { |
90 | switch (rc = as_page_fault(badvaddr, access, istate)) { |
85 | case AS_PF_OK: |
91 | case AS_PF_OK: |
86 | /* |
92 | /* |
87 | * The higher-level page fault handler succeeded, |
93 | * The higher-level page fault handler succeeded, |
88 | * The mapping ought to be in place. |
94 | * The mapping ought to be in place. |
89 | */ |
95 | */ |
90 | page_table_lock(as, lock); |
96 | page_table_lock(as, lock); |
91 | pte = page_mapping_find(as, badvaddr); |
97 | pte = page_mapping_find(as, badvaddr); |
92 | ASSERT((pte) && (pte->p)); |
98 | ASSERT((pte) && (pte->p)); |
93 | return pte; |
99 | return pte; |
94 | case AS_PF_DEFER: |
100 | case AS_PF_DEFER: |
95 | page_table_lock(as, lock); |
101 | page_table_lock(as, lock); |
96 | *pfcr = rc; |
102 | *pfcr = rc; |
97 | return NULL; |
103 | return NULL; |
98 | case AS_PF_FAULT: |
104 | case AS_PF_FAULT: |
99 | page_table_lock(as, lock); |
105 | page_table_lock(as, lock); |
100 | printf("Page fault.\n"); |
106 | printf("Page fault.\n"); |
101 | *pfcr = rc; |
107 | *pfcr = rc; |
102 | return NULL; |
108 | return NULL; |
103 | default: |
109 | default: |
104 | panic("unexpected rc (%d)\n", rc); |
110 | panic("unexpected rc (%d)\n", rc); |
105 | } |
111 | } |
106 | } |
112 | } |
107 | } |
113 | } |
108 | 114 | ||
109 | 115 | ||
110 | static void pht_refill_fail(__address badvaddr, istate_t *istate) |
116 | static void pht_refill_fail(__address badvaddr, istate_t *istate) |
111 | { |
117 | { |
112 | char *symbol = ""; |
118 | char *symbol = ""; |
113 | char *sym2 = ""; |
119 | char *sym2 = ""; |
114 | 120 | ||
115 | char *s = get_symtab_entry(istate->pc); |
121 | char *s = get_symtab_entry(istate->pc); |
116 | if (s) |
122 | if (s) |
117 | symbol = s; |
123 | symbol = s; |
118 | s = get_symtab_entry(istate->lr); |
124 | s = get_symtab_entry(istate->lr); |
119 | if (s) |
125 | if (s) |
120 | sym2 = s; |
126 | sym2 = s; |
121 | panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2); |
127 | panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2); |
122 | } |
128 | } |
123 | 129 | ||
124 | 130 | ||
125 | static void pht_insert(const __address vaddr, const pfn_t pfn) |
131 | static void pht_insert(const __address vaddr, const pfn_t pfn) |
126 | { |
132 | { |
127 | __u32 page = (vaddr >> 12) & 0xffff; |
133 | __u32 page = (vaddr >> 12) & 0xffff; |
128 | __u32 api = (vaddr >> 22) & 0x3f; |
134 | __u32 api = (vaddr >> 22) & 0x3f; |
129 | __u32 vsid; |
135 | __u32 vsid; |
130 | 136 | ||
131 | asm volatile ( |
137 | asm volatile ( |
132 | "mfsrin %0, %1\n" |
138 | "mfsrin %0, %1\n" |
133 | : "=r" (vsid) |
139 | : "=r" (vsid) |
134 | : "r" (vaddr) |
140 | : "r" (vaddr) |
135 | ); |
141 | ); |
136 | 142 | ||
137 | /* Primary hash (xor) */ |
143 | /* Primary hash (xor) */ |
138 | __u32 h = 0; |
144 | __u32 h = 0; |
139 | __u32 hash = vsid ^ page; |
145 | __u32 hash = vsid ^ page; |
140 | __u32 base = (hash & 0x3ff) << 3; |
146 | __u32 base = (hash & 0x3ff) << 3; |
141 | __u32 i; |
147 | __u32 i; |
142 | bool found = false; |
148 | bool found = false; |
143 | 149 | ||
144 | /* Find unused or colliding |
150 | /* Find unused or colliding |
145 | PTE in PTEG */ |
151 | PTE in PTEG */ |
146 | for (i = 0; i < 8; i++) { |
152 | for (i = 0; i < 8; i++) { |
147 | if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) && (phte[base + i].api == api))) { |
153 | if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) && (phte[base + i].api == api))) { |
148 | found = true; |
154 | found = true; |
149 | break; |
155 | break; |
150 | } |
156 | } |
151 | } |
157 | } |
152 | 158 | ||
153 | if (!found) { |
159 | if (!found) { |
154 | /* Secondary hash (not) */ |
160 | /* Secondary hash (not) */ |
155 | __u32 base2 = (~hash & 0x3ff) << 3; |
161 | __u32 base2 = (~hash & 0x3ff) << 3; |
156 | 162 | ||
157 | /* Find unused or colliding |
163 | /* Find unused or colliding |
158 | PTE in PTEG */ |
164 | PTE in PTEG */ |
159 | for (i = 0; i < 8; i++) { |
165 | for (i = 0; i < 8; i++) { |
160 | if ((!phte[base2 + i].v) || ((phte[base2 + i].vsid == vsid) && (phte[base2 + i].api == api))) { |
166 | if ((!phte[base2 + i].v) || ((phte[base2 + i].vsid == vsid) && (phte[base2 + i].api == api))) { |
161 | found = true; |
167 | found = true; |
162 | base = base2; |
168 | base = base2; |
163 | h = 1; |
169 | h = 1; |
164 | break; |
170 | break; |
165 | } |
171 | } |
166 | } |
172 | } |
167 | 173 | ||
168 | if (!found) { |
174 | if (!found) { |
169 | // TODO: A/C precedence groups |
175 | // TODO: A/C precedence groups |
170 | i = page % 8; |
176 | i = page % 8; |
171 | } |
177 | } |
172 | } |
178 | } |
173 | 179 | ||
174 | phte[base + i].v = 1; |
180 | phte[base + i].v = 1; |
175 | phte[base + i].vsid = vsid; |
181 | phte[base + i].vsid = vsid; |
176 | phte[base + i].h = h; |
182 | phte[base + i].h = h; |
177 | phte[base + i].api = api; |
183 | phte[base + i].api = api; |
178 | phte[base + i].rpn = pfn; |
184 | phte[base + i].rpn = pfn; |
179 | phte[base + i].r = 0; |
185 | phte[base + i].r = 0; |
180 | phte[base + i].c = 0; |
186 | phte[base + i].c = 0; |
181 | phte[base + i].pp = 2; // FIXME |
187 | phte[base + i].pp = 2; // FIXME |
182 | } |
188 | } |
183 | 189 | ||
184 | 190 | ||
185 | /** Process Instruction/Data Storage Interrupt |
191 | /** Process Instruction/Data Storage Interrupt |
186 | * |
192 | * |
187 | * @param data True if Data Storage Interrupt. |
193 | * @param data True if Data Storage Interrupt. |
188 | * @param istate Interrupted register context. |
194 | * @param istate Interrupted register context. |
189 | * |
195 | * |
190 | */ |
196 | */ |
191 | void pht_refill(int n, istate_t *istate) |
197 | void pht_refill(int n, istate_t *istate) |
192 | { |
198 | { |
193 | __address badvaddr; |
199 | __address badvaddr; |
194 | pte_t *pte; |
200 | pte_t *pte; |
195 | int pfcr; |
201 | int pfcr; |
196 | as_t *as; |
202 | as_t *as; |
197 | bool lock; |
203 | bool lock; |
198 | 204 | ||
199 | if (AS == NULL) { |
205 | if (AS == NULL) { |
200 | as = AS_KERNEL; |
206 | as = AS_KERNEL; |
201 | lock = false; |
207 | lock = false; |
202 | } else { |
208 | } else { |
203 | as = AS; |
209 | as = AS; |
204 | lock = true; |
210 | lock = true; |
205 | } |
211 | } |
206 | 212 | ||
207 | if (n == VECTOR_DATA_STORAGE) { |
213 | if (n == VECTOR_DATA_STORAGE) { |
208 | asm volatile ( |
214 | asm volatile ( |
209 | "mfdar %0\n" |
215 | "mfdar %0\n" |
210 | : "=r" (badvaddr) |
216 | : "=r" (badvaddr) |
211 | ); |
217 | ); |
212 | } else |
218 | } else |
213 | badvaddr = istate->pc; |
219 | badvaddr = istate->pc; |
214 | 220 | ||
215 | page_table_lock(as, lock); |
221 | page_table_lock(as, lock); |
216 | 222 | ||
217 | pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfcr); |
223 | pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfcr); |
218 | if (!pte) { |
224 | if (!pte) { |
219 | switch (pfcr) { |
225 | switch (pfcr) { |
220 | case AS_PF_FAULT: |
226 | case AS_PF_FAULT: |
221 | goto fail; |
227 | goto fail; |
222 | break; |
228 | break; |
223 | case AS_PF_DEFER: |
229 | case AS_PF_DEFER: |
224 | /* |
230 | /* |
225 | * The page fault came during copy_from_uspace() |
231 | * The page fault came during copy_from_uspace() |
226 | * or copy_to_uspace(). |
232 | * or copy_to_uspace(). |
227 | */ |
233 | */ |
228 | page_table_unlock(as, lock); |
234 | page_table_unlock(as, lock); |
229 | return; |
235 | return; |
230 | default: |
236 | default: |
231 | panic("Unexpected pfrc (%d)\n", pfcr); |
237 | panic("Unexpected pfrc (%d)\n", pfcr); |
232 | } |
238 | } |
233 | } |
239 | } |
234 | 240 | ||
235 | pte->a = 1; /* Record access to PTE */ |
241 | pte->a = 1; /* Record access to PTE */ |
236 | pht_insert(badvaddr, pte->pfn); |
242 | pht_insert(badvaddr, pte->pfn); |
237 | 243 | ||
238 | page_table_unlock(as, lock); |
244 | page_table_unlock(as, lock); |
239 | return; |
245 | return; |
240 | 246 | ||
241 | fail: |
247 | fail: |
242 | page_table_unlock(as, lock); |
248 | page_table_unlock(as, lock); |
243 | pht_refill_fail(badvaddr, istate); |
249 | pht_refill_fail(badvaddr, istate); |
244 | } |
250 | } |
245 | 251 | ||
246 | 252 | ||
247 | void pht_init(void) |
253 | void pht_init(void) |
248 | { |
254 | { |
249 | memsetb((__address) phte, 1 << PHT_BITS, 0); |
255 | memsetb((__address) phte, 1 << PHT_BITS, 0); |
250 | } |
256 | } |
251 | 257 | ||
252 | 258 | ||
253 | void page_arch_init(void) |
259 | void page_arch_init(void) |
254 | { |
260 | { |
255 | if (config.cpu_active == 1) { |
261 | if (config.cpu_active == 1) { |
256 | page_mapping_operations = &pt_mapping_operations; |
262 | page_mapping_operations = &pt_mapping_operations; |
257 | 263 | ||
258 | __address cur; |
264 | __address cur; |
259 | int flags; |
265 | int flags; |
260 | 266 | ||
261 | /* Frames below 128 MB are mapped using BAT, |
267 | /* Frames below 128 MB are mapped using BAT, |
262 | map rest of the physical memory */ |
268 | map rest of the physical memory */ |
263 | for (cur = 128 << 20; cur < last_frame; cur += FRAME_SIZE) { |
269 | for (cur = 128 << 20; cur < last_frame; cur += FRAME_SIZE) { |
264 | flags = PAGE_CACHEABLE; |
270 | flags = PAGE_CACHEABLE; |
265 | if ((PA2KA(cur) >= config.base) && (PA2KA(cur) < config.base + config.kernel_size)) |
271 | if ((PA2KA(cur) >= config.base) && (PA2KA(cur) < config.base + config.kernel_size)) |
266 | flags |= PAGE_GLOBAL; |
272 | flags |= PAGE_GLOBAL; |
267 | page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); |
273 | page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); |
268 | } |
274 | } |
269 | 275 | ||
270 | /* Allocate page hash table */ |
276 | /* Allocate page hash table */ |
271 | phte_t *physical_phte = (phte_t *) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA | FRAME_PANIC)); |
277 | phte_t *physical_phte = (phte_t *) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA | FRAME_PANIC)); |
272 | phte = (phte_t *) PA2KA((__address) physical_phte); |
278 | phte = (phte_t *) PA2KA((__address) physical_phte); |
273 | 279 | ||
274 | ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0); |
280 | ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0); |
275 | pht_init(); |
281 | pht_init(); |
276 | 282 | ||
277 | asm volatile ( |
283 | asm volatile ( |
278 | "mtsdr1 %0\n" |
284 | "mtsdr1 %0\n" |
279 | : |
285 | : |
280 | : "r" ((__address) physical_phte) |
286 | : "r" ((__address) physical_phte) |
281 | ); |
287 | ); |
282 | } |
288 | } |
283 | } |
289 | } |
284 | 290 | ||
285 | 291 | ||
286 | __address hw_map(__address physaddr, size_t size) |
292 | __address hw_map(__address physaddr, size_t size) |
287 | { |
293 | { |
288 | if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) |
294 | if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) |
289 | panic("Unable to map physical memory %p (%d bytes)", physaddr, size) |
295 | panic("Unable to map physical memory %p (%d bytes)", physaddr, size) |
290 | 296 | ||
291 | __address virtaddr = PA2KA(last_frame); |
297 | __address virtaddr = PA2KA(last_frame); |
292 | pfn_t i; |
298 | pfn_t i; |
293 | for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) |
299 | for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) |
294 | page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE); |
300 | page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE); |
295 | 301 | ||
296 | last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE); |
302 | last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE); |
297 | 303 | ||
298 | return virtaddr; |
304 | return virtaddr; |
299 | } |
305 | } |
- | 306 | ||
- | 307 | /** @} |
|
- | 308 | */ |
|
- | 309 | ||
300 | 310 |