WebSVN – HelenOS – Diff – /branches/dynload/kernel/arch/mips32/src/mips32.c


/*
 * Copyright (c) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup mips32
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <arch/cp0.h>
#include <arch/exception.h>
#include <mm/as.h>
 
#include <userspace.h>
#include <arch/console.h>
#include <memstr.h>
#include <proc/thread.h>
#include <proc/uarg.h>
#include <print.h>
#include <syscall/syscall.h>
#include <sysinfo/sysinfo.h>
 
#include <arch/interrupt.h>
#include <console/chardev.h>
#include <arch/barrier.h>
#include <arch/debugger.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <genarch/drivers/dsrln/dsrlnin.h>
#include <genarch/drivers/dsrln/dsrlnout.h>
#include <genarch/srln/srln.h>
#include <macros.h>
 
#include <config.h>
#include <string.h>
#include <arch/drivers/msim.h>
 
#include <arch/asm/regname.h>
 
/* Size of the code jumping to the exception handler code
 * - J+NOP
 */
#define EXCEPTION_JUMP_SIZE  8
 
#define TLB_EXC    ((char *) 0x80000000)
#define NORM_EXC   ((char *) 0x80000180)
#define CACHE_EXC  ((char *) 0x80000100)
 
 
/* Why the linker moves the variable 64K away in assembler
 * when not in .text section?
 */
 
/* Stack pointer saved when entering user mode */
uintptr_t supervisor_sp __attribute__ ((section (".text")));
 
count_t cpu_count = 0;
 
/** Performs mips32-specific initialization before main_bsp() is called. */
void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
{
    /* Setup usermode */
    init.cnt = bootinfo->cnt;
   
    count_t i;
    for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
        init.tasks[i].addr = bootinfo->tasks[i].addr;
        init.tasks[i].size = bootinfo->tasks[i].size;
        strncpy(init.tasks[i].name, bootinfo->tasks[i].name,
            CONFIG_TASK_NAME_BUFLEN);
    }
   
    for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
        if ((bootinfo->cpumap & (1 << i)) != 0)
            cpu_count++;
    }
}
 
void arch_pre_mm_init(void)
{
    /* It is not assumed by default */
    interrupts_disable();
   
    /* Initialize dispatch table */
    exception_init();
 
    /* Copy the exception vectors to the right places */
    memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
    memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
    memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
   
    /*
     * Switch to BEV normal level so that exception vectors point to the
     * kernel. Clear the error level.
     */
    cp0_status_write(cp0_status_read() &
        ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
   
    /*
     * Mask all interrupts
     */
    cp0_mask_all_int();
   
    debugger_init();
}
 
void arch_post_mm_init(void)
{
    interrupt_init();
   
#ifdef CONFIG_FB
    /* GXemul framebuffer */
    fb_properties_t gxemul_prop = {
        .addr = 0x12000000,
        .offset = 0,
        .x = 640,
        .y = 480,
        .scan = 1920,
        .visual = VISUAL_BGR_8_8_8,
    };
    fb_init(&gxemul_prop);
#else
#ifdef CONFIG_MIPS_PRN
    dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);
#endif /* CONFIG_MIPS_PRN */
#endif /* CONFIG_FB */
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
#ifdef CONFIG_MIPS_KBD
 
 
    /*
     * Initialize the msim/GXemul keyboard port. Then initialize the serial line
     * module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts.
     */
    indev_t *kbrdin = dsrlnin_init((dsrlnin_t *) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ);
    if (kbrdin) {
        srln_init(kbrdin);
        cp0_unmask_int(MSIM_KBD_IRQ);
    }
   
    /*
     * This is the necessary evil until the userspace driver is entirely
     * self-sufficient.
     */
    sysinfo_set_item_val("kbd", NULL, true);
 
    sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ);
    sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS);
#endif
}
 
void calibrate_delay_loop(void)
{
}
 
void userspace(uspace_arg_t *kernel_uarg)
{
    /* EXL = 1, UM = 1, IE = 1 */
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
        cp0_status_um_bit | cp0_status_ie_enabled_bit));
    cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
    userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
        (uintptr_t) kernel_uarg->uspace_uarg,
        (uintptr_t) kernel_uarg->uspace_entry);
   
    while (1);
}
 
/** Perform mips32 specific tasks needed before the new task is run. */
void before_task_runs_arch(void)
{
}
 
/** Perform mips32 specific tasks needed before the new thread is scheduled. */
void before_thread_runs_arch(void)
{
    supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
        SP_DELTA];
}
 
void after_thread_ran_arch(void)
{
}
 
/** Set thread-local-storage pointer
 *
 * We have it currently in K1, it is
 * possible to have it separately in the future.
 */
unative_t sys_tls_set(unative_t addr)
{
    return 0;
}
 
void arch_reboot(void)
{
    ___halt();
    while (1);
}
 
/** Construct function pointer
 *
 * @param fptr   function pointer structure
 * @param addr   function address
 * @param caller calling function address
 *
 * @return address of the function pointer
 *
 */
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
    return addr;
}
 
/** @}
 */
 

Rev 4346	Rev 4347
1	/*	1	/*
2	* Copyright (c) 2003-2004 Jakub Jermar	2	* Copyright (c) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32	29	/** @addtogroup mips32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <arch/cp0.h>	36	#include <arch/cp0.h>
37	#include <arch/exception.h>	37	#include <arch/exception.h>
38	#include <mm/as.h>	38	#include <mm/as.h>
39		39
40	#include <userspace.h>	40	#include <userspace.h>
41	#include <arch/console.h>	41	#include <arch/console.h>
42	#include <memstr.h>	42	#include <memstr.h>
43	#include <proc/thread.h>	43	#include <proc/thread.h>
44	#include <proc/uarg.h>	44	#include <proc/uarg.h>
45	#include <print.h>	45	#include <print.h>
46	#include <syscall/syscall.h>	46	#include <syscall/syscall.h>
47	#include <sysinfo/sysinfo.h>	47	#include <sysinfo/sysinfo.h>
48		48
49	#include <arch/interrupt.h>	49	#include <arch/interrupt.h>
50	#include <console/chardev.h>	50	#include <console/chardev.h>
51	#include <arch/barrier.h>	51	#include <arch/barrier.h>
52	#include <arch/debugger.h>	52	#include <arch/debugger.h>
53	#include <genarch/fb/fb.h>	53	#include <genarch/fb/fb.h>
54	#include <genarch/fb/visuals.h>	54	#include <genarch/fb/visuals.h>
55	#include <genarch/drivers/dsrln/dsrlnin.h>	55	#include <genarch/drivers/dsrln/dsrlnin.h>
56	#include <genarch/drivers/dsrln/dsrlnout.h>	56	#include <genarch/drivers/dsrln/dsrlnout.h>
57	#include <genarch/srln/srln.h>	57	#include <genarch/srln/srln.h>
58	#include <macros.h>	58	#include <macros.h>
59	#include <ddi/device.h>	-
60	#include <config.h>	59	#include <config.h>
61	#include <string.h>	60	#include <string.h>
62	#include <arch/drivers/msim.h>	61	#include <arch/drivers/msim.h>
63		62
64	#include <arch/asm/regname.h>	63	#include <arch/asm/regname.h>
65		64
66	/* Size of the code jumping to the exception handler code	65	/* Size of the code jumping to the exception handler code
67	* - J+NOP	66	* - J+NOP
68	*/	67	*/
69	#define EXCEPTION_JUMP_SIZE 8	68	#define EXCEPTION_JUMP_SIZE 8
70		69
71	#define TLB_EXC ((char *) 0x80000000)	70	#define TLB_EXC ((char *) 0x80000000)
72	#define NORM_EXC ((char *) 0x80000180)	71	#define NORM_EXC ((char *) 0x80000180)
73	#define CACHE_EXC ((char *) 0x80000100)	72	#define CACHE_EXC ((char *) 0x80000100)
74		73
75		74
76	/* Why the linker moves the variable 64K away in assembler	75	/* Why the linker moves the variable 64K away in assembler
77	* when not in .text section?	76	* when not in .text section?
78	*/	77	*/
79		78
80	/* Stack pointer saved when entering user mode */	79	/* Stack pointer saved when entering user mode */
81	uintptr_t supervisor_sp __attribute__ ((section (".text")));	80	uintptr_t supervisor_sp __attribute__ ((section (".text")));
82		81
83	count_t cpu_count = 0;	82	count_t cpu_count = 0;
84		83
85	/** Performs mips32-specific initialization before main_bsp() is called. */	84	/** Performs mips32-specific initialization before main_bsp() is called. */
86	void arch_pre_main(void entry __attribute__((unused)), bootinfo_t bootinfo)	85	void arch_pre_main(void entry __attribute__((unused)), bootinfo_t bootinfo)
87	{	86	{
88	/* Setup usermode */	87	/* Setup usermode */
89	init.cnt = bootinfo->cnt;	88	init.cnt = bootinfo->cnt;
90		89
91	count_t i;	90	count_t i;
92	for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {	91	for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
93	init.tasks[i].addr = bootinfo->tasks[i].addr;	92	init.tasks[i].addr = bootinfo->tasks[i].addr;
94	init.tasks[i].size = bootinfo->tasks[i].size;	93	init.tasks[i].size = bootinfo->tasks[i].size;
95	strncpy(init.tasks[i].name, bootinfo->tasks[i].name,	94	strncpy(init.tasks[i].name, bootinfo->tasks[i].name,
96	CONFIG_TASK_NAME_BUFLEN);	95	CONFIG_TASK_NAME_BUFLEN);
97	}	96	}
98		97
99	for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {	98	for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
100	if ((bootinfo->cpumap & (1 << i)) != 0)	99	if ((bootinfo->cpumap & (1 << i)) != 0)
101	cpu_count++;	100	cpu_count++;
102	}	101	}
103	}	102	}
104		103
105	void arch_pre_mm_init(void)	104	void arch_pre_mm_init(void)
106	{	105	{
107	/* It is not assumed by default */	106	/* It is not assumed by default */
108	interrupts_disable();	107	interrupts_disable();
109		108
110	/* Initialize dispatch table */	109	/* Initialize dispatch table */
111	exception_init();	110	exception_init();
112		111
113	/* Copy the exception vectors to the right places */	112	/* Copy the exception vectors to the right places */
114	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);	113	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
115	smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);	114	smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
116	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);	115	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
117	smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);	116	smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
118	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);	117	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
119	smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);	118	smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
120		119
121	/*	120	/*
122	* Switch to BEV normal level so that exception vectors point to the	121	* Switch to BEV normal level so that exception vectors point to the
123	* kernel. Clear the error level.	122	* kernel. Clear the error level.
124	*/	123	*/
125	cp0_status_write(cp0_status_read() &	124	cp0_status_write(cp0_status_read() &
126	~(cp0_status_bev_bootstrap_bit \| cp0_status_erl_error_bit));	125	~(cp0_status_bev_bootstrap_bit \| cp0_status_erl_error_bit));
127		126
128	/*	127	/*
129	* Mask all interrupts	128	* Mask all interrupts
130	*/	129	*/
131	cp0_mask_all_int();	130	cp0_mask_all_int();
132		131
133	debugger_init();	132	debugger_init();
134	}	133	}
135		134
136	void arch_post_mm_init(void)	135	void arch_post_mm_init(void)
137	{	136	{
138	interrupt_init();	137	interrupt_init();
139		138
140	#ifdef CONFIG_FB	139	#ifdef CONFIG_FB
141	/* GXemul framebuffer */	140	/* GXemul framebuffer */
142	fb_properties_t gxemul_prop = {	141	fb_properties_t gxemul_prop = {
143	.addr = 0x12000000,	142	.addr = 0x12000000,
144	.offset = 0,	143	.offset = 0,
145	.x = 640,	144	.x = 640,
146	.y = 480,	145	.y = 480,
147	.scan = 1920,	146	.scan = 1920,
148	.visual = VISUAL_BGR_8_8_8,	147	.visual = VISUAL_BGR_8_8_8,
149	};	148	};
150	fb_init(&gxemul_prop);	149	fb_init(&gxemul_prop);
151	#else	150	#else
152	#ifdef CONFIG_MIPS_PRN	151	#ifdef CONFIG_MIPS_PRN
153	dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);	152	dsrlnout_init((ioport8_t *) MSIM_KBD_ADDRESS);
154	#endif /* CONFIG_MIPS_PRN */	153	#endif /* CONFIG_MIPS_PRN */
155	#endif /* CONFIG_FB */	154	#endif /* CONFIG_FB */
156	}	155	}
157		156
158	void arch_post_cpu_init(void)	157	void arch_post_cpu_init(void)
159	{	158	{
160	}	159	}
161		160
162	void arch_pre_smp_init(void)	161	void arch_pre_smp_init(void)
163	{	162	{
164	}	163	}
165		164
166	void arch_post_smp_init(void)	165	void arch_post_smp_init(void)
167	{	166	{
168	#ifdef CONFIG_MIPS_KBD	167	#ifdef CONFIG_MIPS_KBD
169	devno_t devno = device_assign_devno();	-
170		-
171	/*	168	/*
172	* Initialize the msim/GXemul keyboard port. Then initialize the serial line	169	* Initialize the msim/GXemul keyboard port. Then initialize the serial line
173	* module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts.	170	* module and connect it to the msim/GXemul keyboard. Enable keyboard interrupts.
174	*/	171	*/
175	indev_t kbrdin = dsrlnin_init((dsrlnin_t ) MSIM_KBD_ADDRESS, devno, MSIM_KBD_IRQ);	172	indev_t kbrdin = dsrlnin_init((dsrlnin_t ) MSIM_KBD_ADDRESS, MSIM_KBD_IRQ);
176	if (kbrdin) {	173	if (kbrdin) {
177	srln_init(kbrdin);	174	srln_init(kbrdin);
178	cp0_unmask_int(MSIM_KBD_IRQ);	175	cp0_unmask_int(MSIM_KBD_IRQ);
179	}	176	}
180		177
181	/*	178	/*
182	* This is the necessary evil until the userspace driver is entirely	179	* This is the necessary evil until the userspace driver is entirely
183	* self-sufficient.	180	* self-sufficient.
184	*/	181	*/
185	sysinfo_set_item_val("kbd", NULL, true);	182	sysinfo_set_item_val("kbd", NULL, true);
186	sysinfo_set_item_val("kbd.devno", NULL, devno);	-
187	sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ);	183	sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ);
188	sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS);	184	sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS);
189	#endif	185	#endif
190	}	186	}
191		187
192	void calibrate_delay_loop(void)	188	void calibrate_delay_loop(void)
193	{	189	{
194	}	190	}
195		191
196	void userspace(uspace_arg_t *kernel_uarg)	192	void userspace(uspace_arg_t *kernel_uarg)
197	{	193	{
198	/* EXL = 1, UM = 1, IE = 1 */	194	/* EXL = 1, UM = 1, IE = 1 */
199	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|	195	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|
200	cp0_status_um_bit \| cp0_status_ie_enabled_bit));	196	cp0_status_um_bit \| cp0_status_ie_enabled_bit));
201	cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);	197	cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
202	userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),	198	userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
203	(uintptr_t) kernel_uarg->uspace_uarg,	199	(uintptr_t) kernel_uarg->uspace_uarg,
204	(uintptr_t) kernel_uarg->uspace_entry);	200	(uintptr_t) kernel_uarg->uspace_entry);
205		201
206	while (1);	202	while (1);
207	}	203	}
208		204
209	/** Perform mips32 specific tasks needed before the new task is run. */	205	/** Perform mips32 specific tasks needed before the new task is run. */
210	void before_task_runs_arch(void)	206	void before_task_runs_arch(void)
211	{	207	{
212	}	208	}
213		209
214	/** Perform mips32 specific tasks needed before the new thread is scheduled. */	210	/** Perform mips32 specific tasks needed before the new thread is scheduled. */
215	void before_thread_runs_arch(void)	211	void before_thread_runs_arch(void)
216	{	212	{
217	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -	213	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
218	SP_DELTA];	214	SP_DELTA];
219	}	215	}
220		216
221	void after_thread_ran_arch(void)	217	void after_thread_ran_arch(void)
222	{	218	{
223	}	219	}
224		220
225	/** Set thread-local-storage pointer	221	/** Set thread-local-storage pointer
226	*	222	*
227	* We have it currently in K1, it is	223	* We have it currently in K1, it is
228	* possible to have it separately in the future.	224	* possible to have it separately in the future.
229	*/	225	*/
230	unative_t sys_tls_set(unative_t addr)	226	unative_t sys_tls_set(unative_t addr)
231	{	227	{
232	return 0;	228	return 0;
233	}	229	}
234		230
235	void arch_reboot(void)	231	void arch_reboot(void)
236	{	232	{
237	___halt();	233	___halt();
238	while (1);	234	while (1);
239	}	235	}
240		236
241	/** Construct function pointer	237	/** Construct function pointer
242	*	238	*
243	* @param fptr function pointer structure	239	* @param fptr function pointer structure
244	* @param addr function address	240	* @param addr function address
245	* @param caller calling function address	241	* @param caller calling function address
246	*	242	*
247	* @return address of the function pointer	243	* @return address of the function pointer
248	*	244	*
249	*/	245	*/
250	void arch_construct_function(fncptr_t fptr, void addr, void caller)	246	void arch_construct_function(fncptr_t fptr, void addr, void caller)
251	{	247	{
252	return addr;	248	return addr;
253	}	249	}
254		250
255	/** @}	251	/** @}
256	*/	252	*/
257		253

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(root)/branches/dynload/kernel/arch/mips32/src/mips32.c @ 4346 – Rev 4346 → 4347