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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Ondrej Palkovsky |
2 | * Copyright (c) 2005 Ondrej Palkovsky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup mips32 |
29 | /** @addtogroup mips32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <interrupt.h> |
35 | #include <interrupt.h> |
36 | #include <ipc/irq.h> |
36 | #include <ipc/irq.h> |
37 | #include <console/chardev.h> |
37 | #include <console/chardev.h> |
38 | #include <arch/drivers/msim.h> |
38 | #include <arch/drivers/msim.h> |
39 | #include <arch/cp0.h> |
39 | #include <arch/cp0.h> |
40 | #include <console/console.h> |
40 | #include <console/console.h> |
41 | #include <sysinfo/sysinfo.h> |
41 | #include <sysinfo/sysinfo.h> |
- | 42 | #include <ddi/ddi.h> |
|
42 | 43 | ||
43 | /** Address of devices. */ |
- | |
44 | #define MSIM_VIDEORAM 0xB0000000 |
- | |
45 | #define MSIM_KBD_ADDRESS 0xB0000000 |
- | |
46 | #define MSIM_KBD_IRQ 2 |
44 | static parea_t msim_parea; |
47 | - | ||
48 | static chardev_t console; |
45 | static chardev_t console; |
49 | static irq_t msim_irq; |
46 | static irq_t msim_irq; |
50 | 47 | ||
51 | static void msim_write(chardev_t *dev, const char ch); |
48 | static void msim_write(chardev_t *dev, const char ch); |
52 | static void msim_enable(chardev_t *dev); |
49 | static void msim_enable(chardev_t *dev); |
53 | static void msim_disable(chardev_t *dev); |
50 | static void msim_disable(chardev_t *dev); |
54 | static char msim_do_read(chardev_t *dev); |
51 | static char msim_do_read(chardev_t *dev); |
55 | 52 | ||
56 | static chardev_operations_t msim_ops = { |
53 | static chardev_operations_t msim_ops = { |
57 | .resume = msim_enable, |
54 | .resume = msim_enable, |
58 | .suspend = msim_disable, |
55 | .suspend = msim_disable, |
59 | .write = msim_write, |
56 | .write = msim_write, |
60 | .read = msim_do_read, |
57 | .read = msim_do_read, |
61 | }; |
58 | }; |
62 | 59 | ||
63 | /** Putchar that works with MSIM & gxemul */ |
60 | /** Putchar that works with MSIM & gxemul */ |
64 | void msim_write(chardev_t *dev, const char ch) |
61 | void msim_write(chardev_t *dev, const char ch) |
65 | { |
62 | { |
66 | *((char *) MSIM_VIDEORAM) = ch; |
63 | *((char *) MSIM_VIDEORAM) = ch; |
67 | } |
64 | } |
68 | 65 | ||
69 | /* Called from getc(). */ |
66 | /* Called from getc(). */ |
70 | void msim_enable(chardev_t *dev) |
67 | void msim_enable(chardev_t *dev) |
71 | { |
68 | { |
72 | cp0_unmask_int(MSIM_KBD_IRQ); |
69 | cp0_unmask_int(MSIM_KBD_IRQ); |
73 | } |
70 | } |
74 | 71 | ||
75 | /* Called from getc(). */ |
72 | /* Called from getc(). */ |
76 | void msim_disable(chardev_t *dev) |
73 | void msim_disable(chardev_t *dev) |
77 | { |
74 | { |
78 | cp0_mask_int(MSIM_KBD_IRQ); |
75 | cp0_mask_int(MSIM_KBD_IRQ); |
79 | } |
76 | } |
80 | 77 | ||
81 | #include <print.h> |
78 | #include <print.h> |
82 | /** Read character using polling, assume interrupts disabled */ |
79 | /** Read character using polling, assume interrupts disabled */ |
83 | static char msim_do_read(chardev_t *dev) |
80 | static char msim_do_read(chardev_t *dev) |
84 | { |
81 | { |
85 | char ch; |
82 | char ch; |
86 | 83 | ||
87 | while (1) { |
84 | while (1) { |
88 | ch = *((volatile char *) MSIM_KBD_ADDRESS); |
85 | ch = *((volatile char *) MSIM_KBD_ADDRESS); |
89 | if (ch) { |
86 | if (ch) { |
90 | if (ch == '\r') |
87 | if (ch == '\r') |
91 | return '\n'; |
88 | return '\n'; |
92 | if (ch == 0x7f) |
89 | if (ch == 0x7f) |
93 | return '\b'; |
90 | return '\b'; |
94 | return ch; |
91 | return ch; |
95 | } |
92 | } |
96 | } |
93 | } |
97 | } |
94 | } |
98 | 95 | ||
99 | /** Process keyboard interrupt. */ |
96 | /** Process keyboard interrupt. */ |
100 | static void msim_irq_handler(irq_t *irq, void *arg, ...) |
97 | static void msim_irq_handler(irq_t *irq, void *arg, ...) |
101 | { |
98 | { |
102 | if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) |
99 | if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) |
103 | ipc_irq_send_notif(irq); |
100 | ipc_irq_send_notif(irq); |
104 | else { |
101 | else { |
105 | char ch = 0; |
102 | char ch = 0; |
106 | 103 | ||
107 | ch = *((char *) MSIM_KBD_ADDRESS); |
104 | ch = *((char *) MSIM_KBD_ADDRESS); |
108 | if (ch =='\r') |
105 | if (ch =='\r') |
109 | ch = '\n'; |
106 | ch = '\n'; |
110 | if (ch == 0x7f) |
107 | if (ch == 0x7f) |
111 | ch = '\b'; |
108 | ch = '\b'; |
112 | chardev_push_character(&console, ch); |
109 | chardev_push_character(&console, ch); |
113 | } |
110 | } |
114 | } |
111 | } |
115 | 112 | ||
116 | static irq_ownership_t msim_claim(void) |
113 | static irq_ownership_t msim_claim(void) |
117 | { |
114 | { |
118 | return IRQ_ACCEPT; |
115 | return IRQ_ACCEPT; |
119 | } |
116 | } |
120 | 117 | ||
121 | void msim_kbd_grab(void) |
118 | void msim_kbd_grab(void) |
122 | { |
119 | { |
123 | ipl_t ipl = interrupts_disable(); |
120 | ipl_t ipl = interrupts_disable(); |
124 | spinlock_lock(&msim_irq.lock); |
121 | spinlock_lock(&msim_irq.lock); |
125 | msim_irq.notif_cfg.notify = false; |
122 | msim_irq.notif_cfg.notify = false; |
126 | spinlock_unlock(&msim_irq.lock); |
123 | spinlock_unlock(&msim_irq.lock); |
127 | interrupts_restore(ipl); |
124 | interrupts_restore(ipl); |
128 | } |
125 | } |
129 | 126 | ||
130 | void msim_kbd_release(void) |
127 | void msim_kbd_release(void) |
131 | { |
128 | { |
132 | ipl_t ipl = interrupts_disable(); |
129 | ipl_t ipl = interrupts_disable(); |
133 | spinlock_lock(&msim_irq.lock); |
130 | spinlock_lock(&msim_irq.lock); |
134 | if (msim_irq.notif_cfg.answerbox) |
131 | if (msim_irq.notif_cfg.answerbox) |
135 | msim_irq.notif_cfg.notify = true; |
132 | msim_irq.notif_cfg.notify = true; |
136 | spinlock_unlock(&msim_irq.lock); |
133 | spinlock_unlock(&msim_irq.lock); |
137 | interrupts_restore(ipl); |
134 | interrupts_restore(ipl); |
138 | } |
135 | } |
139 | 136 | ||
140 | 137 | ||
141 | /* Return console object representing msim console */ |
138 | /* Return console object representing msim console */ |
142 | void msim_console(devno_t devno) |
139 | void msim_console(devno_t devno) |
143 | { |
140 | { |
144 | chardev_initialize("msim_console", &console, &msim_ops); |
141 | chardev_initialize("msim_console", &console, &msim_ops); |
145 | stdin = &console; |
142 | stdin = &console; |
146 | stdout = &console; |
143 | stdout = &console; |
147 | 144 | ||
148 | irq_initialize(&msim_irq); |
145 | irq_initialize(&msim_irq); |
149 | msim_irq.devno = devno; |
146 | msim_irq.devno = devno; |
150 | msim_irq.inr = MSIM_KBD_IRQ; |
147 | msim_irq.inr = MSIM_KBD_IRQ; |
151 | msim_irq.claim = msim_claim; |
148 | msim_irq.claim = msim_claim; |
152 | msim_irq.handler = msim_irq_handler; |
149 | msim_irq.handler = msim_irq_handler; |
153 | irq_register(&msim_irq); |
150 | irq_register(&msim_irq); |
154 | 151 | ||
155 | cp0_unmask_int(MSIM_KBD_IRQ); |
152 | cp0_unmask_int(MSIM_KBD_IRQ); |
156 | 153 | ||
157 | sysinfo_set_item_val("kbd", NULL, true); |
154 | sysinfo_set_item_val("kbd", NULL, true); |
158 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
155 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
159 | sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); |
156 | sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); |
160 | sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS); |
157 | sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS); |
- | 158 | ||
- | 159 | msim_parea.pbase = KA2PA(MSIM_VIDEORAM); |
|
- | 160 | msim_parea.vbase = MSIM_VIDEORAM; |
|
- | 161 | msim_parea.frames = 1; |
|
- | 162 | msim_parea.cacheable = false; |
|
- | 163 | ddi_parea_register(&msim_parea); |
|
- | 164 | ||
- | 165 | sysinfo_set_item_val("fb", NULL, true); |
|
- | 166 | sysinfo_set_item_val("fb.kind", NULL, 3); |
|
- | 167 | sysinfo_set_item_val("fb.address.physical", NULL, KA2PA(MSIM_VIDEORAM)); |
|
161 | } |
168 | } |
162 | 169 | ||
163 | /** @} |
170 | /** @} |
164 | */ |
171 | */ |
165 | 172 |