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| 1 | /* |
1 | /* |
| 2 | * Copyright (C) 2006 Jakub Jermar |
2 | * Copyright (C) 2006 Jakub Jermar |
| 3 | * Copyright (C) 2006 Jakub Vana |
3 | * Copyright (C) 2006 Jakub Vana |
| 4 | * All rights reserved. |
4 | * All rights reserved. |
| 5 | * |
5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
8 | * are met: |
| 9 | * |
9 | * |
| 10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
| 14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
| 15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
| 16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
| 17 | * |
17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 28 | */ |
28 | */ |
| 29 | 29 | ||
| 30 | #include <arch/mm/page.h> |
30 | #include <arch/mm/page.h> |
| 31 | #include <genarch/mm/page_ht.h> |
31 | #include <genarch/mm/page_ht.h> |
| 32 | #include <mm/asid.h> |
32 | #include <mm/asid.h> |
| 33 | #include <arch/types.h> |
33 | #include <arch/types.h> |
| 34 | #include <print.h> |
34 | #include <print.h> |
| 35 | #include <mm/page.h> |
35 | #include <mm/page.h> |
| 36 | #include <mm/frame.h> |
36 | #include <mm/frame.h> |
| 37 | #include <config.h> |
37 | #include <config.h> |
| 38 | #include <panic.h> |
38 | #include <panic.h> |
| 39 | #include <arch/asm.h> |
39 | #include <arch/asm.h> |
| 40 | #include <arch/barrier.h> |
40 | #include <arch/barrier.h> |
| - | 41 | #include <memstr.h> |
|
| 41 | 42 | ||
| 42 | /** Initialize VHPT and region registers. */ |
43 | /** Initialize VHPT and region registers. */ |
| 43 | static void set_vhpt_environment(void) |
44 | static void set_vhpt_environment(void) |
| 44 | { |
45 | { |
| 45 | region_register rr; |
46 | region_register rr; |
| 46 | pta_register pta; |
47 | pta_register pta; |
| 47 | int i; |
48 | int i; |
| 48 | 49 | ||
| 49 | /* |
50 | /* |
| 50 | * First set up kernel region register. |
51 | * First set up kernel region register. |
| 51 | */ |
52 | */ |
| 52 | rr.word = rr_read(VRN_KERNEL); |
53 | rr.word = rr_read(VRN_KERNEL); |
| 53 | rr.map.ve = 0; /* disable VHPT walker */ |
54 | rr.map.ve = 0; /* disable VHPT walker */ |
| 54 | rr.map.ps = PAGE_WIDTH; |
55 | rr.map.ps = PAGE_WIDTH; |
| 55 | rr.map.rid = ASID_KERNEL; |
56 | rr.map.rid = ASID_KERNEL; |
| 56 | rr_write(VRN_KERNEL, rr.word); |
57 | rr_write(VRN_KERNEL, rr.word); |
| 57 | srlz_i(); |
58 | srlz_i(); |
| 58 | srlz_d(); |
59 | srlz_d(); |
| 59 | 60 | ||
| 60 | /* |
61 | /* |
| 61 | * And invalidate the rest of region register. |
62 | * And invalidate the rest of region register. |
| 62 | */ |
63 | */ |
| 63 | for(i = 0; i < REGION_REGISTERS; i++) { |
64 | for(i = 0; i < REGION_REGISTERS; i++) { |
| 64 | /* skip kernel rr */ |
65 | /* skip kernel rr */ |
| 65 | if (i == VRN_KERNEL) |
66 | if (i == VRN_KERNEL) |
| 66 | continue; |
67 | continue; |
| 67 | 68 | ||
| 68 | rr.word == rr_read(i); |
69 | rr.word == rr_read(i); |
| - | 70 | rr.map.ve = 0; /* disable VHPT walker */ |
|
| 69 | rr.map.rid = ASID_INVALID; |
71 | rr.map.rid = ASID_INVALID; |
| 70 | rr_write(i, rr.word); |
72 | rr_write(i, rr.word); |
| 71 | srlz_i(); |
73 | srlz_i(); |
| 72 | srlz_d(); |
74 | srlz_d(); |
| 73 | } |
75 | } |
| 74 | 76 | ||
| 75 | /* |
77 | /* |
| 76 | * Allocate VHPT and invalidate all its entries. |
78 | * Allocate VHPT and invalidate all its entries. |
| 77 | */ |
79 | */ |
| 78 | page_ht = (pte_t *) frame_alloc(FRAME_KA, VHPT_WIDTH - FRAME_WIDTH, NULL); |
80 | page_ht = (pte_t *) frame_alloc(FRAME_KA, VHPT_WIDTH - FRAME_WIDTH, NULL); |
| - | 81 | memsetb((__address) page_ht, VHPT_SIZE, 0); |
|
| 79 | ht_invalidate_all(); |
82 | ht_invalidate_all(); |
| 80 | 83 | ||
| 81 | /* |
84 | /* |
| 82 | * Set up PTA register. |
85 | * Set up PTA register. |
| 83 | */ |
86 | */ |
| 84 | pta.word = pta_read(); |
87 | pta.word = pta_read(); |
| 85 | pta.map.ve = 0; /* disable VHPT walker */ |
88 | pta.map.ve = 0; /* disable VHPT walker */ |
| 86 | pta.map.vf = 1; /* large entry format */ |
89 | pta.map.vf = 1; /* large entry format */ |
| 87 | pta.map.size = VHPT_WIDTH; |
90 | pta.map.size = VHPT_WIDTH; |
| 88 | pta.map.base = (__address) page_ht; |
91 | pta.map.base = (__address) page_ht; |
| 89 | pta_write(pta.word); |
92 | pta_write(pta.word); |
| 90 | srlz_i(); |
93 | srlz_i(); |
| 91 | srlz_d(); |
94 | srlz_d(); |
| 92 | } |
95 | } |
| 93 | 96 | ||
| 94 | /** Initialize ia64 virtual address translation subsystem. */ |
97 | /** Initialize ia64 virtual address translation subsystem. */ |
| 95 | void page_arch_init(void) |
98 | void page_arch_init(void) |
| 96 | { |
99 | { |
| 97 | page_operations = &page_ht_operations; |
100 | page_operations = &page_ht_operations; |
| 98 | pk_disable(); |
101 | pk_disable(); |
| 99 | set_vhpt_environment(); |
102 | set_vhpt_environment(); |
| 100 | } |
103 | } |
| - | 104 | ||
| - | 105 | /** Calculate address of collision chain from VPN and ASID. |
|
| - | 106 | * |
|
| - | 107 | * This is rather non-trivial function. |
|
| - | 108 | * First, it has to translate ASID to RID. |
|
| - | 109 | * This is achieved by taking VRN bits of |
|
| - | 110 | * page into account. |
|
| - | 111 | * Second, it must preserve the region register |
|
| - | 112 | * it writes the RID to. |
|
| - | 113 | * |
|
| - | 114 | * @param page Address of virtual page including VRN bits. |
|
| - | 115 | * @param asid Address space identifier. |
|
| - | 116 | * |
|
| - | 117 | * @return Head of VHPT collision chain for page and asid. |
|
| - | 118 | */ |
|
| - | 119 | pte_t *vhpt_hash(__address page, asid_t asid) |
|
| - | 120 | { |
|
| - | 121 | region_register rr_save, rr; |
|
| - | 122 | pte_t *t; |
|
| - | 123 | ||
| - | 124 | rr_save.word = rr_read(VRN_WORK); |
|
| - | 125 | rr.word = rr_save.word; |
|
| - | 126 | if ((page >> VRN_SHIFT) != VRN_KERNEL) |
|
| - | 127 | rr.map.rid = (asid * RIDS_PER_ASID) + (page >> VRN_SHIFT); |
|
| - | 128 | else |
|
| - | 129 | rr.map.rid = ASID_KERNEL; |
|
| - | 130 | rr_write(VRN_WORK, rr.word); |
|
| - | 131 | srlz_i(); |
|
| - | 132 | t = (pte_t *) thash((VRN_WORK << VRN_SHIFT) | (~(VRN_MASK) & page)); |
|
| - | 133 | rr_write(VRN_WORK, rr_save.word); |
|
| - | 134 | srlz_i(); |
|
| - | 135 | srlz_d(); |
|
| - | 136 | ||
| - | 137 | return t; |
|
| - | 138 | } |
|
| 101 | 139 | ||