WebSVN – HelenOS – Diff – /branches/dynload/kernel/arch/ia64/src/ia64.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <arch/drivers/ski.h>
#include <arch/drivers/it.h>
#include <arch/interrupt.h>
#include <arch/barrier.h>
#include <arch/asm.h>
#include <arch/register.h>
#include <arch/types.h>
#include <arch/context.h>
#include <arch/stack.h>
#include <arch/mm/page.h>
#include <mm/as.h>
#include <config.h>
#include <userspace.h>
#include <console/console.h>
#include <proc/uarg.h>
#include <syscall/syscall.h>
#include <ddi/irq.h>
#include <arch/bootinfo.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <genarch/kbrd/kbrd.h>
#include <genarch/srln/srln.h>
#include <genarch/drivers/i8042/i8042.h>
#include <genarch/drivers/ns16550/ns16550.h>
#include <arch/drivers/kbd.h>
#include <smp/smp.h>
#include <smp/ipi.h>
#include <arch/atomic.h>
#include <panic.h>
#include <print.h>
#include <sysinfo/sysinfo.h>
#include <string.h>
 
/* NS16550 as a COM 1 */
#define NS16550_IRQ  (4 + LEGACY_INTERRUPT_BASE)
 
bootinfo_t *bootinfo;
 
static uint64_t iosapic_base = 0xfec00000;
 
/** Performs ia64-specific initialization before main_bsp() is called. */
void arch_pre_main(void)
{
    /* Setup usermode init tasks. */
 
    unsigned int i;
   
    init.cnt = bootinfo->taskmap.count;
   
    for (i = 0; i < init.cnt; i++) {
        init.tasks[i].addr =
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
            VRN_MASK;
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
        str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
            bootinfo->taskmap.tasks[i].name);
    }
}
 
void arch_pre_mm_init(void)
{
    /*
     * Set Interruption Vector Address (i.e. location of interruption vector
     * table).
     */
    iva_write((uintptr_t) &ivt);
    srlz_d();
   
}
 
static void iosapic_init(void)
{
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
    int i;
   
    int myid, myeid;
   
    myid = ia64_get_cpu_id();
    myeid = ia64_get_cpu_eid();
 
    for (i = 0; i < 16; i++) {
        if (i == 2)
            continue;    /* Disable Cascade interrupt */
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
        srlz_d();
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
            myeid << (48 - 32);
        srlz_d();
    }
 
}
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        iosapic_init();
        irq_init(INR_COUNT, INR_COUNT);
    }
    it_init(); 
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
#ifdef MACHINE_ski
    ski_instance_t *ski_instance = skiin_init();
    if (ski_instance) {
        srln_instance_t *srln_instance = srln_init();
        if (srln_instance) {
            indev_t *sink = stdin_wire();
            indev_t *srln = srln_wire(srln_instance, sink);
            skiin_wire(ski_instance, srln);
        }
    }
   
    skiout_init();
#endif
   
#ifdef CONFIG_EGA
    ega_init(EGA_BASE, EGA_VIDEORAM);
#endif
   
#ifdef CONFIG_NS16550
    ns16550_instance_t *ns16550_instance
        = ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL);
    if (ns16550_instance) {
        srln_instance_t *srln_instance = srln_init();
        if (srln_instance) {
            indev_t *sink = stdin_wire();
            indev_t *srln = srln_wire(srln_instance, sink);
            ns16550_wire(ns16550_instance, srln);
        }
    }
   
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
    sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
    sysinfo_set_item_val("kbd.address.physical", NULL,
        (uintptr_t) NS16550_BASE);
    sysinfo_set_item_val("kbd.address.kernel", NULL,
        (uintptr_t) NS16550_BASE);
#endif
   
#ifdef CONFIG_I8042
    i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
    if (i8042_instance) {
        kbrd_instance_t *kbrd_instance = kbrd_init();
        if (kbrd_instance) {
            indev_t *sink = stdin_wire();
            indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
            i8042_wire(i8042_instance, kbrd);
        }
    }
   
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
    sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
    sysinfo_set_item_val("kbd.address.physical", NULL,
        (uintptr_t) I8042_BASE);
    sysinfo_set_item_val("kbd.address.kernel", NULL,
        (uintptr_t) I8042_BASE);
#endif
   
    sysinfo_set_item_val("ia64_iospace", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
}
 
 
/** Enter userspace and never return. */
void userspace(uspace_arg_t *kernel_uarg)
{
    psr_t psr;
    rsc_t rsc;
 
    psr.value = psr_read();
    psr.cpl = PL_USER;
    psr.i = true;           /* start with interrupts enabled */
    psr.ic = true;
    psr.ri = 0;         /* start with instruction #0 */
    psr.bn = 1;         /* start in bank 0 */
 
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
    rsc.loadrs = 0;
    rsc.be = false;
    rsc.pl = PL_USER;
    rsc.mode = 3;           /* eager mode */
 
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
 
    while (1)
        ;
}
 
/** Set thread-local-storage pointer.
 *
 * We use r13 (a.k.a. tp) for this purpose.
 */
unative_t sys_tls_set(unative_t addr)
{
        return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
#ifdef MACHINE_ski
    ski_kbd_grab();
#endif
}
 
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
#ifdef MACHINE_ski
    ski_kbd_release();
#endif
}
 
void arch_reboot(void)
{
    pio_write_8((ioport8_t *)0x64, 0xfe);
    while (1)
        ;
}
 
/** Construct function pointer
 *
 * @param fptr   function pointer structure
 * @param addr   function address
 * @param caller calling function address
 *
 * @return address of the function pointer
 *
 */
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
    fptr->fnc = (unative_t) addr;
    fptr->gp = ((unative_t *) caller)[1];
   
    return (void *) fptr;
}
 
/** @}
 */
 

Rev 4347	Rev 4348
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia64	29	/** @addtogroup ia64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <arch/ski/ski.h>	36	#include <arch/drivers/ski.h>
37	#include <arch/drivers/it.h>	37	#include <arch/drivers/it.h>
38	#include <arch/interrupt.h>	38	#include <arch/interrupt.h>
39	#include <arch/barrier.h>	39	#include <arch/barrier.h>
40	#include <arch/asm.h>	40	#include <arch/asm.h>
41	#include <arch/register.h>	41	#include <arch/register.h>
42	#include <arch/types.h>	42	#include <arch/types.h>
43	#include <arch/context.h>	43	#include <arch/context.h>
44	#include <arch/stack.h>	44	#include <arch/stack.h>
45	#include <arch/mm/page.h>	45	#include <arch/mm/page.h>
46	#include <mm/as.h>	46	#include <mm/as.h>
47	#include <config.h>	47	#include <config.h>
48	#include <userspace.h>	48	#include <userspace.h>
49	#include <console/console.h>	49	#include <console/console.h>
50	#include <proc/uarg.h>	50	#include <proc/uarg.h>
51	#include <syscall/syscall.h>	51	#include <syscall/syscall.h>
52	#include <ddi/irq.h>	52	#include <ddi/irq.h>
53	#include <arch/bootinfo.h>	53	#include <arch/bootinfo.h>
54	#include <genarch/drivers/legacy/ia32/io.h>	54	#include <genarch/drivers/legacy/ia32/io.h>
55	#include <genarch/drivers/ega/ega.h>	55	#include <genarch/drivers/ega/ega.h>
56	#include <genarch/kbrd/kbrd.h>	56	#include <genarch/kbrd/kbrd.h>
57	#include <genarch/srln/srln.h>	57	#include <genarch/srln/srln.h>
58	#include <genarch/drivers/i8042/i8042.h>	58	#include <genarch/drivers/i8042/i8042.h>
59	#include <genarch/drivers/ns16550/ns16550.h>	59	#include <genarch/drivers/ns16550/ns16550.h>
60	#include <arch/drivers/kbd.h>	60	#include <arch/drivers/kbd.h>
61	#include <smp/smp.h>	61	#include <smp/smp.h>
62	#include <smp/ipi.h>	62	#include <smp/ipi.h>
63	#include <arch/atomic.h>	63	#include <arch/atomic.h>
64	#include <panic.h>	64	#include <panic.h>
65	#include <print.h>	65	#include <print.h>
66	#include <sysinfo/sysinfo.h>	66	#include <sysinfo/sysinfo.h>
67	#include <string.h>	67	#include <string.h>
68		68
69	/* NS16550 as a COM 1 */	69	/* NS16550 as a COM 1 */
70	#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)	70	#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
71		71
72	bootinfo_t *bootinfo;	72	bootinfo_t *bootinfo;
73		73
74	static uint64_t iosapic_base = 0xfec00000;	74	static uint64_t iosapic_base = 0xfec00000;
75		75
76	/** Performs ia64-specific initialization before main_bsp() is called. */	76	/** Performs ia64-specific initialization before main_bsp() is called. */
77	void arch_pre_main(void)	77	void arch_pre_main(void)
78	{	78	{
79	/* Setup usermode init tasks. */	79	/* Setup usermode init tasks. */
80		80
81	unsigned int i;	81	unsigned int i;
82		82
83	init.cnt = bootinfo->taskmap.count;	83	init.cnt = bootinfo->taskmap.count;
84		84
85	for (i = 0; i < init.cnt; i++) {	85	for (i = 0; i < init.cnt; i++) {
86	init.tasks[i].addr =	86	init.tasks[i].addr =
87	((unsigned long) bootinfo->taskmap.tasks[i].addr) \|	87	((unsigned long) bootinfo->taskmap.tasks[i].addr) \|
88	VRN_MASK;	88	VRN_MASK;
89	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;	89	init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
90	strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,	90	str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
91	CONFIG_TASK_NAME_BUFLEN);	91	bootinfo->taskmap.tasks[i].name);
92	}	92	}
93	}	93	}
94		94
95	void arch_pre_mm_init(void)	95	void arch_pre_mm_init(void)
96	{	96	{
97	/*	97	/*
98	* Set Interruption Vector Address (i.e. location of interruption vector	98	* Set Interruption Vector Address (i.e. location of interruption vector
99	* table).	99	* table).
100	*/	100	*/
101	iva_write((uintptr_t) &ivt);	101	iva_write((uintptr_t) &ivt);
102	srlz_d();	102	srlz_d();
103		103
104	}	104	}
105		105
106	static void iosapic_init(void)	106	static void iosapic_init(void)
107	{	107	{
108	uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) \| FW_OFFSET;	108	uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) \| FW_OFFSET;
109	int i;	109	int i;
110		110
111	int myid, myeid;	111	int myid, myeid;
112		112
113	myid = ia64_get_cpu_id();	113	myid = ia64_get_cpu_id();
114	myeid = ia64_get_cpu_eid();	114	myeid = ia64_get_cpu_eid();
115		115
116	for (i = 0; i < 16; i++) {	116	for (i = 0; i < 16; i++) {
117	if (i == 2)	117	if (i == 2)
118	continue; /* Disable Cascade interrupt */	118	continue; /* Disable Cascade interrupt */
119	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i;	119	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i;
120	srlz_d();	120	srlz_d();
121	((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;	121	((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
122	srlz_d();	122	srlz_d();
123	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i + 1;	123	((uint32_t )(IOSAPIC + 0x00))[0] = 0x10 + 2 i + 1;
124	srlz_d();	124	srlz_d();
125	((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) \|	125	((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) \|
126	myeid << (48 - 32);	126	myeid << (48 - 32);
127	srlz_d();	127	srlz_d();
128	}	128	}
129		129
130	}	130	}
131		131
132	void arch_post_mm_init(void)	132	void arch_post_mm_init(void)
133	{	133	{
134	if (config.cpu_active == 1) {	134	if (config.cpu_active == 1) {
135	iosapic_init();	135	iosapic_init();
136	irq_init(INR_COUNT, INR_COUNT);	136	irq_init(INR_COUNT, INR_COUNT);
137	}	137	}
138	it_init();	138	it_init();
139	}	139	}
140		140
141	void arch_post_cpu_init(void)	141	void arch_post_cpu_init(void)
142	{	142	{
143	}	143	}
144		144
145	void arch_pre_smp_init(void)	145	void arch_pre_smp_init(void)
146	{	146	{
147	}	147	}
148		148
149	void arch_post_smp_init(void)	149	void arch_post_smp_init(void)
150	{	150	{
151	#ifdef SKI	151	#ifdef MACHINE_ski
152	indev_t *in;	152	ski_instance_t *ski_instance = skiin_init();
153	in = skiin_init();	153	if (ski_instance) {
-		154	srln_instance_t *srln_instance = srln_init();
154	if (in)	155	if (srln_instance) {
155	srln_init(in);	156	indev_t *sink = stdin_wire();
-		157	indev_t *srln = srln_wire(srln_instance, sink);
-		158	skiin_wire(ski_instance, srln);
-		159	}
-		160	}
-		161
156	skiout_init();	162	skiout_init();
157	#endif	163	#endif
158		164
159	#ifdef CONFIG_EGA	165	#ifdef CONFIG_EGA
160	ega_init(EGA_BASE, EGA_VIDEORAM);	166	ega_init(EGA_BASE, EGA_VIDEORAM);
161	#endif	167	#endif
162		168
163	#ifdef CONFIG_NS16550	169	#ifdef CONFIG_NS16550
164	indev_t *kbrdin_ns16550	170	ns16550_instance_t *ns16550_instance
165	= ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL);	171	= ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL);
-		172	if (ns16550_instance) {
-		173	srln_instance_t *srln_instance = srln_init();
166	if (kbrdin_ns16550)	174	if (srln_instance) {
167	srln_init(kbrdin_ns16550);	175	indev_t *sink = stdin_wire();
-		176	indev_t *srln = srln_wire(srln_instance, sink);
-		177	ns16550_wire(ns16550_instance, srln);
-		178	}
-		179	}
168		180
169	sysinfo_set_item_val("kbd", NULL, true);	181	sysinfo_set_item_val("kbd", NULL, true);
170	sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);	182	sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
171	sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);	183	sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
172	sysinfo_set_item_val("kbd.address.physical", NULL,	184	sysinfo_set_item_val("kbd.address.physical", NULL,
173	(uintptr_t) NS16550_BASE);	185	(uintptr_t) NS16550_BASE);
174	sysinfo_set_item_val("kbd.address.kernel", NULL,	186	sysinfo_set_item_val("kbd.address.kernel", NULL,
175	(uintptr_t) NS16550_BASE);	187	(uintptr_t) NS16550_BASE);
176	#endif	188	#endif
177		189
178	#ifdef CONFIG_I8042	190	#ifdef CONFIG_I8042
179	indev_t kbrdin_i8042 = i8042_init((i8042_t ) I8042_BASE, IRQ_KBD);	191	i8042_instance_t i8042_instance = i8042_init((i8042_t ) I8042_BASE, IRQ_KBD);
-		192	if (i8042_instance) {
-		193	kbrd_instance_t *kbrd_instance = kbrd_init();
180	if (kbrdin_i8042)	194	if (kbrd_instance) {
181	kbrd_init(kbrdin_i8042);	195	indev_t *sink = stdin_wire();
-		196	indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
-		197	i8042_wire(i8042_instance, kbrd);
-		198	}
-		199	}
182		200
183	sysinfo_set_item_val("kbd", NULL, true);	201	sysinfo_set_item_val("kbd", NULL, true);
184	sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);	202	sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
185	sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);	203	sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
186	sysinfo_set_item_val("kbd.address.physical", NULL,	204	sysinfo_set_item_val("kbd.address.physical", NULL,
187	(uintptr_t) I8042_BASE);	205	(uintptr_t) I8042_BASE);
188	sysinfo_set_item_val("kbd.address.kernel", NULL,	206	sysinfo_set_item_val("kbd.address.kernel", NULL,
189	(uintptr_t) I8042_BASE);	207	(uintptr_t) I8042_BASE);
190	#endif	208	#endif
191		209
192	sysinfo_set_item_val("ia64_iospace", NULL, true);	210	sysinfo_set_item_val("ia64_iospace", NULL, true);
193	sysinfo_set_item_val("ia64_iospace.address", NULL, true);	211	sysinfo_set_item_val("ia64_iospace.address", NULL, true);
194	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);	212	sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
195	}	213	}
196		214
197		215
198	/** Enter userspace and never return. */	216	/** Enter userspace and never return. */
199	void userspace(uspace_arg_t *kernel_uarg)	217	void userspace(uspace_arg_t *kernel_uarg)
200	{	218	{
201	psr_t psr;	219	psr_t psr;
202	rsc_t rsc;	220	rsc_t rsc;
203		221
204	psr.value = psr_read();	222	psr.value = psr_read();
205	psr.cpl = PL_USER;	223	psr.cpl = PL_USER;
206	psr.i = true; /* start with interrupts enabled */	224	psr.i = true; /* start with interrupts enabled */
207	psr.ic = true;	225	psr.ic = true;
208	psr.ri = 0; /* start with instruction #0 */	226	psr.ri = 0; /* start with instruction #0 */
209	psr.bn = 1; /* start in bank 0 */	227	psr.bn = 1; /* start in bank 0 */
210		228
211	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));	229	asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
212	rsc.loadrs = 0;	230	rsc.loadrs = 0;
213	rsc.be = false;	231	rsc.be = false;
214	rsc.pl = PL_USER;	232	rsc.pl = PL_USER;
215	rsc.mode = 3; /* eager mode */	233	rsc.mode = 3; /* eager mode */
216		234
217	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,	235	switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
218	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -	236	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
219	ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),	237	ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
220	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,	238	((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
221	(uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);	239	(uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
222		240
223	while (1)	241	while (1)
224	;	242	;
225	}	243	}
226		244
227	/** Set thread-local-storage pointer.	245	/** Set thread-local-storage pointer.
228	*	246	*
229	* We use r13 (a.k.a. tp) for this purpose.	247	* We use r13 (a.k.a. tp) for this purpose.
230	*/	248	*/
231	unative_t sys_tls_set(unative_t addr)	249	unative_t sys_tls_set(unative_t addr)
232	{	250	{
233	return 0;	251	return 0;
234	}	252	}
235		253
236	/** Acquire console back for kernel	254	/** Acquire console back for kernel
237	*	255	*
238	*/	256	*/
239	void arch_grab_console(void)	257	void arch_grab_console(void)
240	{	258	{
241	#ifdef SKI	259	#ifdef MACHINE_ski
242	ski_kbd_grab();	260	ski_kbd_grab();
243	#endif	261	#endif
244	}	262	}
245		263
246	/** Return console to userspace	264	/** Return console to userspace
247	*	265	*
248	*/	266	*/
249	void arch_release_console(void)	267	void arch_release_console(void)
250	{	268	{
251	#ifdef SKI	269	#ifdef MACHINE_ski
252	ski_kbd_release();	270	ski_kbd_release();
253	#endif	271	#endif
254	}	272	}
255		273
256	void arch_reboot(void)	274	void arch_reboot(void)
257	{	275	{
258	pio_write_8((ioport8_t *)0x64, 0xfe);	276	pio_write_8((ioport8_t *)0x64, 0xfe);
259	while (1)	277	while (1)
260	;	278	;
261	}	279	}
262		280
263	/** Construct function pointer	281	/** Construct function pointer
264	*	282	*
265	* @param fptr function pointer structure	283	* @param fptr function pointer structure
266	* @param addr function address	284	* @param addr function address
267	* @param caller calling function address	285	* @param caller calling function address
268	*	286	*
269	* @return address of the function pointer	287	* @return address of the function pointer
270	*	288	*
271	*/	289	*/
272	void arch_construct_function(fncptr_t fptr, void addr, void caller)	290	void arch_construct_function(fncptr_t fptr, void addr, void caller)
273	{	291	{
274	fptr->fnc = (unative_t) addr;	292	fptr->fnc = (unative_t) addr;
275	fptr->gp = ((unative_t *) caller)[1];	293	fptr->gp = ((unative_t *) caller)[1];
276		294
277	return (void *) fptr;	295	return (void *) fptr;
278	}	296	}
279		297
280	/** @}	298	/** @}
281	*/	299	*/
282		300

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(root)/branches/dynload/kernel/arch/ia64/src/ia64.c @ 3674 – Rev 4347 → 4348